diff --git a/.github/workflows/deploy-docs-internal.yml b/.github/workflows/deploy-docs-internal.yml
index 1e1d4b6..dc2f270 100644
--- a/.github/workflows/deploy-docs-internal.yml
+++ b/.github/workflows/deploy-docs-internal.yml
@@ -9,6 +9,7 @@ jobs:
 
   deploy-internal:
     runs-on: ubuntu-latest
+    needs: build-docs
     steps:
       - name: Checkout
         uses: actions/checkout@v4
diff --git a/.gitignore b/.gitignore
index ae51708..bde55a0 100644
--- a/.gitignore
+++ b/.gitignore
@@ -160,3 +160,6 @@ cython_debug/
 
 # pdm
 .pdm-python
+
+**/.claude/settings.local.json
+/vendor
diff --git a/README.md b/README.md
index f3d9a17..9e6c563 100644
--- a/README.md
+++ b/README.md
@@ -1,16 +1,17 @@
 # ChipFlow documentation
 
-ChipFlow documentation repository, publishing to the
-[chipflow.github.io repository](https://github.com/ChipFlow/chipflow.github.io/)
-via GitHub actions.
+ChipFlow documentation repository, publishing to
+https://chipflow-docs.docs.chipflow-infra.com via GitHub actions.
+
+Releases are published to https://docs.chipflow.io
 
 
 ## Build and view docs locally
 
-Install Poetry into your environment if you don't have it already:
+Install PDM into your environment if you don't have it already:
 
 ```bash
-pip3 install pipx 
+pip3 install pipx
 pipx install pdm
 ```
 
@@ -23,13 +24,13 @@ pdm install
 Build the documentation locally:
 
 ```bash
-pdm run build
+pdm docs
 ```
 
 Automatically rebuild the documentation on change and preview them at the same time:
 
 ```bash
-pdm run autobuild
+pdm autodocs
 ```
 
 In your web browser go to http://localhost:8000 to see the documentation.
diff --git a/copy-docs.sh b/copy-docs.sh
deleted file mode 100755
index 2aa2545..0000000
--- a/copy-docs.sh
+++ /dev/null
@@ -1,28 +0,0 @@
-#!/bin/bash
-
-repos=(
-'amaranth-lang/amaranth -- -b v0.5.4'
-'chipflow/amaranth-soc -- -b reference-docs-chipflow'
-'chipflow/chipflow-lib'
-)
-
-rm -rf vendor/*
-for r in "${repos[@]}"; do
-  repo=${r%% *} 
-  name=${repo##*/} 
-  if [[ "${r}" =~ "--" ]] ;then
-    opts="-- ${r##* --}"
-  else 
-    opts="" 
-  fi
-  echo "Cloning $repo $opts as vendor/$name"
-  echo "gh repo clone $repo vendor/$name $opts >/dev/null 2>&1 "
-  gh repo clone $repo vendor/$name $opts
-  echo "binding in $repo docs as $name"
-  rm -rf docs/source/$name
-  cp -a  vendor/$name/docs docs/source/$name
-  grep -lr ':doc:' docs/source/$name/* |  xargs sed -i.bak "s/:doc:/:$name:/g"
-done
-
-find docs/source -name "*.bak" -exec rm {} \;
-
diff --git a/docs/source/amaranth-soc.rst b/docs/source/amaranth-soc.rst
deleted file mode 100644
index ffa867b..0000000
--- a/docs/source/amaranth-soc.rst
+++ /dev/null
@@ -1,14 +0,0 @@
-Amaranth System on Chip toolkit
-###############################
-
-.. warning::
-
-   This manual is a work in progress and is seriously incomplete!
-
-.. toctree::
-   :maxdepth: 2
-
-   amaranth-soc/memory
-   amaranth-soc/wishbone
-   amaranth-soc/csr
-   amaranth-soc/gpio
diff --git a/docs/source/amaranth.rst b/docs/source/amaranth.rst
deleted file mode 100644
index 569d8ca..0000000
--- a/docs/source/amaranth.rst
+++ /dev/null
@@ -1,20 +0,0 @@
-Amaranth Language and Toolchain
-###############################
-
-.. warning::
-   This manual is a work in progress!
-
-.. toctree::
-   :maxdepth: 2
-
-   amaranth/intro
-   amaranth/install
-   amaranth/start
-   amaranth/tutorial
-   amaranth/guide
-   amaranth/reference
-   amaranth/simulator
-   amaranth/platform
-   amaranth/stdlib
-   amaranth/changes
-   amaranth/contrib
diff --git a/docs/source/conf.py b/docs/source/conf.py
index 75c4f31..5a6c30d 100644
--- a/docs/source/conf.py
+++ b/docs/source/conf.py
@@ -1,5 +1,28 @@
 # Configuration file for the Sphinx documentation builder.
+import os
+import sys
 from pathlib import Path
+from itertools import starmap
+
+top_path = Path('../../')
+sys.path.append(str((top_path / 'tools').absolute()))
+
+from tools import copy_docs
+
+# Repos we will be assembling
+repos = [
+    ('amaranth-lang/amaranth', 'tags/v0.5.4'),
+    ('chipflow/amaranth-soc', 'origin/reference-docs-chipflow'),
+    ('chipflow/chipflow-lib', 'origin/main')
+]
+
+# copy in the doc sources from our repos
+repo_list = copy_docs(repos)
+
+# add our repos to path
+for r in repo_list:
+    sys.path.append(str(r))
+
 # -- Project information
 
 project = 'ChipFlow'
@@ -10,27 +33,23 @@
 version = '0.1.0'
 
 # -- General configuration
-top_dir = Path(__file__).parent / ".." / ".."
 extensions = [
+    'sphinx.ext.autodoc',
+    'sphinx.ext.autodoc.typehints',
     'sphinx.ext.duration',
     'sphinx.ext.doctest',
     'sphinx.ext.intersphinx',
-    'sphinx.ext.autosummary',
     'sphinx_copybutton',
     'myst_parser',
     'sphinx.ext.todo',
-    'sphinx.ext.autodoc',
     'sphinx.ext.napoleon',
+    'sphinx.ext.autodoc',
     'sphinx_rtd_theme',
     'sphinxcontrib.platformpicker',
     'sphinxcontrib.yowasp_wavedrom',
-    'sphinx.ext.autodoc',
     'sphinxext.rediraffe',
+    'autoapi.extension',
 ]
-"""
-    "sphinx_design",
-    "sphinx_design_elements",
-"""
 
 rst_prolog = """
 .. role:: amaranth
@@ -43,24 +62,57 @@
    :language: python
 """
 
+html_theme = 'furo'
+html_logo = 'chipflow-lib/_assets/chipflow-logo.svg'
+html_title = "ChipFlow Platform Documentation"
+html_static_path = ['chipflow-lib/_assets', 'amaranth/_static', 'amaranth-soc/_static']
+
+html_theme_options = {
+    "dark_css_variables": {
+        "admonition-font-size": "0.9 rem",
+    },
+    "light_css_variables": {
+        "admonition-font-size": "0.9 rem",
+    },
+}
+
+autodoc_typehints = 'description'
+
+autoapi_dirs = [
+        top_path / "vendor/chipflow-lib/chipflow_lib/platforms",
+        top_path / "vendor/chipflow-lib/chipflow_lib",
+        ]
+autoapi_generate_api_docs = True
+autoapi_template_dir = "chipflow-lib/_templates/autoapi"
+# autoapi_verbose_visibility = 2
+autoapi_keep_files = True
+autoapi_options = [
+    'members',
+    'show-inheritance',
+    'show-module-summary',
+    'imported-members',
+]
+autoapi_root = "chipflow-lib/autoapi"
+
+# Exclude autoapi templates and in-progress stuff
+exclude_patterns = [
+    autoapi_template_dir,
+    "chipflow-lib/unfinished",
+    "amaranth/cover.rst",
+    "amaranth-soc/cover.rst",
+]
+
 
 intersphinx_mapping = {
     'python': ('https://docs.python.org/3/', None),
 }
 intersphinx_disabled_domains = ['std']
 
-exclude_patterns = [
-        'amaranth/index.rst',
-        'amaranth/cover.rst',
-        'amaranth-soc/index.rst',
-        'amaranth-soc/cover.rst',
-        ]
-
 rediraffe_redirects = {
     "simulator.rst": "amaranth/simulator.rst",
 }
 
-templates_path = ['_templates']
+templates_path = ['chipflow-lib/_templates']
 
 # -- Options for HTML output
 
@@ -69,11 +121,6 @@
 # Favicon is not from `_static`, it gets copied:
 html_favicon = "favicon.png"
 
-# These folders are copied to the documentation's HTML output
-html_static_path = ["_static"]
-
-html_logo = "_static/logo.png"
-
 # These paths are either relative to html_static_path
 # or fully qualified paths (eg. https://...)
 html_js_files = [
@@ -116,6 +163,7 @@
     r"^https://github\.com/[^/]+/[^/]+/$",
 ]
 
+suppress_warnings = [ "ref.python" ]
 
 # Silence the warnings globally; otherwise they may fire on object destruction and crash completely
 # unrelated tests.
diff --git a/docs/source/index.rst b/docs/source/index.rst
index 7149a59..0bf690b 100644
--- a/docs/source/index.rst
+++ b/docs/source/index.rst
@@ -1,14 +1,26 @@
-ChipFlow documentation
-======================
+ChipFlow Library Documentation
+==============================
+
+.. image:: chipflow-lib/_assets/chipflow-logo.svg
+   :width: 200px
+   :class: sd-m-auto
+   :name: landing-page-logo
+
+
+ChipFlow IC Design Platform
+---------------------------
+
+ChipFlow is an open-source platform for designing, testing, and manufacturing custom silicon.
+It provides a streamlined workflow from design to fabrication using Python and the Amaranth HDL.
 
-Try our :amaranth:`tutorial-intro-chipflow-platform`.
 
 Contents
 --------
 
 .. toctree::
-   amaranth
-   amaranth-soc
-   chipflow-lib/index.rst
-   tutorial-intro-chipflow-platform
+   :caption: User Guide
+
+   chipflow-lib/index
+   Amaranth Language and Toolchain <amaranth/index>
+   Amaranth System-on-a-Chip toolkit <amaranth-soc/index>
    support
diff --git a/docs/source/tutorial-intro-chipflow-platform.rst b/docs/source/tutorial-intro-chipflow-platform.rst
deleted file mode 100644
index f24bf71..0000000
--- a/docs/source/tutorial-intro-chipflow-platform.rst
+++ /dev/null
@@ -1,560 +0,0 @@
-.. role:: bash(code)
-   :language: bash
-
-Introduction to the ChipFlow platform
-=====================================
-
-This tutorial gives an overview of how we can configure an SoC (system on chip) with the ChipFlow platform:
-
-* Simulate an example SoC
-* Add a peripheral
-* Optionally run on an FPGA
-
-.. important:: 
-
-    To test designs on an FPGA, you will need a `ULX3S <https://www.crowdsupply.com/radiona/ulx3s>`_.
-    Other development boards will be supported in the future.
-
-.. important::
-
-    This tutorial assumes you are running on macOS 11 or later or Ubuntu 22.04 or later.
-    The tutorial will work on other Linux distributions, but instructions are not included here.
-
-
-Preparing your local environment
---------------------------------
-
-.. admonition:: Installing on macOS
-
-    You will need to install Python3 and git. Use `Brew <https://brew.sh/>`_ for this: ::
-
-        /bin/bash -c "$(curl -fsSL https://raw.githubusercontent.com/Homebrew/install/HEAD/install.sh)"
-        brew install python3 pipx
-        brew install git
-
-.. admonition:: Installing on Ubuntu
-
-    You will need to install git: ::
-
-	sudo apt install git pipx
-
-We use `PDM <https://pdm.fming.dev/>`_ to manage dependencies and ensure reproduable builds of your design.
-
-First install PDM: ::
-
-    pipx ensurepath
-	pipx install pdm
-
-You may need to restart your shell session for PDM to become available, using: ::
-    
-    exec "$SHELL"
-   
-To program the FPGA board we use `openFPGAloader <https://trabucayre.github.io/openFPGALoader/guide/install.html>`_.
-
-.. admonition:: Installing on macOS
-
-    Install using brew: ::
-
-        brew install openfpgaloader
-
-.. admonition:: Installing on Ubuntu
-
-    Install openFPGAloader using apt: ::
-
-        sudo add-apt-repository ppa:chipflow/ppa
-        sudo apt update
-        sudo apt install openfpgaloader
-
-Getting started
----------------
-
-First use `Git <https://git-scm.com/>`_ to get the example sources.  ::
-
-	git clone https://github.com/ChipFlow/example-socs
-
-Then set up your environment: ::
-
-    cd example-socs
-    make init
-
-
-The example project
--------------------
-
-The project contains:
-
-* ``.github/workflows/*`` - Runs linting and tests in GitHub Actions.
-* ``chipflow.toml`` - Configuration telling the ChipFlow library how to load your Python design and allows you to configure the ChipFlow platform.
-* ``Makefile`` - Contains helpful shortcuts to the CLI tools used in the project.
-* ``my_design/design.py`` - This has the actual chip design.
-* ``my_design/steps/*`` - These control how your design will be presented to the ChipFlow build steps, ``sim``(ulation), (FPGA)``board`` and ``silicon``.
-* ``my_design/sim/*`` - The C++ and `doit build file <https://pydoit.org/>`_ which builds the binary which will simulate our design.
-* ``my_design/software/*`` - The C++ and `doit build file <https://pydoit.org/>`_ for the software/BIOS which we will load onto our design when it's running in simulation or on a board.
-* ``tests/*`` - This has some pytest integration tests which cover simulation and board/silicon builds.
-
-The design
-----------
-
-The chip design is contained within the `MySoC` class in ``my_design/design.py``, and is described 
-using the `Amaranth hardware definition language <https://github.com/amaranth-lang/amaranth>`_.
-Amaranth is already well-used for FPGA boards, and at ChipFlow we will be using it 
-to produce silicon chips.
-
-Something a little unusual about our example Amaranth design is that we change 
-how the peripherals are physically accessed for use with simulation, a board, or 
-silicon.
-
-For example, here's where we add ``QSPIFlash`` to our design:
-
-.. code-block:: python
-
-    m.submodules.rom_provider = rom_provider = platform.providers.QSPIFlashProvider()
-    self.rom = SPIMemIO(
-        flash=rom_provider.pins
-    )
-
-The provider implementations, which are provided by ChipFlow, look a bit different for each context:
-
-QSPIFlash for a Board
-~~~~~~~~~~~~~~~~~~~~~
-
-For a board, in our case a ULX3S board, we need a means of accessing the clock pin (``USRMCLK``) and buffer primitives (``OBZ``, ``BB``) to access the other pins:
-
-.. code-block:: python
-
-    class QSPIFlashProvider(Elaboratable):
-        def __init__(self):
-            self.pins = QSPIPins()
-
-        def elaborate(self, platform):
-            m = Module()
-
-            flash = platform.request("spi_flash", dir=dict(cs='-', copi='-', cipo='-', wp='-', hold='-'))
-            # Flash clock requires a special primitive to access in ECP5
-            m.submodules.usrmclk = Instance(
-                "USRMCLK",
-                i_USRMCLKI=self.pins.clk_o,
-                i_USRMCLKTS=ResetSignal(),  # tristate in reset for programmer accesss
-                a_keep=1,
-            )
-            # IO pins and buffers
-            m.submodules += Instance(
-                "OBZ",
-                o_O=flash.cs.io,
-                i_I=self.pins.csn_o,
-                i_T=ResetSignal(),
-            )
-            # Pins in order
-            data_pins = ["copi", "cipo", "wp", "hold"]
-
-            for i in range(4):
-                m.submodules += Instance(
-                    "BB",
-                    io_B=getattr(flash, data_pins[i]).io,
-                    i_I=self.pins.d_o[i],
-                    i_T=~self.pins.d_oe[i],
-                    o_O=self.pins.d_i[i]
-                )
-            return m
-
-This is specific to the ECP5 family of boards, and the code would look different for others.
-
-QSPIFlash for Simulation
-~~~~~~~~~~~~~~~~~~~~~~~~
-
-For simulation, we add a C++ model which will mock/simulate the flash:
-
-.. code-block:: python
-
-    class QSPIFlashProvider(Elaboratable):
-        def __init__(self):
-            self.pins = QSPIPins()
-
-        def elaborate(self, platform):
-            return platform.add_model("spiflash_model", self.pins, edge_det=['clk_o', 'csn_o'])
-
-QSPIFlash for Silicon
-~~~~~~~~~~~~~~~~~~~~~
-
-For Silicon we just hook up the IO.
-
-.. code-block:: python
-
-    class QSPIFlashProvider(Elaboratable):
-        def __init__(self):
-            self.pins = QSPIPins()
-
-        def elaborate(self, platform):
-            m = Module()
-            m.d.comb += [
-                platform.request("flash_clk").eq(self.pins.clk_o),
-                platform.request("flash_csn").eq(self.pins.csn_o),
-            ]
-            for index in range(4):
-                pin = platform.request(f"flash_d{index}")
-                m.d.comb += [
-                    self.pins.d_i[index].eq(pin.i),
-                    pin.o.eq(self.pins.d_o[index]),
-                    pin.oe.eq(self.pins.d_oe[index])
-                ]
-            return m
-
-Run the design in simulation
-----------------------------
-
-Running our design and its software in simulation allows us to loosely check 
-that it's working. 
-
-First we need to build a local simulation binary. The simulation uses 
-blackbox C++ models of external peripherals, such as the flash, to interact 
-with:
-
-.. code-block:: bash
-
-    make sim-build
-
-After running this, we will have a simulation binary at ``build/sim/sim_soc``. 
-
-We can't run it just yet, as it needs the software/BIOS too. To build the 
-software we run:
-
-.. code-block:: bash
-
-    make software-build
-
-Now that we have our simulation binary, and a BIOS, we can run it:
-
-.. code-block:: bash
-
-    make sim-run
-
-You should see console output like this:
-
-.. code-block:: bash
-
-    🐱: nyaa~!
-    SoC type: CA7F100F
-    SoC version: 2024D6E6
-    Flash ID: CA7CA7FF
-    Entering QSPI mode
-    Initialised!
-
-Which means the processor is up and running. You can use Ctrl+C to interrupt it.
-
-Run the design on a ULX3S board (optional)
-------------------------------------------
-
-We can also run our design on an FPGA board, although currently only the ULX3S 
-is supported. If you don't have one, you can 
-:ref:`skip to the next section <add-peripheral>`.
-
-First we need to build the design into a bitstream for the board:
-
-.. code-block:: bash
-
-    make board-build
-
-This will write a file ``build/top.bit``. As for the simulation, we need the 
-software/BIOS too. 
-
-If we haven't already, build the bios:
-
-.. code-block:: bash
-
-    make software-build
-
-Now, we load the software/BIOS and design onto board (program its bitstream):
-
-.. code-block:: bash
-
-    make board-load-software-ulx3s
-    make board-load-ulx3s
-
-Your board should now be running. For us to check that it's working, we can 
-connect to it via its serial port:
-
-Connecting to your board
-~~~~~~~~~~~~~~~~~~~~~~~~
-
-First you need to find the serial port for your board, this is a little tricky but you should only need to do this once.
-
-
-.. admonition:: Look for your serial port on macOS 
-
-  Run the following command ::
-
-    ls /dev/tty*
-
-  you should see something similar to this: ::
-
-    /dev/tty.Bluetooth-Incoming-Port 
-    /dev/tty.usbserial-K00219
-
-  In this case for our board its ``/dev/tty.usbserial-K00219``. Your device will likely be named similarly.
-   
-
-.. admonition:: Look for your serial port on Ubuntu/WSL2
-
-  Run the following command ::
-
-    ls /dev/ttyUSB*
-
-  you should see something similar to this: ::
-
-    /dev/ttyUSB0
-
-
-  In this case for our board its ``/dev/ttyUSB0``. Yours will likely be named similarly.
-
-
-Below we will refer to the name of your serial port as ``$TTYUSB``. This is the full path you saw, starting with ``/dev/``. 
-
-For ease you can set this in your terminal using ``export TTYUSB=/dev/<the tty device you found>``.
-
-Connect to the port via the screen utility, at baud ``115200``, with the command:
-
-.. code-block:: bash
-
-  screen $TTYUSB 115200
-
-Now, press the ``PWR`` button on your board, which will restart the design, 
-and give you a chance to see its output. It should look like:
-
-.. code-block:: bash
-
-  🐱: nyaa~!
-  SoC type: CA7F100F
-  SoC version: 613015FF
-  Flash ID: EF401800
-  Entering QSPI mode
-  Initialised!
-
-To exit screen, use ``CTRL-A``, then ``CTRL-\``.
-
-.. _add-peripheral:
-
-Add a peripheral to the design
-------------------------------
-
-We're going to add a very simple peripheral - buttons! This will allow us to press
-buttons on our board and see the result, as well as something in simlation.
-
-Add buttons to the design
-~~~~~~~~~~~~~~~~~~~~~~~~~
-
-In ``my_design/design.py`` we need to add another GPIO peripheral to read the 
-button values.
-
-You can uncomment the following:
-
-Add an address space:
-
-.. code-block:: python
-
-    self.uart_base = 0xb2000000
-    self.timer_base = 0xb3000000
-    self.soc_id_base = 0xb4000000
-    self.btn_gpio_base = 0xb5000000
-
-Add the button peripheral:
-
-.. code-block:: python
-
-        soc_type = 0xCA7F100F
-        self.soc_id = SoCID(type_id=soc_type)
-        self._decoder.add(self.soc_id.bus, addr=self.soc_id_base)
-
-        m.submodules.gpio_provider = gpio_provider = platform.providers.ButtonGPIOProvider()
-        self.btn = GPIOPeripheral(
-            pins=gpio_provider.pins
-        )
-        self._decoder.add(self.btn.bus, addr=self.btn_gpio_base)
-
-
-Link up the button submodule:
-
-.. code-block:: python
-
-        m.submodules.uart = self.uart
-        m.submodules.timer = self.timer
-        m.submodules.soc_id = self.soc_id
-        m.submodules.btn = self.btn
-
-
-Add the button to our software generator:
-
-.. code-block:: python
-
-        sw.add_periph("uart", "UART0", self.uart_base)
-        sw.add_periph("plat_timer", "TIMER0", self.timer_base)
-        sw.add_periph("soc_id", "SOC_ID", self.soc_id_base)
-        sw.add_periph("gpio", "BTN_GPIO", self.btn_gpio_base)
-
-
-Update our software
-~~~~~~~~~~~~~~~~~~~
-
-So far, we have added the buttons to our design, but nothing will happen if we 
-press them! So we update our software so it reacts to the button presses:
-
-In ``my_design/software/main.c`` we uncomment the button press listening code:
-
-
-.. code-block:: c
-
-	while (1) {
-		// Listen for button presses
-		next_buttons = BTN_GPIO->in;
-		if ((next_buttons & 1U) && !(last_buttons & 1U))
-			puts("button 1 pressed!\n");
-		if ((next_buttons & 2U) && !(last_buttons & 2U))
-			puts("button 2 pressed!\n");
-		last_buttons = next_buttons;
-	};
-
-
-Because we called ``sw.add_periph("gpio", "BTN_GPIO", self.btn_gpio_base)`` in our design above, here in our software we'll have a ``BTN_GPIO`` pointer to the peripheral address.
-
-The pointer will be of a type matching the peripheral fields, and its `in` field contains the input value of the GPIO.
-
-Using this, we'll now see "button X pressed!" when one of the buttons is pressed.
-
-
-Update our simulation
-~~~~~~~~~~~~~~~~~~~~~
-
-We're going to simulate the buttons being pressed in the simulation on a timer.
-
-It is possible to listen for keypresses on the keyboard, but that would introduce 
-too many dependencies for our simple example.
-
-So, in ``my_design/sim/main.cc`` we will uncomment the button presses code:
-
-.. code-block:: cpp
-
-    while (1) {
-        tick();
-        idx = (idx + 1) % 1000000;
-
-        // Simulate button presses
-        if (idx == 100000) // at t=100000, press button 1
-            top.p_buttons.set(0b01U);
-        else if (idx == 150000) // at t=150000, release button 1
-            top.p_buttons.set(0b00U);
-        else if (idx == 300000) // at t=300000, press button 2
-            top.p_buttons.set(0b10U);
-        else if (idx == 350000) // at t=350000, release button 2
-            top.p_buttons.set(0b00U);
-    }
-
-
-See how we're pressing and releasing button 1, followed by button 2, on a loop, forever.
-
-See our new peripheral in action
---------------------------------
-
-See the changes in simulation
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-We can now take a look at our changes in simulation:
-
-.. code-block:: bash
-
-    # Rebuild our software 
-    make software-build
-
-    # Rebuild our simulation
-    make sim-build
-
-    # Run our simulation
-    make sim-run
-
-We should now see the output with button presses:
-
-.. code-block:: bash
-
- 🐱: nyaa~!
- SoC type: CA7F100F
- SoC version: DCBBADEA
- Flash ID: CA7CA7FF
- Entering QSPI mode
- Initialised!
- button 1 pressed!
- button 2 pressed!
- button 1 pressed!
-
-
-See the changes on our board (optional)
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-
-To see the changes on our board, we need to load the updated
-software and design:
-
-.. code-block:: bash
-
-    # Rebuild our software 
-    make software-build
-
-    # Rebuild our board
-    make board-build
-
-    # Load software onto board
-    make board-load-software-ulx3s
-
-    # Load design onto board
-    make board-load-ulx3s
-
-Now, as in our first example, we need to connect to the board and 
-see its output.
-
-When we press the physical buttons on the board, we should see it:
-
-.. code-block:: bash
-
- 🐱: nyaa~!
- SoC type: CA7F100F
- SoC version: DCBBADEA
- Flash ID: EF401800
- Entering QSPI mode
- Initialised!
- button 2 pressed!
- button 2 pressed!
- button 1 pressed!
- button 2 pressed!
-
-
-
-Building for Silicon
---------------------
-
-For this first Alpha, we aren't *quite* ready to start accepting designs on our API. This is coming very soon though!
-
-`Sign up <https://chipflow.io/beta>`_ to be notified when the next Alpha release is available.
-
-If you are using this tutorial to test out new designs, reach out to us on `our Gitter channel <https://gitter.im/ChipFlow/community>`_. We would love to add your designs to our test sets!
-
-
-What's on the roadmap?
-----------------------
-
-We still have a lot of work to do - some things on our roadmap:
-
-* Silicon build API
-* Integration tests to test your design in Python.
-* Improved simulation tooling.
-* Many more high-quality Amaranth Peripheral IP modules to include in your designs.
-
-Join the beta
--------------
-
-If you're interested in the platform, you can `join the beta <https://chipflow.io/beta>`_ 
-and help us build the future of Python-powered chip design.
-
-
-Troubleshooting
----------------
-* Python version issues:
-	If you choose to run ``pdm install`` within a venv, PDM will reuse
-	that venv instead of creating a new one.
-	Ensure that you use a venv with Python 3.8 or greater.
-
diff --git a/pdm.lock b/pdm.lock
index 3a258df..b60f6c7 100644
--- a/pdm.lock
+++ b/pdm.lock
@@ -5,10 +5,10 @@
 groups = ["default"]
 strategy = []
 lock_version = "4.5.0"
-content_hash = "sha256:2f11eda97b66226b91f1e479c272b545df86544fdace88470c6e9b1aec57f96c"
+content_hash = "sha256:ef10726a6b092a0b62c2c1ed8f32c1a4e2b7acbc8f0bfb6e3139b15612a4891f"
 
 [[metadata.targets]]
-requires_python = "~=3.10"
+requires_python = "~=3.12"
 
 [[package]]
 name = "alabaster"
@@ -36,6 +36,19 @@ files = [
     {file = "anyio-4.9.0.tar.gz", hash = "sha256:673c0c244e15788651a4ff38710fea9675823028a6f08a5eda409e0c9840a028"},
 ]
 
+[[package]]
+name = "astroid"
+version = "3.3.9"
+requires_python = ">=3.9.0"
+summary = "An abstract syntax tree for Python with inference support."
+dependencies = [
+    "typing-extensions>=4.0.0; python_version < \"3.11\"",
+]
+files = [
+    {file = "astroid-3.3.9-py3-none-any.whl", hash = "sha256:d05bfd0acba96a7bd43e222828b7d9bc1e138aaeb0649707908d3702a9831248"},
+    {file = "astroid-3.3.9.tar.gz", hash = "sha256:622cc8e3048684aa42c820d9d218978021c3c3d174fb03a9f0d615921744f550"},
+]
+
 [[package]]
 name = "babel"
 version = "2.17.0"
@@ -75,64 +88,38 @@ files = [
 
 [[package]]
 name = "charset-normalizer"
-version = "3.4.1"
+version = "3.4.2"
 requires_python = ">=3.7"
 summary = "The Real First Universal Charset Detector. Open, modern and actively maintained alternative to Chardet."
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 ]
 
 [[package]]
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 ]
 
-[[package]]
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-version = "1.2.2"
-requires_python = ">=3.7"
-summary = "Backport of PEP 654 (exception groups)"
-files = [
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-]
-
 [[package]]
 name = "furo"
 version = "2024.8.6"
@@ -238,6 +215,19 @@ files = [
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 ]
 
+[[package]]
+name = "jschon"
+version = "0.11.1"
+requires_python = "~=3.8"
+summary = "A JSON toolkit for Python developers."
+dependencies = [
+    "rfc3986",
+]
+files = [
+    {file = "jschon-0.11.1-py3-none-any.whl", hash = "sha256:2350e8b6747b17358022960f91208bea70de448b914827af3184d30e20500f0f"},
+    {file = "jschon-0.11.1.tar.gz", hash = "sha256:c0ca0beab1f1694a03d726b91ed75ec604a7787af3ae91ead765f78215bf149f"},
+]
+
 [[package]]
 name = "json5"
 version = "0.12.0"
@@ -267,26 +257,6 @@ version = "3.0.2"
 requires_python = ">=3.9"
 summary = "Safely add untrusted strings to HTML/XML markup."
 files = [
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@@ -387,24 +357,6 @@ version = "6.0.2"
 requires_python = ">=3.8"
 summary = "YAML parser and emitter for Python"
 files = [
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@@ -431,14 +383,6 @@ name = "quickjs"
 version = "1.19.4"
 summary = "Wrapping the quickjs C library."
 files = [
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-    {file = "quickjs-1.19.4-cp310-cp310-manylinux_2_17_x86_64.manylinux2014_x86_64.manylinux_2_28_x86_64.whl", hash = "sha256:be7424b9af7853aaff930e3af2d1f2ebd83241cd2764abcea66247476a6d56d5"},
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@@ -462,6 +406,16 @@ files = [
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 ]
 
+[[package]]
+name = "rfc3986"
+version = "2.0.0"
+requires_python = ">=3.7"
+summary = "Validating URI References per RFC 3986"
+files = [
+    {file = "rfc3986-2.0.0-py2.py3-none-any.whl", hash = "sha256:50b1502b60e289cb37883f3dfd34532b8873c7de9f49bb546641ce9cbd256ebd"},
+    {file = "rfc3986-2.0.0.tar.gz", hash = "sha256:97aacf9dbd4bfd829baad6e6309fa6573aaf1be3f6fa735c8ab05e46cecb261c"},
+]
+
 [[package]]
 name = "sniffio"
 version = "1.3.1"
@@ -474,11 +428,12 @@ files = [
 
 [[package]]
 name = "snowballstemmer"
-version = "2.2.0"
-summary = "This package provides 29 stemmers for 28 languages generated from Snowball algorithms."
+version = "3.0.0.1"
+requires_python = "!=3.0.*,!=3.1.*,!=3.2.*"
+summary = "This package provides 32 stemmers for 30 languages generated from Snowball algorithms."
 files = [
-    {file = "snowballstemmer-2.2.0-py2.py3-none-any.whl", hash = "sha256:c8e1716e83cc398ae16824e5572ae04e0d9fc2c6b985fb0f900f5f0c96ecba1a"},
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+    {file = "snowballstemmer-3.0.0.1-py3-none-any.whl", hash = "sha256:d1cdabc06fb492e80620d9e2c44d39e67cfda290b2aaef8718b0691079443b10"},
+    {file = "snowballstemmer-3.0.0.1.tar.gz", hash = "sha256:1d09493a5ecc85fb5b433674e9c83fcd41c6739b6979ce4b54e81a40ec078342"},
 ]
 
 [[package]]
@@ -521,6 +476,24 @@ files = [
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 ]
 
+[[package]]
+name = "sphinx-autoapi"
+version = "3.6.0"
+requires_python = ">=3.9"
+summary = "Sphinx API documentation generator"
+dependencies = [
+    "Jinja2",
+    "PyYAML",
+    "astroid>=2.7; python_version < \"3.12\"",
+    "astroid>=3; python_version >= \"3.12\"",
+    "sphinx>=7.4.0",
+    "stdlib-list; python_version < \"3.10\"",
+]
+files = [
+    {file = "sphinx_autoapi-3.6.0-py3-none-any.whl", hash = "sha256:f3b66714493cab140b0e896d33ce7137654a16ac1edb6563edcbd47bf975f711"},
+    {file = "sphinx_autoapi-3.6.0.tar.gz", hash = "sha256:c685f274e41d0842ae7e199460c322c4bd7fec816ccc2da8d806094b4f64af06"},
+]
+
 [[package]]
 name = "sphinx-autobuild"
 version = "2024.10.3"
@@ -741,46 +714,6 @@ files = [
     {file = "starlette-0.46.2.tar.gz", hash = "sha256:7f7361f34eed179294600af672f565727419830b54b7b084efe44bb82d2fccd5"},
 ]
 
-[[package]]
-name = "tomli"
-version = "2.2.1"
-requires_python = ">=3.8"
-summary = "A lil' TOML parser"
-files = [
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@@ -932,12 +814,6 @@ files = [
     {file = "websockets-15.0.1-cp313-cp313-musllinux_1_2_x86_64.whl", hash = "sha256:558d023b3df0bffe50a04e710bc87742de35060580a293c2a984299ed83bc4e4"},
     {file = "websockets-15.0.1-cp313-cp313-win32.whl", hash = "sha256:ba9e56e8ceeeedb2e080147ba85ffcd5cd0711b89576b83784d8605a7df455fa"},
     {file = "websockets-15.0.1-cp313-cp313-win_amd64.whl", hash = "sha256:e09473f095a819042ecb2ab9465aee615bd9c2028e4ef7d933600a8401c79561"},
-    {file = "websockets-15.0.1-pp310-pypy310_pp73-macosx_10_15_x86_64.whl", hash = "sha256:0c9e74d766f2818bb95f84c25be4dea09841ac0f734d1966f415e4edfc4ef1c3"},
-    {file = "websockets-15.0.1-pp310-pypy310_pp73-macosx_11_0_arm64.whl", hash = "sha256:1009ee0c7739c08a0cd59de430d6de452a55e42d6b522de7aa15e6f67db0b8e1"},
-    {file = "websockets-15.0.1-pp310-pypy310_pp73-manylinux_2_17_aarch64.manylinux2014_aarch64.whl", hash = "sha256:76d1f20b1c7a2fa82367e04982e708723ba0e7b8d43aa643d3dcd404d74f1475"},
-    {file = "websockets-15.0.1-pp310-pypy310_pp73-manylinux_2_5_i686.manylinux1_i686.manylinux_2_17_i686.manylinux2014_i686.whl", hash = "sha256:f29d80eb9a9263b8d109135351caf568cc3f80b9928bccde535c235de55c22d9"},
-    {file = "websockets-15.0.1-pp310-pypy310_pp73-manylinux_2_5_x86_64.manylinux1_x86_64.manylinux_2_17_x86_64.manylinux2014_x86_64.whl", hash = "sha256:b359ed09954d7c18bbc1680f380c7301f92c60bf924171629c5db97febb12f04"},
-    {file = "websockets-15.0.1-pp310-pypy310_pp73-win_amd64.whl", hash = "sha256:cad21560da69f4ce7658ca2cb83138fb4cf695a2ba3e475e0559e05991aa8122"},
     {file = "websockets-15.0.1-py3-none-any.whl", hash = "sha256:f7a866fbc1e97b5c617ee4116daaa09b722101d4a3c170c787450ba409f9736f"},
     {file = "websockets-15.0.1.tar.gz", hash = "sha256:82544de02076bafba038ce055ee6412d68da13ab47f0c60cab827346de828dee"},
 ]
diff --git a/pyproject.toml b/pyproject.toml
index 192bbf0..1f584d0 100644
--- a/pyproject.toml
+++ b/pyproject.toml
@@ -1,12 +1,12 @@
 [project]
 name = "chipflow-docs"
-version = "0.0.0"
+version = "0.2"
 authors = [
-  {name = "Ross Motley", email = "ross.motley@chipflow.io"}
+  {name = "Rob Taylor", email = "rob.tayloe@chipflow.io"}
 ]
 readme = "README.md"
 
-requires-python = "~=3.10"
+requires-python = "~=3.12"
 dependencies = [
   "sphinx>=7.1",
   "sphinxcontrib-platformpicker~=1.4",
@@ -21,15 +21,15 @@ dependencies = [
   "sphinx-design>=0.6.0",
   "sphinx_design_elements @ git+https://github.com/panodata/sphinx-design-elements@linktree",
   "sphinxext-rediraffe>=0.2.7",
+  "sphinx-autoapi>=3.6.0",
+  "jschon>=0.11.1",
 ]
 
-
-[dependency-groups]
-dev = [
-    "-e amaranth@file:///${PROJECT_ROOT}/vendor/amaranth",
-    "-e amaranth_soc@file:///${PROJECT_ROOT}/vendor/amaranth-soc",
-]
+[build-system]
+requires = ["pdm-backend"]
+build-backend = "pdm.backend"
 
 [tool.pdm.scripts]
-docs.composite = ["./copy-docs.sh", "{pdm} lock --dev", "{pdm} install --dev", "sphinx-build docs/source/ docs/build/"]
-autodocs.cmd = "sphinx-autobuild docs/source/ docs/build/"
+docs.cmd= "sphinx-build docs/source/ docs/build/"
+autodocs.cmd= "sphinx-autobuild docs/source/ docs/build/"
+
diff --git a/tools/__init__.py b/tools/__init__.py
new file mode 100644
index 0000000..39d2184
--- /dev/null
+++ b/tools/__init__.py
@@ -0,0 +1,2 @@
+from .copy_docs import copy_docs
+__all__=['copy_docs']
diff --git a/tools/copy_docs.py b/tools/copy_docs.py
new file mode 100755
index 0000000..b4aeaa1
--- /dev/null
+++ b/tools/copy_docs.py
@@ -0,0 +1,87 @@
+#!/usr/bin/env python3
+"""
+Clones repositories and copies their documentation into the docs/source directory.
+"""
+import os
+import subprocess
+import re
+import glob
+import shutil
+from pathlib import Path
+from typing import List, Tuple
+
+def copy_docs(repos: List[Tuple[str, str]]) -> List[Path]:
+    """"
+    Pull in docs from other repos.
+
+    Clones the repos at the given refs in $PDM_PROJECT_ROOT/vendor
+    Then copies the doc dirs into this one, tranforming `:role:` references appropriatly
+
+    Args:
+        repos: List of tuples containing git repo and ref
+
+    Returns:
+        A list of the repo locations
+    """
+
+    # Ensure vendor directory exists
+    root_path = Path(os.environ['PDM_PROJECT_ROOT'])
+    vendor = root_path / 'vendor'
+    vendor.mkdir(exist_ok=True)
+
+    repo_list = []
+
+    for repo_info in repos:
+        repo_path = Path(repo_info[0])
+        ref = repo_info[1]
+
+        # Extract repo name from path (equivalent to ${repo##*/} in bash)
+        name = repo_path.name
+
+        repodir = vendor / name
+        docs_dest_path = root_path /'docs/source' / name
+
+        # Check if repo already exists
+        if repodir.exists():
+            print(f"{repo_path} already there, updating")
+            # Git fetch
+            subprocess.run(['git', '-C', repodir, 'fetch'], check=True)
+            # Checkout ref
+            subprocess.run(['git', '-C', repodir, 'checkout', '-f', '--detach', ref], check=True)
+        else:
+            print(f"Cloning {repo_path} {ref} as {repodir}")
+            # Clone the repository with gh
+            subprocess.run(['gh', 'repo', 'clone', repo_path, repodir], check=True)
+            # Checkout ref
+            subprocess.run(['git', '-C', repodir, 'checkout', '-f', '--detach', ref], check=True)
+
+        repo_list.append(repodir)
+
+        print(f"Binding in {repo_path} docs as {name}")
+
+        if docs_dest_path.exists():
+            shutil.rmtree(docs_dest_path)
+
+        shutil.copytree(repodir / 'docs', docs_dest_path)
+
+        # Replace :doc: references with :{name}: in all rst files
+        doc_files = []
+        for root, _, files in docs_dest_path.walk(on_error=print):
+            rst_files = filter(lambda f: (root / f).suffix == '.rst' , files)
+            for file in (root/f for f in rst_files):
+                try:
+                    content = file.read_text(encoding='utf-8')
+
+                    if ':doc:' in content:
+                        # Replace :doc: with :name:
+                        new_content = content.replace(':doc:', f':{name}:')
+                        file.write_text(new_content, encoding='utf-8')
+                        print(f"Updated references in {file}")
+                except (UnicodeDecodeError, IsADirectoryError):
+                    # Skip binary files or directories
+                    pass
+
+    # assemble a
+    print("Documentation copy completed successfully")
+
+    return repo_list