feat(config): add [chipflow.backend] passthrough to submission manifest

Free-form table copied verbatim into `manifest["backend"]` so the
backend can grow its own knobs (build_mode, etc.) without a
chipflow-lib release. Omitted from the manifest when empty.

Author: lanserge

chipflow/config/models.py

@@ -113,6 +113,10 @@ class ChipFlowConfig(BaseModel):
     software: SoftwareConfig = SoftwareConfig()
     clock_domains: Optional[List[str]] = None
     test: Optional[TestConfig] = None
+    # Free-form parameters copied verbatim into the submission manifest
+    # under `manifest["backend"]`. The backend defines and validates the
+    # schema; chipflow-lib treats this as an opaque pass-through.
+    backend: Dict[str, Any] = {}
 
 class Config(BaseModel):
     """Root configuration model for chipflow.toml."""

chipflow/platform/silicon_step.py

@@ -39,6 +39,7 @@ def _build_bundle_zip(
     process: str,
     package: str,
     macros: dict | None = None,
+    backend: dict | None = None,
 ) -> bytes:
     """Pack the submission into a single zip with a manifest.
 
@@ -78,6 +79,8 @@ def _build_bundle_zip(
         "design_file": design_arc,
         "pins_lock_file": pins_lock_arc,
     }
+    if backend:
+        manifest["backend"] = backend
 
     file_entries: list[tuple[str, Path]] = []  # (archive_path, real_path)
     if macros:
@@ -268,7 +271,8 @@ def submit(self, rtlil_path, args):
                 self.config.chipflow.project_name,
                 self.config.chipflow.silicon.process.value,
                 self.config.chipflow.silicon.package,
-                self.platform._macros)
+                self.platform._macros,
+                self.config.chipflow.backend or None)
 
             if args.dry_run:
                 sp.succeed(f"✅ Design `{data['projectId']}:{data['name']}` ready for submission to ChipFlow cloud!")

tests/test_silicon_submit.py

@@ -218,6 +218,37 @@ def test_uses_real_rtlil_filename(self):
                 manifest = json.loads(zf.read("manifest.json"))
                 self.assertEqual(manifest["design_file"], "weird_name.rtlil")
 
+    def test_backend_section_passthrough(self):
+        """Contents of [chipflow.backend] land verbatim under manifest.backend."""
+        with tempfile.TemporaryDirectory() as td:
+            rtlil_path = Path(td) / "top.il"
+            rtlil_path.write_text("x")
+            backend = {"build_mode": "synth_only", "knob": 42, "nested": {"a": 1}}
+            blob = _build_bundle_zip(
+                rtlil_path, "{}", "p", "sky130", "cf20",
+                backend=backend,
+            )
+            with zipfile.ZipFile(io.BytesIO(blob)) as zf:
+                manifest = json.loads(zf.read("manifest.json"))
+                self.assertEqual(manifest["backend"], backend)
+
+    def test_backend_omitted_when_empty(self):
+        """Empty/None backend → no `backend` key in manifest (clean default)."""
+        with tempfile.TemporaryDirectory() as td:
+            rtlil_path = Path(td) / "top.il"
+            rtlil_path.write_text("x")
+            blob = _build_bundle_zip(rtlil_path, "{}", "p", "sky130", "cf20")
+            with zipfile.ZipFile(io.BytesIO(blob)) as zf:
+                manifest = json.loads(zf.read("manifest.json"))
+                self.assertNotIn("backend", manifest)
+
+            blob = _build_bundle_zip(
+                rtlil_path, "{}", "p", "sky130", "cf20", backend={},
+            )
+            with zipfile.ZipFile(io.BytesIO(blob)) as zf:
+                manifest = json.loads(zf.read("manifest.json"))
+                self.assertNotIn("backend", manifest)
+
 
 class TestSiliconSubmitBundlePost(unittest.TestCase):
     """The submit() path posts a single 'bundle' multipart part."""