From 9ddc6aea4ce4c815773c4ec3d7a7d8a62156958f Mon Sep 17 00:00:00 2001
From: Yanglin Xun <68182718+FurryAcetylCoA@users.noreply.github.com>
Date: Mon, 22 Jan 2024 11:23:59 +0800
Subject: [PATCH] riscv,npc,trap: fix wrong register number

---
 am/src/riscv/npc/trap.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/am/src/riscv/npc/trap.S b/am/src/riscv/npc/trap.S
index 209b5b5..eb17aa3 100644
--- a/am/src/riscv/npc/trap.S
+++ b/am/src/riscv/npc/trap.S
@@ -31,7 +31,7 @@ f(30) f(31)
 #define PUSH(n) STORE concat(x, n), (n * XLEN)(sp);
 #define POP(n)  LOAD  concat(x, n), (n * XLEN)(sp);
 
-#define CONTEXT_SIZE  ((NR_REGS + 3 + 1) * XLEN)
+#define CONTEXT_SIZE  ((NR_REGS + 3) * XLEN)
 #define OFFSET_SP     ( 2 * XLEN)
 #define OFFSET_CAUSE  ((NR_REGS + 0) * XLEN)
 #define OFFSET_STATUS ((NR_REGS + 1) * XLEN)