From f42f8daa97a0314958b28506b486f1e40819c5cf Mon Sep 17 00:00:00 2001 From: pos Date: Mon, 21 Sep 2026 20:31:40 +0200 Subject: [PATCH] feat(fpga): add Rev A ECP5UM-45F P&R target --- fpga/rtl/Makefile | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/fpga/rtl/Makefile b/fpga/rtl/Makefile index 21fc371..b6db74f 100644 --- a/fpga/rtl/Makefile +++ b/fpga/rtl/Makefile @@ -1,7 +1,9 @@ BUILD_DIR ?= build TOP := retrocore_top +ECP5_DEVICE := 45k +ECP5_PACKAGE := CABGA381 -.PHONY: test synth clean +.PHONY: test synth reva-pnr reva-bitstream clean test: mkdir -p $(BUILD_DIR) @@ -12,7 +14,19 @@ synth: mkdir -p $(BUILD_DIR) yosys -p 'synth_ecp5 -top $(TOP) -json $(BUILD_DIR)/$(TOP).json' $(TOP).v -# A physical ECP5UM-45K bitstream target is intentionally deferred until -# the exact Rev A device/package and board constraints are frozen. +reva-pnr: synth + nextpnr-ecp5 --um5g-$(ECP5_DEVICE) --package $(ECP5_PACKAGE) \ + --json $(BUILD_DIR)/$(TOP).json \ + --textcfg $(BUILD_DIR)/$(TOP).config \ + --lpf-allow-unconstrained \ + --report $(BUILD_DIR)/$(TOP)-pnr.json + +reva-bitstream: reva-pnr + ecppack $(BUILD_DIR)/$(TOP).config $(BUILD_DIR)/$(TOP).bit + +# Rev A P&R currently permits unconstrained I/O deliberately. This qualifies +# the selected LFE5UM-45F/BG381 device/package and open-source implementation +# flow, not the final PCB pinout. Remove --lpf-allow-unconstrained when the +# Rev A LPF and FPGA bank/pin allocation are frozen. clean: rm -rf $(BUILD_DIR)