Contributions are welcome — new circuits, corrections to existing ones, tube models,
pipeline improvements. This project is community-driven by design and
curator-controlled in practice: anyone can propose, CI and maintainers gate what
merges, and only the pipeline assigns the verified badge.
Pull requests that break these are closed regardless of quality:
- Redraw from facts — never scan or trace. Your schematic must be independently drawn from the circuit's facts: component values, topology, published voltage charts, your own bench measurements. Reproducing or tracing factory drawings brings copyright exposure the project will not carry. Your PR includes an attestation checkbox for this.
- Circuit-number-first naming. Directory ids and titles use the circuit
designation (
5e3,jtm45,ab763). Maker and model names appear only descriptively in metadata (name_style: "Tweed Deluxe-style") — never in ids, filenames, or as standalone product names. - DCO sign-off. Every commit is signed off (
git commit -s), certifying you have the right to contribute the work under this repo's licenses (code MIT, circuit data CC-BY-SA 4.0, tube models CC0). See https://developercertificate.org/.
- Copy
amps/_template/toamps/<id>/and fill inmeta.yaml(schema:docs/schema.md). - Draw
schematic.kicad_sch(KiCad 8+, or generate it with apipeline/draw_<id>.pyscript usingpipeline/schematic_lib.py— how every current schematic is made). - Write
netlist.cirreferencing models inmodels/; addvoltages.yamlwith the published chart values you verified against, andbom.yamlkeyed to the schematic's reference designators. Values and designators followdocs/lettering-conventions.md— one convention per surface, and all of them gated: house units in the parts list (4.7 kΩ, never4,700 Ω), drafting shorthand on the schematic in your amp's declared idiom (conventions.notation), and a declared reference-designator scheme (conventions.designators) that must match the designators you actually used. - Optionally add
layout.yaml(seedocs/layout-schema.md) — a board layout with a wiring layer that CI proves electrically equivalent to your netlist. It renders in two styles from the one file; commit both (pipeline/render_layouts.pyandpipeline/render_layouts.py --style sheet) and look at both PNGs before you push. A layout also feeds the amp page's link-preview card, so regenerate and look at that too:pipeline/render_og.py <id>→site/public/og/<id>.png. - Open a PR. CI validates the metadata schema, cross-checks BOM↔schematic
designators, round-trips the schematic, simulates the operating point in ngspice
against your chart values, renders and lint-checks both layout drawings, and runs
the layout↔netlist equivalence gate. Run
python3 pipeline/check_value_consistency.pybefore you push: it reads every surface your part appears on and reports any two that state different quantities. - A maintainer reviews. Circuits land as
draft; theverifiedbadge requires the simulated operating point within tolerance of the published chart and maintainer sign-off.
New here — human or AI agent? Start with the site's
About page and this repo's AGENTS.md for the
binding conventions.
Not sure what to work on? Check the wanted circuits issue list, or open a correction if you spotted a value that does not match its source.
Small fixes (a wrong value, a missing lineage edge, prose errors) are the most valuable PRs we get — production variants and revision quirks live in this community's collective memory, and we want them captured as data. Cite your source (published chart, dated schematic revision, bench measurement) in the PR.
models/ accepts only freshly derived fits from published datasheet curves with the
method documented in the file header — see models/LICENSE.md for why. Never copy
models from existing collections.