diff --git a/Taskfile.yml b/Taskfile.yml index 59269fe..b3457d4 100644 --- a/Taskfile.yml +++ b/Taskfile.yml @@ -101,6 +101,9 @@ tasks: desc: Exports RTL from SpinalHDL/Chisel for the given ip. cmds: - "{{.CONTAINER_CHECK}}" + - task: lib-sbt-publishLocal + vars: + project: "modules/elements/vexiiriscv" - "{{.RUN}} 'IP_ROOT={{.PWD}}/sources/{{.ip}}/ sbt \"runMain digital.peripherals.io.gpio.GpioExport\"'" build: @@ -118,6 +121,9 @@ tasks: cmds: - "{{.CONTAINER_CHECK}}" - "{{.PDK_CHECK}}" + - task: lib-sbt-publishLocal + vars: + project: "modules/elements/vexiiriscv" - "{{.RUN}} '{{.ORFS_ENV}} && {{.ORFS}} {{if .stage}}{{.stage}}{{end}}'" - "{{.RUN}} '{{.ORFS_ENV}} && {{.ORFS}} generate_abstract'" - "{{.RUN}} '{{.ORFS_ENV}} && {{.ORFS}} {{.CDL}}'" diff --git a/exports/GpioExport.scala b/exports/GpioExport.scala index cdda97a..7c82bf6 100644 --- a/exports/GpioExport.scala +++ b/exports/GpioExport.scala @@ -7,7 +7,7 @@ package digital.peripherals.io.gpio import spinal.core._ import spinal.lib._ -import nafarr.peripherals.io.gpio.{Apb3Gpio, WishboneGpio, Gpio, GpioCtrl} +import nafarr.peripherals.io.gpio.{Apb3Gpio, TileLinkGpio, WishboneGpio, Gpio, GpioCtrl} object GpioExport { def main(args: Array[String]) { @@ -28,6 +28,17 @@ object GpioExport { controller.setDefinitionName("gpio_apb_32b") controller } + SpinalConfig( + noRandBoot = false, + targetDirectory = ipRoot + "verilog", + rtlHeader = rtlHeader, + headerWithRepoHash = false, + netlistFileName = "gpio_tl_32b.v" + ).generateVerilog { + val controller = TileLinkGpio(parameter32b) + controller.setDefinitionName("gpio_tl_32b") + controller + } SpinalConfig( noRandBoot = false, targetDirectory = ipRoot + "verilog", @@ -50,6 +61,17 @@ object GpioExport { controller.setDefinitionName("gpio_apb_32b") controller } + SpinalConfig( + noRandBoot = false, + targetDirectory = ipRoot + "vhdl", + rtlHeader = rtlHeader, + headerWithRepoHash = false, + netlistFileName = "gpio_tl_32b.vhd" + ).generateVhdl { + val controller = TileLinkGpio(parameter32b) + controller.setDefinitionName("gpio_tl_32b") + controller + } SpinalConfig( noRandBoot = false, targetDirectory = ipRoot + "vhdl", diff --git a/manifest.xml b/manifest.xml index 9a23e9d..78a8c39 100644 --- a/manifest.xml +++ b/manifest.xml @@ -11,9 +11,10 @@ SPDX-License-Identifier: CERN-OHL-W-2.0 - - + + + diff --git a/sources/digital/peripherals/io/gpio/README.md b/sources/digital/peripherals/io/gpio/README.md index b965b9e..3234c34 100644 --- a/sources/digital/peripherals/io/gpio/README.md +++ b/sources/digital/peripherals/io/gpio/README.md @@ -17,6 +17,7 @@ register map, port descriptions, and integration notes. | Macro | Interface | Width | |----------------|-----------|-------| | `gpio_apb_32b` | APB3 | 32 | +| `gpio_tl_32b` | TileLink | 32 | | `gpio_wb_32b` | Wishbone | 32 | ## PDK Support diff --git a/sources/digital/peripherals/io/gpio/blackbox/chisel/GpioTl.scala b/sources/digital/peripherals/io/gpio/blackbox/chisel/GpioTl.scala new file mode 100644 index 0000000..736d0b0 --- /dev/null +++ b/sources/digital/peripherals/io/gpio/blackbox/chisel/GpioTl.scala @@ -0,0 +1,45 @@ +// SPDX-FileCopyrightText: 2026 aesc silicon +// SPDX-License-Identifier: CERN-OHL-W-2.0 +// +// Chisel blackbox for gpio_tl_Nb. +// Use this class to instantiate the hardened macro in a Chisel design. +// +// Port names match the Verilog module exactly. The implicit Chisel clock and +// reset are not used; drive clk and reset explicitly from your clock domain. +// +// Example: +// val gpio = Module(new GpioTl(32)) // elaborates to gpio_tl_32b +// val gpio = Module(new GpioTl(64)) // elaborates to gpio_tl_64b + +import chisel3._ +import chisel3.experimental.ExtModule + +class GpioTl(width: Int = 32) extends ExtModule { + override def desiredName = s"gpio_tl_${width}b" + + val io_bus_a_valid = IO(Input(Bool())) + val io_bus_a_ready = IO(Output(Bool())) + val io_bus_a_payload_opcode = IO(Input(UInt(3.W))) + val io_bus_a_payload_param = IO(Input(UInt(3.W))) + val io_bus_a_payload_source = IO(Input(UInt(4.W))) + val io_bus_a_payload_address = IO(Input(UInt(12.W))) + val io_bus_a_payload_size = IO(Input(UInt(3.W))) + val io_bus_a_payload_mask = IO(Input(UInt(4.W))) + val io_bus_a_payload_data = IO(Input(UInt(32.W))) + val io_bus_a_payload_corrupt = IO(Input(Bool())) + val io_bus_d_valid = IO(Output(Bool())) + val io_bus_d_ready = IO(Input(Bool())) + val io_bus_d_payload_opcode = IO(Output(UInt(3.W))) + val io_bus_d_payload_param = IO(Output(UInt(3.W))) + val io_bus_d_payload_source = IO(Output(UInt(4.W))) + val io_bus_d_payload_size = IO(Output(UInt(3.W))) + val io_bus_d_payload_denied = IO(Output(Bool())) + val io_bus_d_payload_data = IO(Output(UInt(32.W))) + val io_bus_d_payload_corrupt = IO(Output(Bool())) + val io_gpio_pins_read = IO(Input(UInt(width.W))) + val io_gpio_pins_write = IO(Output(UInt(width.W))) + val io_gpio_pins_writeEnable = IO(Output(UInt(width.W))) + val io_interrupt = IO(Output(Bool())) + val clk = IO(Input(Clock())) + val reset = IO(Input(Bool())) +} diff --git a/sources/digital/peripherals/io/gpio/blackbox/spinalhdl/GpioTl.scala b/sources/digital/peripherals/io/gpio/blackbox/spinalhdl/GpioTl.scala new file mode 100644 index 0000000..f6006b1 --- /dev/null +++ b/sources/digital/peripherals/io/gpio/blackbox/spinalhdl/GpioTl.scala @@ -0,0 +1,58 @@ +// SPDX-FileCopyrightText: 2026 aesc silicon +// SPDX-License-Identifier: CERN-OHL-W-2.0 +// +// SpinalHDL blackbox for gpio_tl_Nb. +// Use this class to instantiate the hardened macro in a SpinalHDL design. +// +// Example: +// val gpio = new GpioTl(32) // elaborates to gpio_tl_32b +// val gpio = new GpioTl(64) // elaborates to gpio_tl_64b + +import spinal.core._ +import spinal.lib._ + +class GpioTl(width: Int = 32) extends BlackBox { + override def definitionName = s"gpio_tl_${width}b" + + val io = new Bundle { + val bus = new Bundle { + val a = new Bundle { + val valid = in Bool() + val ready = out Bool() + val payload = new Bundle { + val opcode = in Bits(3 bits) + val param = in Bits(3 bits) + val source = in Bits(4 bits) + val address = in Bits(12 bits) + val size = in Bits(3 bits) + val mask = in Bits(4 bits) + val data = in Bits(32 bits) + val corrupt = in Bool() + } + } + val d = new Bundle { + val valid = out Bool() + val ready = in Bool() + val payload = new Bundle { + val opcode = out Bits(3 bits) + val param = out Bits(3 bits) + val source = out Bits(4 bits) + val size = out Bits(3 bits) + val denied = out Bool() + val data = out Bits(32 bits) + val corrupt = out Bool() + } + } + } + val gpio = new Bundle { + val pins = new Bundle { + val read = in Bits(width bits) + val write = out Bits(width bits) + val writeEnable = out Bits(width bits) + } + } + val interrupt = out Bool() + } + + mapClockDomain(clock = clockDomain.clock, reset = clockDomain.reset) +} diff --git a/sources/digital/peripherals/io/gpio/blackbox/verilog/gpio_tl.v b/sources/digital/peripherals/io/gpio/blackbox/verilog/gpio_tl.v new file mode 100644 index 0000000..3e3049a --- /dev/null +++ b/sources/digital/peripherals/io/gpio/blackbox/verilog/gpio_tl.v @@ -0,0 +1,42 @@ +// SPDX-FileCopyrightText: 2026 aesc silicon +// SPDX-License-Identifier: CERN-OHL-W-2.0 +// +// Blackbox stub for gpio_tl_Nb. +// Use this file to instantiate the hardened macro in a Verilog design. +// The (* blackbox *) attribute is recognised by Yosys. +// +// Example: +// gpio_tl #(.WIDTH(32)) u_gpio (...) // instantiates gpio_tl_32b +// gpio_tl #(.WIDTH(64)) u_gpio (...) // instantiates gpio_tl_64b + +(* blackbox *) +module gpio_tl #( + parameter WIDTH = 32 +) ( + input wire io_bus_a_valid, + output wire io_bus_a_ready, + input wire [2:0] io_bus_a_payload_opcode, + input wire [2:0] io_bus_a_payload_param, + input wire [3:0] io_bus_a_payload_source, + input wire [11:0] io_bus_a_payload_address, + input wire [2:0] io_bus_a_payload_size, + input wire [3:0] io_bus_a_payload_mask, + input wire [31:0] io_bus_a_payload_data, + input wire io_bus_a_payload_corrupt, + output wire io_bus_d_valid, + input wire io_bus_d_ready, + output wire [2:0] io_bus_d_payload_opcode, + output wire [2:0] io_bus_d_payload_param, + output wire [3:0] io_bus_d_payload_source, + output wire [2:0] io_bus_d_payload_size, + output wire io_bus_d_payload_denied, + output wire [31:0] io_bus_d_payload_data, + output wire io_bus_d_payload_corrupt, + input wire [WIDTH-1:0] io_gpio_pins_read, + output wire [WIDTH-1:0] io_gpio_pins_write, + output wire [WIDTH-1:0] io_gpio_pins_writeEnable, + output wire io_interrupt, + input wire clk, + input wire reset +); +endmodule diff --git a/sources/digital/peripherals/io/gpio/blackbox/vhdl/gpio_tl.vhd b/sources/digital/peripherals/io/gpio/blackbox/vhdl/gpio_tl.vhd new file mode 100644 index 0000000..1d335d8 --- /dev/null +++ b/sources/digital/peripherals/io/gpio/blackbox/vhdl/gpio_tl.vhd @@ -0,0 +1,50 @@ +-- SPDX-FileCopyrightText: 2026 aesc silicon +-- SPDX-License-Identifier: CERN-OHL-W-2.0 +-- +-- Blackbox stub for gpio_tl_Nb. +-- Use this component declaration to instantiate the hardened macro in a +-- VHDL design. +-- +-- Example: +-- u_gpio : gpio_tl generic map (WIDTH => 32) port map (...); +-- u_gpio : gpio_tl generic map (WIDTH => 64) port map (...); + +library ieee; +use ieee.std_logic_1164.all; + +entity gpio_tl is + generic ( + WIDTH : integer := 32 + ); + port ( + io_bus_a_valid : in std_logic; + io_bus_a_ready : out std_logic; + io_bus_a_payload_opcode : in std_logic_vector(2 downto 0); + io_bus_a_payload_param : in std_logic_vector(2 downto 0); + io_bus_a_payload_source : in std_logic_vector(3 downto 0); + io_bus_a_payload_address : in std_logic_vector(11 downto 0); + io_bus_a_payload_size : in std_logic_vector(2 downto 0); + io_bus_a_payload_mask : in std_logic_vector(3 downto 0); + io_bus_a_payload_data : in std_logic_vector(31 downto 0); + io_bus_a_payload_corrupt : in std_logic; + io_bus_d_valid : out std_logic; + io_bus_d_ready : in std_logic; + io_bus_d_payload_opcode : out std_logic_vector(2 downto 0); + io_bus_d_payload_param : out std_logic_vector(2 downto 0); + io_bus_d_payload_source : out std_logic_vector(3 downto 0); + io_bus_d_payload_size : out std_logic_vector(2 downto 0); + io_bus_d_payload_denied : out std_logic; + io_bus_d_payload_data : out std_logic_vector(31 downto 0); + io_bus_d_payload_corrupt : out std_logic; + io_gpio_pins_read : in std_logic_vector(WIDTH-1 downto 0); + io_gpio_pins_write : out std_logic_vector(WIDTH-1 downto 0); + io_gpio_pins_writeEnable : out std_logic_vector(WIDTH-1 downto 0); + io_interrupt : out std_logic; + clk : in std_logic; + reset : in std_logic + ); +end entity gpio_tl; + +-- No architecture: this is a blackbox stub for integration with a +-- hardened macro. Bind the LEF/LIB views during synthesis and place +-- and route. diff --git a/sources/digital/peripherals/io/gpio/doc/gpio.md b/sources/digital/peripherals/io/gpio/doc/gpio.md index 2e11fc0..3913cfd 100644 --- a/sources/digital/peripherals/io/gpio/doc/gpio.md +++ b/sources/digital/peripherals/io/gpio/doc/gpio.md @@ -37,14 +37,12 @@ The core is generated by | Variant | Bus Interface | Data Width | Address Width | |-----------------|---------------|-----------|---------------| | `gpio_apb_32b` | APB3 | 32 bit | 12 bit | +| `gpio_tl_32b` | TileLink | 32 bit | 12 bit | | `gpio_wb_32b` | Wishbone | 32 bit | 10 bit | -Both variants implement the same register map and functionality. The only +All variants implement the same register map and functionality. The only difference is the bus interface used to access the registers. -> **Note:** `gpio_wb_32b` will be added in a future release. This document -> already describes the register map which is identical for both variants. - --- ## Port Description @@ -85,6 +83,89 @@ low, pin `n` is in high-impedance (input) state. --- +### `gpio_tl_32b` + +#### TileLink Bus Interface (TL-UL) + +##### Channel A (Request) + +| Signal | Direction | Width | Description | +|-------------------------------|-----------|-------|--------------------------------------------------| +| `io_bus_a_valid` | Input | 1 | Request valid | +| `io_bus_a_ready` | Output | 1 | Slave ready to accept request | +| `io_bus_a_payload_opcode` | Input | 3 | Operation type (Get, PutFullData, PutPartialData)| +| `io_bus_a_payload_param` | Input | 3 | Operation parameter | +| `io_bus_a_payload_source` | Input | 4 | Transaction source identifier | +| `io_bus_a_payload_address` | Input | 12 | Register address | +| `io_bus_a_payload_size` | Input | 3 | log2 of transfer size in bytes | +| `io_bus_a_payload_mask` | Input | 4 | Byte lane mask | +| `io_bus_a_payload_data` | Input | 32 | Write data | +| `io_bus_a_payload_corrupt` | Input | 1 | Data integrity error (tie low) | + +##### Channel D (Response) + +| Signal | Direction | Width | Description | +|-------------------------------|-----------|-------|--------------------------------------------------| +| `io_bus_d_valid` | Output | 1 | Response valid | +| `io_bus_d_ready` | Input | 1 | Master ready to accept response | +| `io_bus_d_payload_opcode` | Output | 3 | Response type (AccessAck, AccessAckData) | +| `io_bus_d_payload_param` | Output | 3 | Response parameter | +| `io_bus_d_payload_source` | Output | 4 | Transaction source identifier (echoed from A) | +| `io_bus_d_payload_size` | Output | 3 | log2 of transfer size in bytes (echoed from A) | +| `io_bus_d_payload_denied` | Output | 1 | Access denied | +| `io_bus_d_payload_data` | Output | 32 | Read data | +| `io_bus_d_payload_corrupt` | Output | 1 | Data integrity error | + +#### GPIO Pad Interface + +| Signal | Direction | Width | Description | +|-----------------------------|-----------|-------|----------------------------------------------------| +| `io_gpio_pins_read` | Input | 32 | Sampled pad values (driven by IO pads) | +| `io_gpio_pins_write` | Output | 32 | Output data driven to pads | +| `io_gpio_pins_writeEnable` | Output | 32 | Output enable per pin. Active-high by default. | + +#### Miscellaneous + +| Signal | Direction | Width | Description | +|-----------------|-----------|-------|------------------------------------------------| +| `clk` | Input | 1 | Clock (active rising edge) | +| `reset` | Input | 1 | Synchronous reset (active high) | +| `io_interrupt` | Output | 1 | Combined interrupt output (OR of all pending) | + +--- + +### `gpio_wb_32b` + +#### Wishbone Bus Interface (Classic, Pipelined) + +| Signal | Direction | Width | Description | +|-------------------|-----------|-------|--------------------------------------| +| `io_bus_CYC` | Input | 1 | Bus cycle active | +| `io_bus_STB` | Input | 1 | Strobe / transfer request | +| `io_bus_ACK` | Output | 1 | Transfer acknowledge | +| `io_bus_WE` | Input | 1 | Write enable: 1 = write, 0 = read | +| `io_bus_ADR` | Input | 10 | Word address | +| `io_bus_DAT_MISO` | Output | 32 | Read data (slave to master) | +| `io_bus_DAT_MOSI` | Input | 32 | Write data (master to slave) | + +#### GPIO Pad Interface + +| Signal | Direction | Width | Description | +|-----------------------------|-----------|-------|----------------------------------------------------| +| `io_gpio_pins_read` | Input | 32 | Sampled pad values (driven by IO pads) | +| `io_gpio_pins_write` | Output | 32 | Output data driven to pads | +| `io_gpio_pins_writeEnable` | Output | 32 | Output enable per pin. Active-high by default. | + +#### Miscellaneous + +| Signal | Direction | Width | Description | +|-----------------|-----------|-------|------------------------------------------------| +| `clk` | Input | 1 | Clock (active rising edge) | +| `reset` | Input | 1 | Synchronous reset (active high) | +| `io_interrupt` | Output | 1 | Combined interrupt output (OR of all pending) | + +--- + ## Register Map All registers are 32 bits wide. Unconnected bit positions read as `0`. diff --git a/sources/digital/peripherals/io/gpio/gf180mcuD/constraints/io/gpio_tl_32b.tcl b/sources/digital/peripherals/io/gpio/gf180mcuD/constraints/io/gpio_tl_32b.tcl new file mode 100644 index 0000000..38ba64f --- /dev/null +++ b/sources/digital/peripherals/io/gpio/gf180mcuD/constraints/io/gpio_tl_32b.tcl @@ -0,0 +1,213 @@ +# SPDX-FileCopyrightText: 2026 aesc silicon +# +# SPDX-License-Identifier: CERN-OHL-W-2.0 + +# Metal3 (HORIZONTAL) → left/right edge pins; Y positions from DB track grid +# Metal4 (VERTICAL) → top edge pins; X positions from DB track grid +# +# Left edge — layout bottom→top: +# d_payload_data[0..31] (7-track) | reset | clk | a_payload_data[0..31] (7-track) +# | Channel A ctrl+addr (3-track) | Channel D ctrl (3-track) +# clk lands at track 305 (y ≈ 171 µm) +# +# Data buses use 7-track spacing for signal integrity. +# Control/address signals use 3-track spacing to fit within the die height. +# +# Right edge — 7-track spacing, 14-track gaps between the three GPIO groups +# +# All shared state uses the :: namespace so procs reach it regardless of the +# scope in which OpenROAD sources this file. + +set block [ord::get_db_block] +set die [$block getDieArea] +set tech [ord::get_db_tech] +set ::dbu [$tech getDbUnitsPerMicron] + +set ::x_left [expr {double([$die xMin]) / $::dbu}] +set ::x_right [expr {double([$die xMax]) / $::dbu}] +set ::y_top [expr {double([$die yMax]) / $::dbu}] + +# Metal3 — horizontal layer → left/right edge pins +set m3_layer [$tech findLayer "Metal3"] +set ::m3_y_all [[$block findTrackGrid $m3_layer] getGridY] +set ::m3_pin_sz [expr {double([$m3_layer getMinWidth]) / $::dbu}] +# Pin length must satisfy the minimum metal area rule: area = width × length. +# Use max(pitch, minArea / minWidth) so the pin rectangle is always DRC-clean. +set m3_pitch [expr {double([$m3_layer getPitch]) / $::dbu}] +set m3_minarea [$m3_layer getArea] +set ::m3_pin_len [expr {max($m3_pitch, $m3_minarea / $::m3_pin_sz)}] + +# Metal4 — vertical layer → top edge pins +set m4_layer [$tech findLayer "Metal4"] +set ::m4_x_all [[$block findTrackGrid $m4_layer] getGridX] +set ::m4_pin_sz [expr {double([$m4_layer getMinWidth]) / $::dbu}] +set ::m4_pin_len [expr {double([$m4_layer getPitch]) / $::dbu}] + +# Y coordinate of the Nth Metal3 track (1-based) +proc m3_y {n} { + return [expr {double([lindex $::m3_y_all [expr {$n - 1}]]) / $::dbu}] +} + +# X coordinate of the Nth Metal4 track (1-based) +proc m4_x {n} { + return [expr {double([lindex $::m4_x_all [expr {$n - 1}]]) / $::dbu}] +} + +# Place a pin on the left die edge, extending inward by pin_len +proc place_left {pin_name track} { + place_pin -pin_name $pin_name \ + -layer Metal3 \ + -location [list [expr {$::x_left + $::m3_pin_len / 2}] [m3_y $track]] \ + -pin_size [list $::m3_pin_len $::m3_pin_sz] +} + +# Place a pin on the right die edge, extending inward by pin_len +proc place_right {pin_name track} { + place_pin -pin_name $pin_name \ + -layer Metal3 \ + -location [list [expr {$::x_right - $::m3_pin_len / 2}] [m3_y $track]] \ + -pin_size [list $::m3_pin_len $::m3_pin_sz] +} + +# Metal4 X track closest to die horizontal centre (for io_interrupt) +set cx [expr {([$die xMin] + [$die xMax]) / 2}] +set intr_i 0 +set intr_d [expr {abs([lindex $::m4_x_all 0] - $cx)}] +for {set i 1} {$i < [llength $::m4_x_all]} {incr i} { + set d [expr {abs([lindex $::m4_x_all $i] - $cx)}] + if {$d < $intr_d} { set intr_d $d; set intr_i $i } +} +set intr_x [expr {double([lindex $::m4_x_all $intr_i]) / $::dbu}] + +# ── Left edge — clk/reset at die vertical centre ───────────────────────────── +# +# Data buses: 7-track spacing +# Track 73..290 d_payload_data[0..31] (below clk) +# Track 297 reset +# Track 305 clk (y ≈ 171 µm) +# Track 312..529 a_payload_data[0..31] (above clk) +# +# Control/address: 3-track spacing +# Track 536..539 Channel A handshake (a_valid, a_ready) +# Track 542..548 a_payload_opcode[0..2] +# Track 551..557 a_payload_param[0..2] +# Track 560..569 a_payload_source[0..3] +# Track 572..605 a_payload_address[0..11] +# Track 608..614 a_payload_size[0..2] +# Track 617..626 a_payload_mask[0..3] +# Track 629 a_payload_corrupt +# Track 632..635 Channel D handshake (d_valid, d_ready) +# Track 638..644 d_payload_opcode[0..2] +# Track 647..653 d_payload_param[0..2] +# Track 656..665 d_payload_source[0..3] +# Track 668..674 d_payload_size[0..2] +# Track 677 d_payload_denied +# Track 680 d_payload_corrupt + +# d_payload_data[0..31] (tracks 73..290, 7-track spacing) +for {set i 0} {$i < 32} {incr i} { + place_left "io_bus_d_payload_data\[$i\]" [expr {73 + $i * 7}] +} + +# reset / clk +place_left reset 297 +place_left clk 305 + +# a_payload_data[0..31] (tracks 312..529, 7-track spacing) +for {set i 0} {$i < 32} {incr i} { + place_left "io_bus_a_payload_data\[$i\]" [expr {312 + $i * 7}] +} + +# Channel A handshake (tracks 536..539) +place_left io_bus_a_valid 536 +place_left io_bus_a_ready 539 + +# a_payload_opcode[0..2] (tracks 542..548) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_a_payload_opcode\[$i\]" [expr {542 + $i * 3}] +} + +# a_payload_param[0..2] (tracks 551..557) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_a_payload_param\[$i\]" [expr {551 + $i * 3}] +} + +# a_payload_source[0..3] (tracks 560..569) +for {set i 0} {$i < 4} {incr i} { + place_left "io_bus_a_payload_source\[$i\]" [expr {560 + $i * 3}] +} + +# a_payload_address[0..11] (tracks 572..605) +for {set i 0} {$i < 12} {incr i} { + place_left "io_bus_a_payload_address\[$i\]" [expr {572 + $i * 3}] +} + +# a_payload_size[0..2] (tracks 608..614) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_a_payload_size\[$i\]" [expr {608 + $i * 3}] +} + +# a_payload_mask[0..3] (tracks 617..626) +for {set i 0} {$i < 4} {incr i} { + place_left "io_bus_a_payload_mask\[$i\]" [expr {617 + $i * 3}] +} + +# a_payload_corrupt (track 629) +place_left io_bus_a_payload_corrupt 629 + +# Channel D handshake (tracks 632..635) +place_left io_bus_d_valid 632 +place_left io_bus_d_ready 635 + +# d_payload_opcode[0..2] (tracks 638..644) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_d_payload_opcode\[$i\]" [expr {638 + $i * 3}] +} + +# d_payload_param[0..2] (tracks 647..653) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_d_payload_param\[$i\]" [expr {647 + $i * 3}] +} + +# d_payload_source[0..3] (tracks 656..665) +for {set i 0} {$i < 4} {incr i} { + place_left "io_bus_d_payload_source\[$i\]" [expr {656 + $i * 3}] +} + +# d_payload_size[0..2] (tracks 668..674) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_d_payload_size\[$i\]" [expr {668 + $i * 3}] +} + +# d_payload_denied (track 677) +place_left io_bus_d_payload_denied 677 + +# d_payload_corrupt (track 680) +place_left io_bus_d_payload_corrupt 680 + +# ── Right edge — 7-track spacing, 14-track gaps between groups ─────────────── +# +# Track 49..266 io_gpio_pins_read[0..31] +# Track 280..497 io_gpio_pins_write[0..31] +# Track 511..728 io_gpio_pins_writeEnable[0..31] + +# io_gpio_pins_read[0..31] (tracks 49..266) +for {set i 0} {$i < 32} {incr i} { + place_right "io_gpio_pins_read\[$i\]" [expr {49 + $i * 7}] +} + +# io_gpio_pins_write[0..31] (tracks 280..497) +for {set i 0} {$i < 32} {incr i} { + place_right "io_gpio_pins_write\[$i\]" [expr {280 + $i * 7}] +} + +# io_gpio_pins_writeEnable[0..31] (tracks 511..728) +for {set i 0} {$i < 32} {incr i} { + place_right "io_gpio_pins_writeEnable\[$i\]" [expr {511 + $i * 7}] +} + +# ── Top edge — Metal4, track nearest to die centre ─────────────────────────── +place_pin -pin_name io_interrupt \ + -layer Metal4 \ + -location [list $intr_x [expr {$::y_top - $::m4_pin_len / 2}]] \ + -pin_size [list $::m4_pin_sz $::m4_pin_len] diff --git a/sources/digital/peripherals/io/gpio/gf180mcuD/flow/orfs/gpio_tl_32b/config.mk b/sources/digital/peripherals/io/gpio/gf180mcuD/flow/orfs/gpio_tl_32b/config.mk new file mode 100644 index 0000000..c4096b4 --- /dev/null +++ b/sources/digital/peripherals/io/gpio/gf180mcuD/flow/orfs/gpio_tl_32b/config.mk @@ -0,0 +1,29 @@ +# SPDX-FileCopyrightText: 2026 aesc silicon +# +# SPDX-License-Identifier: CERN-OHL-W-2.0 + +export DESIGN_NAME=gpio_tl_32b +export DESIGN_NICKNAME=gpio_tl_32b +export PLATFORM=gf180 +export VERILOG_FILES=${IP_ROOT}/rtl/verilog/gpio_tl_32b.v +export DIE_AREA = 0.0 0.0 277.20 426.16 +export CORE_AREA = 11.20 11.76 266.00 414.96 +export LEC_CHECK = 0 +export MAX_ROUTING_LAYER = Metal4 +export PLACE_DENSITY = 0.80 +export CORNERS = WC TT BC +export SDC_FILE=${IP_ROOT}/${PDK}/constraints/sdc/gpio_x_x.sdc +export PDN_TCL=${IP_ROOT}/${PDK}/constraints/pdn/gpio_x_32b.tcl +export IO_CONSTRAINTS=${IP_ROOT}/${PDK}/constraints/io/gpio_tl_32b.tcl +export CDL_FILE = $(PDK_ROOT)/${PDK}/libs.ref/gf180mcu_fd_sc_mcu7t5v0/cdl/gf180mcu_fd_sc_mcu7t5v0.cdl +export TRACK_OPTION = 7t +export TECH_LEF = $(PDK_ROOT)/${PDK}/libs.ref/gf180mcu_fd_sc_mcu7t5v0/techlef/gf180mcu_fd_sc_mcu7t5v0__nom.tlef +export SC_LEF = $(PDK_ROOT)/${PDK}/libs.ref/gf180mcu_fd_sc_mcu7t5v0/lef/gf180mcu_fd_sc_mcu7t5v0.lef +export BC_LIB_FILES = $(PDK_ROOT)/${PDK}/libs.ref/gf180mcu_fd_sc_mcu7t5v0/lib/gf180mcu_fd_sc_mcu7t5v0__ff_n40C_5v50.lib +export WC_LIB_FILES = $(PDK_ROOT)/${PDK}/libs.ref/gf180mcu_fd_sc_mcu7t5v0/lib/gf180mcu_fd_sc_mcu7t5v0__ss_125C_4v50.lib +export TT_LIB_FILES = $(PDK_ROOT)/${PDK}/libs.ref/gf180mcu_fd_sc_mcu7t5v0/lib/gf180mcu_fd_sc_mcu7t5v0__tt_025C_5v00.lib +export TT_LIB_FILES += $(ADDITIONAL_LIBS) +export WC_LIB_FILES += $(ADDITIONAL_SLOW_LIBS) +export BC_LIB_FILES += $(ADDITIONAL_FAST_LIBS) +export GDS_FILES = $(PDK_ROOT)/${PDK}/libs.ref/gf180mcu_fd_sc_mcu7t5v0/gds/gf180mcu_fd_sc_mcu7t5v0.gds +export GDS_FILES += $(ADDITIONAL_GDS) diff --git a/sources/digital/peripherals/io/gpio/gf180mcuD/flow/orfs/gpio_tl_32b/rules-base.json b/sources/digital/peripherals/io/gpio/gf180mcuD/flow/orfs/gpio_tl_32b/rules-base.json new file mode 100644 index 0000000..a2ce1b4 --- /dev/null +++ b/sources/digital/peripherals/io/gpio/gf180mcuD/flow/orfs/gpio_tl_32b/rules-base.json @@ -0,0 +1,102 @@ +{ + "synth__design__instance__area__stdcell": { + "value": 83700.0, + "compare": "<=" + }, + "constraints__clocks__count": { + "value": 1, + "compare": "==" + }, + "placeopt__design__instance__area": { + "value": 90174, + "compare": "<=" + }, + "placeopt__design__instance__count__stdcell": { + "value": 2510, + "compare": "<=" + }, + "detailedplace__design__violations": { + "value": 0, + "compare": "==" + }, + "cts__design__instance__count__setup_buffer": { + "value": 218, + "compare": "<=" + }, + "cts__design__instance__count__hold_buffer": { + "value": 218, + "compare": "<=" + }, + "cts__timing__setup__ws": { + "value": -1.0, + "compare": ">=" + }, + "cts__timing__setup__tns": { + "value": -4.0, + "compare": ">=" + }, + "cts__timing__hold__ws": { + "value": -1.0, + "compare": ">=" + }, + "cts__timing__hold__tns": { + "value": -4.0, + "compare": ">=" + }, + "globalroute__antenna_diodes_count": { + "value": 100, + "compare": "<=" + }, + "globalroute__timing__setup__ws": { + "value": -1.0, + "compare": ">=" + }, + "globalroute__timing__setup__tns": { + "value": -4.0, + "compare": ">=" + }, + "globalroute__timing__hold__ws": { + "value": -1.0, + "compare": ">=" + }, + "globalroute__timing__hold__tns": { + "value": -4.0, + "compare": ">=" + }, + "detailedroute__route__wirelength": { + "value": 161158, + "compare": "<=" + }, + "detailedroute__route__drc_errors": { + "value": 0, + "compare": "<=" + }, + "detailedroute__antenna__violating__nets": { + "value": 0, + "compare": "<=" + }, + "detailedroute__antenna_diodes_count": { + "value": 100, + "compare": "<=" + }, + "finish__timing__setup__ws": { + "value": -1.0, + "compare": ">=" + }, + "finish__timing__setup__tns": { + "value": -4.0, + "compare": ">=" + }, + "finish__timing__hold__ws": { + "value": -1.0, + "compare": ">=" + }, + "finish__timing__hold__tns": { + "value": -4.0, + "compare": ">=" + }, + "finish__design__instance__area": { + "value": 94451, + "compare": "<=" + } +} \ No newline at end of file diff --git a/sources/digital/peripherals/io/gpio/ihp-sg13g2/constraints/io/gpio_tl_32b.tcl b/sources/digital/peripherals/io/gpio/ihp-sg13g2/constraints/io/gpio_tl_32b.tcl new file mode 100644 index 0000000..3d3ba39 --- /dev/null +++ b/sources/digital/peripherals/io/gpio/ihp-sg13g2/constraints/io/gpio_tl_32b.tcl @@ -0,0 +1,215 @@ +# SPDX-FileCopyrightText: 2026 aesc silicon +# +# SPDX-License-Identifier: CERN-OHL-W-2.0 + +# Metal2 (HORIZONTAL) → left/right edge pins; Y positions from DB track grid +# Metal3 (VERTICAL) → top edge pins; X positions from DB track grid +# +# Left edge — layout bottom→top: +# d_payload_data[0..31] (7-track) | reset | clk | a_payload_data[0..31] (7-track) +# | Channel A ctrl+addr (3-track) | Channel D ctrl (3-track) +# Shifted 30 µm (71 tracks) downward vs APB/WB to centre the full left-edge +# pin block on the die height (midpoint ≈ track 411 ≈ 172 µm = die centre). +# clk lands at track 339 (y ≈ 142 µm). +# +# Data buses use 7-track spacing for signal integrity. +# Control/address signals use 3-track spacing to fit within the die height. +# +# Right edge — 7-track spacing, 14-track gaps between the three GPIO groups +# +# All shared state uses the :: namespace so procs reach it regardless of the +# scope in which OpenROAD sources this file. + +set block [ord::get_db_block] +set die [$block getDieArea] +set tech [ord::get_db_tech] +set ::dbu [$tech getDbUnitsPerMicron] + +set ::x_left [expr {double([$die xMin]) / $::dbu}] +set ::x_right [expr {double([$die xMax]) / $::dbu}] +set ::y_top [expr {double([$die yMax]) / $::dbu}] + +# Metal2 — horizontal layer → left/right edge pins +set m2_layer [$tech findLayer "Metal2"] +set ::m2_y_all [[$block findTrackGrid $m2_layer] getGridY] +set ::m2_pin_sz [expr {double([$m2_layer getMinWidth]) / $::dbu}] +# Pin length must satisfy the minimum metal area rule: area = width × length. +# Use max(pitch, minArea / minWidth) so the pin rectangle is always DRC-clean. +set m2_pitch [expr {double([$m2_layer getPitch]) / $::dbu}] +set m2_minarea [$m2_layer getArea] +set ::m2_pin_len [expr {max($m2_pitch, $m2_minarea / $::m2_pin_sz)}] + +# Metal3 — vertical layer → top edge pins +set m3_layer [$tech findLayer "Metal3"] +set ::m3_x_all [[$block findTrackGrid $m3_layer] getGridX] +set ::m3_pin_sz [expr {double([$m3_layer getMinWidth]) / $::dbu}] +set ::m3_pin_len [expr {double([$m3_layer getPitch]) / $::dbu}] + +# Y coordinate of the Nth Metal2 track (1-based) +proc m2_y {n} { + return [expr {double([lindex $::m2_y_all [expr {$n - 1}]]) / $::dbu}] +} + +# X coordinate of the Nth Metal3 track (1-based) +proc m3_x {n} { + return [expr {double([lindex $::m3_x_all [expr {$n - 1}]]) / $::dbu}] +} + +# Place a pin on the left die edge, extending inward by pin_len +proc place_left {pin_name track} { + place_pin -pin_name $pin_name \ + -layer Metal2 \ + -location [list [expr {$::x_left + $::m2_pin_len / 2}] [m2_y $track]] \ + -pin_size [list $::m2_pin_len $::m2_pin_sz] +} + +# Place a pin on the right die edge, extending inward by pin_len +proc place_right {pin_name track} { + place_pin -pin_name $pin_name \ + -layer Metal2 \ + -location [list [expr {$::x_right - $::m2_pin_len / 2}] [m2_y $track]] \ + -pin_size [list $::m2_pin_len $::m2_pin_sz] +} + +# Metal3 X track closest to die horizontal centre (for io_interrupt) +set cx [expr {([$die xMin] + [$die xMax]) / 2}] +set intr_i 0 +set intr_d [expr {abs([lindex $::m3_x_all 0] - $cx)}] +for {set i 1} {$i < [llength $::m3_x_all]} {incr i} { + set d [expr {abs([lindex $::m3_x_all $i] - $cx)}] + if {$d < $intr_d} { set intr_d $d; set intr_i $i } +} +set intr_x [expr {double([lindex $::m3_x_all $intr_i]) / $::dbu}] + +# ── Left edge — clk/reset at die vertical centre ───────────────────────────── +# +# Data buses: 7-track spacing +# Track 108..325 d_payload_data[0..31] (below clk) +# Track 332 reset +# Track 339 clk (y ≈ 142 µm) +# Track 346..563 a_payload_data[0..31] (above clk) +# +# Control/address: 3-track spacing +# Track 570..573 Channel A handshake (a_valid, a_ready) +# Track 576..582 a_payload_opcode[0..2] +# Track 585..591 a_payload_param[0..2] +# Track 594..603 a_payload_source[0..3] +# Track 606..639 a_payload_address[0..11] +# Track 642..648 a_payload_size[0..2] +# Track 651..660 a_payload_mask[0..3] +# Track 663 a_payload_corrupt +# Track 666..669 Channel D handshake (d_valid, d_ready) +# Track 672..678 d_payload_opcode[0..2] +# Track 681..687 d_payload_param[0..2] +# Track 690..699 d_payload_source[0..3] +# Track 702..708 d_payload_size[0..2] +# Track 711 d_payload_denied +# Track 714 d_payload_corrupt + +# d_payload_data[0..31] (tracks 108..325, 7-track spacing) +for {set i 0} {$i < 32} {incr i} { + place_left "io_bus_d_payload_data\[$i\]" [expr {108 + $i * 7}] +} + +# reset / clk +place_left reset 332 +place_left clk 339 + +# a_payload_data[0..31] (tracks 346..563, 7-track spacing) +for {set i 0} {$i < 32} {incr i} { + place_left "io_bus_a_payload_data\[$i\]" [expr {346 + $i * 7}] +} + +# Channel A handshake (tracks 570..573) +place_left io_bus_a_valid 570 +place_left io_bus_a_ready 573 + +# a_payload_opcode[0..2] (tracks 576..582) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_a_payload_opcode\[$i\]" [expr {576 + $i * 3}] +} + +# a_payload_param[0..2] (tracks 585..591) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_a_payload_param\[$i\]" [expr {585 + $i * 3}] +} + +# a_payload_source[0..3] (tracks 594..603) +for {set i 0} {$i < 4} {incr i} { + place_left "io_bus_a_payload_source\[$i\]" [expr {594 + $i * 3}] +} + +# a_payload_address[0..11] (tracks 606..639) +for {set i 0} {$i < 12} {incr i} { + place_left "io_bus_a_payload_address\[$i\]" [expr {606 + $i * 3}] +} + +# a_payload_size[0..2] (tracks 642..648) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_a_payload_size\[$i\]" [expr {642 + $i * 3}] +} + +# a_payload_mask[0..3] (tracks 651..660) +for {set i 0} {$i < 4} {incr i} { + place_left "io_bus_a_payload_mask\[$i\]" [expr {651 + $i * 3}] +} + +# a_payload_corrupt (track 663) +place_left io_bus_a_payload_corrupt 663 + +# Channel D handshake (tracks 666..669) +place_left io_bus_d_valid 666 +place_left io_bus_d_ready 669 + +# d_payload_opcode[0..2] (tracks 672..678) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_d_payload_opcode\[$i\]" [expr {672 + $i * 3}] +} + +# d_payload_param[0..2] (tracks 681..687) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_d_payload_param\[$i\]" [expr {681 + $i * 3}] +} + +# d_payload_source[0..3] (tracks 690..699) +for {set i 0} {$i < 4} {incr i} { + place_left "io_bus_d_payload_source\[$i\]" [expr {690 + $i * 3}] +} + +# d_payload_size[0..2] (tracks 702..708) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_d_payload_size\[$i\]" [expr {702 + $i * 3}] +} + +# d_payload_denied (track 711) +place_left io_bus_d_payload_denied 711 + +# d_payload_corrupt (track 714) +place_left io_bus_d_payload_corrupt 714 + +# ── Right edge — 7-track spacing, 14-track gaps between groups ─────────────── +# +# Track 71..288 io_gpio_pins_read[0..31] +# Track 302..519 io_gpio_pins_write[0..31] +# Track 533..750 io_gpio_pins_writeEnable[0..31] + +# io_gpio_pins_read[0..31] (tracks 71..288) +for {set i 0} {$i < 32} {incr i} { + place_right "io_gpio_pins_read\[$i\]" [expr {71 + $i * 7}] +} + +# io_gpio_pins_write[0..31] (tracks 302..519) +for {set i 0} {$i < 32} {incr i} { + place_right "io_gpio_pins_write\[$i\]" [expr {302 + $i * 7}] +} + +# io_gpio_pins_writeEnable[0..31] (tracks 533..750) +for {set i 0} {$i < 32} {incr i} { + place_right "io_gpio_pins_writeEnable\[$i\]" [expr {533 + $i * 7}] +} + +# ── Top edge — Metal3, track nearest to die centre ─────────────────────────── +place_pin -pin_name io_interrupt \ + -layer Metal3 \ + -location [list $intr_x [expr {$::y_top - $::m3_pin_len / 2}]] \ + -pin_size [list $::m3_pin_sz $::m3_pin_len] diff --git a/sources/digital/peripherals/io/gpio/ihp-sg13g2/flow/orfs/gpio_tl_32b/config.mk b/sources/digital/peripherals/io/gpio/ihp-sg13g2/flow/orfs/gpio_tl_32b/config.mk new file mode 100644 index 0000000..91cb639 --- /dev/null +++ b/sources/digital/peripherals/io/gpio/ihp-sg13g2/flow/orfs/gpio_tl_32b/config.mk @@ -0,0 +1,29 @@ +# SPDX-FileCopyrightText: 2026 aesc silicon +# +# SPDX-License-Identifier: CERN-OHL-W-2.0 + +export DESIGN_NAME=gpio_tl_32b +export DESIGN_NICKNAME=gpio_tl_32b +export PLATFORM=ihp-sg13g2 +export VERILOG_FILES=${IP_ROOT}/rtl/verilog/gpio_tl_32b.v +export DIE_AREA = 0.0 0.0 180.48 343.98 +export CORE_AREA = 11.52 11.34 168.96 332.64 +export LEC_CHECK = 0 +export MAX_ROUTING_LAYER = Metal5 +export PLACE_DENSITY = 0.80 +export CORNERS = slow typ fast +export SDC_FILE=${IP_ROOT}/${PDK}/constraints/sdc/gpio_x_x.sdc +export PDN_TCL=${IP_ROOT}/${PDK}/constraints/pdn/gpio_x_32b.tcl +export IO_CONSTRAINTS=${IP_ROOT}/${PDK}/constraints/io/gpio_tl_32b.tcl +export KLAYOUT_LVS_FILE = $(PDK_ROOT)/ihp-sg13g2/libs.tech/klayout/tech/lvs/sg13g2.lvs +export LOAD_ADDITIONAL_FILES = 0 +export TECH_LEF = $(PDK_ROOT)/ihp-sg13g2/libs.ref/sg13g2_stdcell/lef/sg13g2_tech.lef +export SC_LEF = $(PDK_ROOT)/ihp-sg13g2/libs.ref/sg13g2_stdcell/lef/sg13g2_stdcell.lef +export TYP_LIB_FILES = $(PDK_ROOT)/ihp-sg13g2/libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_typ_1p20V_25C.lib +export SLOW_LIB_FILES = $(PDK_ROOT)/ihp-sg13g2/libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_slow_1p08V_125C.lib +export FAST_LIB_FILES = $(PDK_ROOT)/ihp-sg13g2/libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_fast_1p32V_m40C.lib +export TYP_LIB_FILES += $(ADDITIONAL_LIBS) +export SLOW_LIB_FILES += $(ADDITIONAL_SLOW_LIBS) +export FAST_LIB_FILES += $(ADDITIONAL_FAST_LIBS) +export GDS_FILES = $(PDK_ROOT)/ihp-sg13g2/libs.ref/sg13g2_stdcell/gds/sg13g2_stdcell.gds +export GDS_FILES += $(ADDITIONAL_GDS) diff --git a/sources/digital/peripherals/io/gpio/ihp-sg13g2/flow/orfs/gpio_tl_32b/rules-base.json b/sources/digital/peripherals/io/gpio/ihp-sg13g2/flow/orfs/gpio_tl_32b/rules-base.json new file mode 100644 index 0000000..a460d2b --- /dev/null +++ b/sources/digital/peripherals/io/gpio/ihp-sg13g2/flow/orfs/gpio_tl_32b/rules-base.json @@ -0,0 +1,102 @@ +{ + "synth__design__instance__area__stdcell": { + "value": 43500.0, + "compare": "<=" + }, + "constraints__clocks__count": { + "value": 1, + "compare": "==" + }, + "placeopt__design__instance__area": { + "value": 44882, + "compare": "<=" + }, + "placeopt__design__instance__count__stdcell": { + "value": 2512, + "compare": "<=" + }, + "detailedplace__design__violations": { + "value": 0, + "compare": "==" + }, + "cts__design__instance__count__setup_buffer": { + "value": 218, + "compare": "<=" + }, + "cts__design__instance__count__hold_buffer": { + "value": 218, + "compare": "<=" + }, + "cts__timing__setup__ws": { + "value": -1.0, + "compare": ">=" + }, + "cts__timing__setup__tns": { + "value": -4.0, + "compare": ">=" + }, + "cts__timing__hold__ws": { + "value": -1.0, + "compare": ">=" + }, + "cts__timing__hold__tns": { + "value": -4.0, + "compare": ">=" + }, + "globalroute__antenna_diodes_count": { + "value": 100, + "compare": "<=" + }, + "globalroute__timing__setup__ws": { + "value": -1.0, + "compare": ">=" + }, + "globalroute__timing__setup__tns": { + "value": -4.0, + "compare": ">=" + }, + "globalroute__timing__hold__ws": { + "value": -1.0, + "compare": ">=" + }, + "globalroute__timing__hold__tns": { + "value": -4.0, + "compare": ">=" + }, + "detailedroute__route__wirelength": { + "value": 114942, + "compare": "<=" + }, + "detailedroute__route__drc_errors": { + "value": 0, + "compare": "<=" + }, + "detailedroute__antenna__violating__nets": { + "value": 0, + "compare": "<=" + }, + "detailedroute__antenna_diodes_count": { + "value": 100, + "compare": "<=" + }, + "finish__timing__setup__ws": { + "value": -1.0, + "compare": ">=" + }, + "finish__timing__setup__tns": { + "value": -4.0, + "compare": ">=" + }, + "finish__timing__hold__ws": { + "value": -1.0, + "compare": ">=" + }, + "finish__timing__hold__tns": { + "value": -4.0, + "compare": ">=" + }, + "finish__design__instance__area": { + "value": 46977, + "compare": "<=" + } +} \ No newline at end of file diff --git a/sources/digital/peripherals/io/gpio/rtl/verilog/gpio_tl_32b.v b/sources/digital/peripherals/io/gpio/rtl/verilog/gpio_tl_32b.v new file mode 100644 index 0000000..c43e0ae --- /dev/null +++ b/sources/digital/peripherals/io/gpio/rtl/verilog/gpio_tl_32b.v @@ -0,0 +1,1194 @@ +// Generator : SpinalHDL v1.14.2 git head : 78f29dc66110fc099a777992b6daa2f803ab445e +// Component : gpio_tl_32b +// SPDX-FileCopyrightText: 2026 aesc silicon +// +// SPDX-License-Identifier: CERN-OHL-W-2.0 + +`timescale 1ns/1ps + +module gpio_tl_32b ( + input wire io_bus_a_valid, + output wire io_bus_a_ready, + input wire [2:0] io_bus_a_payload_opcode, + input wire [2:0] io_bus_a_payload_param, + input wire [3:0] io_bus_a_payload_source, + input wire [11:0] io_bus_a_payload_address, + input wire [2:0] io_bus_a_payload_size, + input wire [3:0] io_bus_a_payload_mask, + input wire [31:0] io_bus_a_payload_data, + input wire io_bus_a_payload_corrupt, + output wire io_bus_d_valid, + input wire io_bus_d_ready, + output wire [2:0] io_bus_d_payload_opcode, + output wire [2:0] io_bus_d_payload_param, + output wire [3:0] io_bus_d_payload_source, + output wire [2:0] io_bus_d_payload_size, + output wire io_bus_d_payload_denied, + output wire [31:0] io_bus_d_payload_data, + output wire io_bus_d_payload_corrupt, + input wire [31:0] io_gpio_pins_read, + output wire [31:0] io_gpio_pins_write, + output wire [31:0] io_gpio_pins_writeEnable, + output wire io_interrupt, + input wire clk, + input wire reset +); + localparam A_PUT_FULL_DATA = 3'd0; + localparam A_PUT_PARTIAL_DATA = 3'd1; + localparam A_GET = 3'd4; + localparam A_ACQUIRE_BLOCK = 3'd6; + localparam A_ACQUIRE_PERM = 3'd7; + localparam D_ACCESS_ACK = 3'd0; + localparam D_ACCESS_ACK_DATA = 3'd1; + localparam D_GRANT = 3'd4; + localparam D_GRANT_DATA = 3'd5; + localparam D_RELEASE_ACK = 3'd6; + + reg [31:0] ctrl_io_config_write; + reg [31:0] ctrl_io_config_direction; + reg [31:0] ctrl_io_irqHigh_pending; + reg [31:0] ctrl_io_irqLow_pending; + reg [31:0] ctrl_io_irqRise_pending; + reg [31:0] ctrl_io_irqFall_pending; + reg [31:0] interruptCtrl_4_io_inputs; + reg [31:0] interruptCtrl_4_io_clears; + reg [31:0] interruptCtrl_5_io_inputs; + reg [31:0] interruptCtrl_5_io_clears; + reg [31:0] interruptCtrl_6_io_inputs; + reg [31:0] interruptCtrl_6_io_clears; + reg [31:0] interruptCtrl_7_io_inputs; + reg [31:0] interruptCtrl_7_io_clears; + wire [31:0] ctrl_io_gpio_pins_write; + wire [31:0] ctrl_io_gpio_pins_writeEnable; + wire [31:0] ctrl_io_value; + wire ctrl_io_interrupt; + wire [31:0] ctrl_io_irqHigh_valid; + wire [31:0] ctrl_io_irqLow_valid; + wire [31:0] ctrl_io_irqRise_valid; + wire [31:0] ctrl_io_irqFall_valid; + wire [31:0] mapper_idCtrl_io_header; + wire [31:0] mapper_idCtrl_io_version; + wire [31:0] interruptCtrl_4_io_pendings; + wire [31:0] interruptCtrl_5_io_pendings; + wire [31:0] interruptCtrl_6_io_pendings; + wire [31:0] interruptCtrl_7_io_pendings; + wire [11:0] _zz_3; + wire [9:0] _zz_4; + reg _zz_io_bus_a_ready; + wire [2:0] _zz_io_bus_d_payload_opcode; + reg [31:0] _zz_io_bus_d_payload_data; + wire _zz_1; + wire _zz_2; + wire _zz_io_bus_a_ready_1; + reg [31:0] io_masks_driver; + reg [31:0] io_masks_driver_1; + reg [31:0] io_masks_driver_2; + reg [31:0] io_masks_driver_3; + reg _zz_io_config_write; + reg _zz_io_config_direction; + reg _zz_io_config_write_1; + reg _zz_io_config_direction_1; + reg _zz_io_config_write_2; + reg _zz_io_config_direction_2; + reg _zz_io_config_write_3; + reg _zz_io_config_direction_3; + reg _zz_io_config_write_4; + reg _zz_io_config_direction_4; + reg _zz_io_config_write_5; + reg _zz_io_config_direction_5; + reg _zz_io_config_write_6; + reg _zz_io_config_direction_6; + reg _zz_io_config_write_7; + reg _zz_io_config_direction_7; + reg _zz_io_config_write_8; + reg _zz_io_config_direction_8; + reg _zz_io_config_write_9; + reg _zz_io_config_direction_9; + reg _zz_io_config_write_10; + reg _zz_io_config_direction_10; + reg _zz_io_config_write_11; + reg _zz_io_config_direction_11; + reg _zz_io_config_write_12; + reg _zz_io_config_direction_12; + reg _zz_io_config_write_13; + reg _zz_io_config_direction_13; + reg _zz_io_config_write_14; + reg _zz_io_config_direction_14; + reg _zz_io_config_write_15; + reg _zz_io_config_direction_15; + reg _zz_io_config_write_16; + reg _zz_io_config_direction_16; + reg _zz_io_config_write_17; + reg _zz_io_config_direction_17; + reg _zz_io_config_write_18; + reg _zz_io_config_direction_18; + reg _zz_io_config_write_19; + reg _zz_io_config_direction_19; + reg _zz_io_config_write_20; + reg _zz_io_config_direction_20; + reg _zz_io_config_write_21; + reg _zz_io_config_direction_21; + reg _zz_io_config_write_22; + reg _zz_io_config_direction_22; + reg _zz_io_config_write_23; + reg _zz_io_config_direction_23; + reg _zz_io_config_write_24; + reg _zz_io_config_direction_24; + reg _zz_io_config_write_25; + reg _zz_io_config_direction_25; + reg _zz_io_config_write_26; + reg _zz_io_config_direction_26; + reg _zz_io_config_write_27; + reg _zz_io_config_direction_27; + reg _zz_io_config_write_28; + reg _zz_io_config_direction_28; + reg _zz_io_config_write_29; + reg _zz_io_config_direction_29; + reg _zz_io_config_write_30; + reg _zz_io_config_direction_30; + reg _zz_io_config_write_31; + reg _zz_io_config_direction_31; + wire [2:0] _zz_io_bus_d_payload_opcode_1; + wire _zz_io_bus_d_valid; + wire [2:0] _zz_io_bus_d_payload_opcode_2; + reg _zz_io_bus_d_valid_1; + reg [2:0] _zz_io_bus_d_payload_opcode_3; + reg [2:0] _zz_io_bus_d_payload_param; + reg [3:0] _zz_io_bus_d_payload_source; + reg [2:0] _zz_io_bus_d_payload_size; + reg _zz_io_bus_d_payload_denied; + reg [31:0] _zz_io_bus_d_payload_data_1; + reg _zz_io_bus_d_payload_corrupt; + wire when_Stream_l477; + `ifndef SYNTHESIS + reg [127:0] io_bus_a_payload_opcode_string; + reg [119:0] io_bus_d_payload_opcode_string; + reg [119:0] _zz_io_bus_d_payload_opcode_string; + reg [119:0] _zz_io_bus_d_payload_opcode_1_string; + reg [119:0] _zz_io_bus_d_payload_opcode_2_string; + reg [119:0] _zz_io_bus_d_payload_opcode_3_string; + `endif + + + assign _zz_3 = ({2'd0,_zz_4} <<< 2'd2); + assign _zz_4 = (io_bus_a_payload_address >>> 2'd2); + GpioCtrl ctrl ( + .io_gpio_pins_read (io_gpio_pins_read[31:0] ), //i + .io_gpio_pins_write (ctrl_io_gpio_pins_write[31:0] ), //o + .io_gpio_pins_writeEnable (ctrl_io_gpio_pins_writeEnable[31:0]), //o + .io_config_write (ctrl_io_config_write[31:0] ), //i + .io_config_direction (ctrl_io_config_direction[31:0] ), //i + .io_value (ctrl_io_value[31:0] ), //o + .io_interrupt (ctrl_io_interrupt ), //o + .io_irqHigh_valid (ctrl_io_irqHigh_valid[31:0] ), //o + .io_irqHigh_pending (ctrl_io_irqHigh_pending[31:0] ), //i + .io_irqLow_valid (ctrl_io_irqLow_valid[31:0] ), //o + .io_irqLow_pending (ctrl_io_irqLow_pending[31:0] ), //i + .io_irqRise_valid (ctrl_io_irqRise_valid[31:0] ), //o + .io_irqRise_pending (ctrl_io_irqRise_pending[31:0] ), //i + .io_irqFall_valid (ctrl_io_irqFall_valid[31:0] ), //o + .io_irqFall_pending (ctrl_io_irqFall_pending[31:0] ), //i + .clk (clk ), //i + .reset (reset ) //i + ); + IpIdentificationCtrl mapper_idCtrl ( + .io_header (mapper_idCtrl_io_header[31:0] ), //o + .io_version (mapper_idCtrl_io_version[31:0]), //o + .clk (clk ), //i + .reset (reset ) //i + ); + InterruptCtrl interruptCtrl_4 ( + .io_inputs (interruptCtrl_4_io_inputs[31:0] ), //i + .io_clears (interruptCtrl_4_io_clears[31:0] ), //i + .io_masks (io_masks_driver[31:0] ), //i + .io_pendings (interruptCtrl_4_io_pendings[31:0]), //o + .clk (clk ), //i + .reset (reset ) //i + ); + InterruptCtrl interruptCtrl_5 ( + .io_inputs (interruptCtrl_5_io_inputs[31:0] ), //i + .io_clears (interruptCtrl_5_io_clears[31:0] ), //i + .io_masks (io_masks_driver_1[31:0] ), //i + .io_pendings (interruptCtrl_5_io_pendings[31:0]), //o + .clk (clk ), //i + .reset (reset ) //i + ); + InterruptCtrl interruptCtrl_6 ( + .io_inputs (interruptCtrl_6_io_inputs[31:0] ), //i + .io_clears (interruptCtrl_6_io_clears[31:0] ), //i + .io_masks (io_masks_driver_2[31:0] ), //i + .io_pendings (interruptCtrl_6_io_pendings[31:0]), //o + .clk (clk ), //i + .reset (reset ) //i + ); + InterruptCtrl interruptCtrl_7 ( + .io_inputs (interruptCtrl_7_io_inputs[31:0] ), //i + .io_clears (interruptCtrl_7_io_clears[31:0] ), //i + .io_masks (io_masks_driver_3[31:0] ), //i + .io_pendings (interruptCtrl_7_io_pendings[31:0]), //o + .clk (clk ), //i + .reset (reset ) //i + ); + `ifndef SYNTHESIS + always @(*) begin + case(io_bus_a_payload_opcode) + A_PUT_FULL_DATA : io_bus_a_payload_opcode_string = "PUT_FULL_DATA "; + A_PUT_PARTIAL_DATA : io_bus_a_payload_opcode_string = "PUT_PARTIAL_DATA"; + A_GET : io_bus_a_payload_opcode_string = "GET "; + A_ACQUIRE_BLOCK : io_bus_a_payload_opcode_string = "ACQUIRE_BLOCK "; + A_ACQUIRE_PERM : io_bus_a_payload_opcode_string = "ACQUIRE_PERM "; + default : io_bus_a_payload_opcode_string = "????????????????"; + endcase + end + always @(*) begin + case(io_bus_d_payload_opcode) + D_ACCESS_ACK : io_bus_d_payload_opcode_string = "ACCESS_ACK "; + D_ACCESS_ACK_DATA : io_bus_d_payload_opcode_string = "ACCESS_ACK_DATA"; + D_GRANT : io_bus_d_payload_opcode_string = "GRANT "; + D_GRANT_DATA : io_bus_d_payload_opcode_string = "GRANT_DATA "; + D_RELEASE_ACK : io_bus_d_payload_opcode_string = "RELEASE_ACK "; + default : io_bus_d_payload_opcode_string = "???????????????"; + endcase + end + always @(*) begin + case(_zz_io_bus_d_payload_opcode) + D_ACCESS_ACK : _zz_io_bus_d_payload_opcode_string = "ACCESS_ACK "; + D_ACCESS_ACK_DATA : _zz_io_bus_d_payload_opcode_string = "ACCESS_ACK_DATA"; + D_GRANT : _zz_io_bus_d_payload_opcode_string = "GRANT "; + D_GRANT_DATA : _zz_io_bus_d_payload_opcode_string = "GRANT_DATA "; + D_RELEASE_ACK : _zz_io_bus_d_payload_opcode_string = "RELEASE_ACK "; + default : _zz_io_bus_d_payload_opcode_string = "???????????????"; + endcase + end + always @(*) begin + case(_zz_io_bus_d_payload_opcode_1) + D_ACCESS_ACK : _zz_io_bus_d_payload_opcode_1_string = "ACCESS_ACK "; + D_ACCESS_ACK_DATA : _zz_io_bus_d_payload_opcode_1_string = "ACCESS_ACK_DATA"; + D_GRANT : _zz_io_bus_d_payload_opcode_1_string = "GRANT "; + D_GRANT_DATA : _zz_io_bus_d_payload_opcode_1_string = "GRANT_DATA "; + D_RELEASE_ACK : _zz_io_bus_d_payload_opcode_1_string = "RELEASE_ACK "; + default : _zz_io_bus_d_payload_opcode_1_string = "???????????????"; + endcase + end + always @(*) begin + case(_zz_io_bus_d_payload_opcode_2) + D_ACCESS_ACK : _zz_io_bus_d_payload_opcode_2_string = "ACCESS_ACK "; + D_ACCESS_ACK_DATA : _zz_io_bus_d_payload_opcode_2_string = "ACCESS_ACK_DATA"; + D_GRANT : _zz_io_bus_d_payload_opcode_2_string = "GRANT "; + D_GRANT_DATA : _zz_io_bus_d_payload_opcode_2_string = "GRANT_DATA "; + D_RELEASE_ACK : _zz_io_bus_d_payload_opcode_2_string = "RELEASE_ACK "; + default : _zz_io_bus_d_payload_opcode_2_string = "???????????????"; + endcase + end + always @(*) begin + case(_zz_io_bus_d_payload_opcode_3) + D_ACCESS_ACK : _zz_io_bus_d_payload_opcode_3_string = "ACCESS_ACK "; + D_ACCESS_ACK_DATA : _zz_io_bus_d_payload_opcode_3_string = "ACCESS_ACK_DATA"; + D_GRANT : _zz_io_bus_d_payload_opcode_3_string = "GRANT "; + D_GRANT_DATA : _zz_io_bus_d_payload_opcode_3_string = "GRANT_DATA "; + D_RELEASE_ACK : _zz_io_bus_d_payload_opcode_3_string = "RELEASE_ACK "; + default : _zz_io_bus_d_payload_opcode_3_string = "???????????????"; + endcase + end + `endif + + assign io_gpio_pins_write = ctrl_io_gpio_pins_write; + assign io_gpio_pins_writeEnable = ctrl_io_gpio_pins_writeEnable; + assign io_interrupt = ctrl_io_interrupt; + assign _zz_1 = (io_bus_a_valid && (|{(io_bus_a_payload_opcode == A_PUT_PARTIAL_DATA),(io_bus_a_payload_opcode == A_PUT_FULL_DATA)})); + assign _zz_2 = (_zz_1 && io_bus_a_ready); + assign _zz_io_bus_a_ready_1 = 1'b0; + always @(*) begin + interruptCtrl_4_io_clears = 32'h0; + case(_zz_3) + 12'h018 : begin + if(_zz_2) begin + interruptCtrl_4_io_clears = io_bus_a_payload_data[31 : 0]; + end + end + default : begin + end + endcase + end + + always @(*) begin + interruptCtrl_5_io_clears = 32'h0; + case(_zz_3) + 12'h020 : begin + if(_zz_2) begin + interruptCtrl_5_io_clears = io_bus_a_payload_data[31 : 0]; + end + end + default : begin + end + endcase + end + + always @(*) begin + interruptCtrl_6_io_clears = 32'h0; + case(_zz_3) + 12'h028 : begin + if(_zz_2) begin + interruptCtrl_6_io_clears = io_bus_a_payload_data[31 : 0]; + end + end + default : begin + end + endcase + end + + always @(*) begin + interruptCtrl_7_io_clears = 32'h0; + case(_zz_3) + 12'h030 : begin + if(_zz_2) begin + interruptCtrl_7_io_clears = io_bus_a_payload_data[31 : 0]; + end + end + default : begin + end + endcase + end + + always @(*) begin + ctrl_io_config_write[0] = _zz_io_config_write; + ctrl_io_config_write[1] = _zz_io_config_write_1; + ctrl_io_config_write[2] = _zz_io_config_write_2; + ctrl_io_config_write[3] = _zz_io_config_write_3; + ctrl_io_config_write[4] = _zz_io_config_write_4; + ctrl_io_config_write[5] = _zz_io_config_write_5; + ctrl_io_config_write[6] = _zz_io_config_write_6; + ctrl_io_config_write[7] = _zz_io_config_write_7; + ctrl_io_config_write[8] = _zz_io_config_write_8; + ctrl_io_config_write[9] = _zz_io_config_write_9; + ctrl_io_config_write[10] = _zz_io_config_write_10; + ctrl_io_config_write[11] = _zz_io_config_write_11; + ctrl_io_config_write[12] = _zz_io_config_write_12; + ctrl_io_config_write[13] = _zz_io_config_write_13; + ctrl_io_config_write[14] = _zz_io_config_write_14; + ctrl_io_config_write[15] = _zz_io_config_write_15; + ctrl_io_config_write[16] = _zz_io_config_write_16; + ctrl_io_config_write[17] = _zz_io_config_write_17; + ctrl_io_config_write[18] = _zz_io_config_write_18; + ctrl_io_config_write[19] = _zz_io_config_write_19; + ctrl_io_config_write[20] = _zz_io_config_write_20; + ctrl_io_config_write[21] = _zz_io_config_write_21; + ctrl_io_config_write[22] = _zz_io_config_write_22; + ctrl_io_config_write[23] = _zz_io_config_write_23; + ctrl_io_config_write[24] = _zz_io_config_write_24; + ctrl_io_config_write[25] = _zz_io_config_write_25; + ctrl_io_config_write[26] = _zz_io_config_write_26; + ctrl_io_config_write[27] = _zz_io_config_write_27; + ctrl_io_config_write[28] = _zz_io_config_write_28; + ctrl_io_config_write[29] = _zz_io_config_write_29; + ctrl_io_config_write[30] = _zz_io_config_write_30; + ctrl_io_config_write[31] = _zz_io_config_write_31; + end + + always @(*) begin + ctrl_io_config_direction[0] = _zz_io_config_direction; + ctrl_io_config_direction[1] = _zz_io_config_direction_1; + ctrl_io_config_direction[2] = _zz_io_config_direction_2; + ctrl_io_config_direction[3] = _zz_io_config_direction_3; + ctrl_io_config_direction[4] = _zz_io_config_direction_4; + ctrl_io_config_direction[5] = _zz_io_config_direction_5; + ctrl_io_config_direction[6] = _zz_io_config_direction_6; + ctrl_io_config_direction[7] = _zz_io_config_direction_7; + ctrl_io_config_direction[8] = _zz_io_config_direction_8; + ctrl_io_config_direction[9] = _zz_io_config_direction_9; + ctrl_io_config_direction[10] = _zz_io_config_direction_10; + ctrl_io_config_direction[11] = _zz_io_config_direction_11; + ctrl_io_config_direction[12] = _zz_io_config_direction_12; + ctrl_io_config_direction[13] = _zz_io_config_direction_13; + ctrl_io_config_direction[14] = _zz_io_config_direction_14; + ctrl_io_config_direction[15] = _zz_io_config_direction_15; + ctrl_io_config_direction[16] = _zz_io_config_direction_16; + ctrl_io_config_direction[17] = _zz_io_config_direction_17; + ctrl_io_config_direction[18] = _zz_io_config_direction_18; + ctrl_io_config_direction[19] = _zz_io_config_direction_19; + ctrl_io_config_direction[20] = _zz_io_config_direction_20; + ctrl_io_config_direction[21] = _zz_io_config_direction_21; + ctrl_io_config_direction[22] = _zz_io_config_direction_22; + ctrl_io_config_direction[23] = _zz_io_config_direction_23; + ctrl_io_config_direction[24] = _zz_io_config_direction_24; + ctrl_io_config_direction[25] = _zz_io_config_direction_25; + ctrl_io_config_direction[26] = _zz_io_config_direction_26; + ctrl_io_config_direction[27] = _zz_io_config_direction_27; + ctrl_io_config_direction[28] = _zz_io_config_direction_28; + ctrl_io_config_direction[29] = _zz_io_config_direction_29; + ctrl_io_config_direction[30] = _zz_io_config_direction_30; + ctrl_io_config_direction[31] = _zz_io_config_direction_31; + end + + always @(*) begin + interruptCtrl_4_io_inputs[0] = ctrl_io_irqHigh_valid[0]; + interruptCtrl_4_io_inputs[1] = ctrl_io_irqHigh_valid[1]; + interruptCtrl_4_io_inputs[2] = ctrl_io_irqHigh_valid[2]; + interruptCtrl_4_io_inputs[3] = ctrl_io_irqHigh_valid[3]; + interruptCtrl_4_io_inputs[4] = ctrl_io_irqHigh_valid[4]; + interruptCtrl_4_io_inputs[5] = ctrl_io_irqHigh_valid[5]; + interruptCtrl_4_io_inputs[6] = ctrl_io_irqHigh_valid[6]; + interruptCtrl_4_io_inputs[7] = ctrl_io_irqHigh_valid[7]; + interruptCtrl_4_io_inputs[8] = ctrl_io_irqHigh_valid[8]; + interruptCtrl_4_io_inputs[9] = ctrl_io_irqHigh_valid[9]; + interruptCtrl_4_io_inputs[10] = ctrl_io_irqHigh_valid[10]; + interruptCtrl_4_io_inputs[11] = ctrl_io_irqHigh_valid[11]; + interruptCtrl_4_io_inputs[12] = ctrl_io_irqHigh_valid[12]; + interruptCtrl_4_io_inputs[13] = ctrl_io_irqHigh_valid[13]; + interruptCtrl_4_io_inputs[14] = ctrl_io_irqHigh_valid[14]; + interruptCtrl_4_io_inputs[15] = ctrl_io_irqHigh_valid[15]; + interruptCtrl_4_io_inputs[16] = ctrl_io_irqHigh_valid[16]; + interruptCtrl_4_io_inputs[17] = ctrl_io_irqHigh_valid[17]; + interruptCtrl_4_io_inputs[18] = ctrl_io_irqHigh_valid[18]; + interruptCtrl_4_io_inputs[19] = ctrl_io_irqHigh_valid[19]; + interruptCtrl_4_io_inputs[20] = ctrl_io_irqHigh_valid[20]; + interruptCtrl_4_io_inputs[21] = ctrl_io_irqHigh_valid[21]; + interruptCtrl_4_io_inputs[22] = ctrl_io_irqHigh_valid[22]; + interruptCtrl_4_io_inputs[23] = ctrl_io_irqHigh_valid[23]; + interruptCtrl_4_io_inputs[24] = ctrl_io_irqHigh_valid[24]; + interruptCtrl_4_io_inputs[25] = ctrl_io_irqHigh_valid[25]; + interruptCtrl_4_io_inputs[26] = ctrl_io_irqHigh_valid[26]; + interruptCtrl_4_io_inputs[27] = ctrl_io_irqHigh_valid[27]; + interruptCtrl_4_io_inputs[28] = ctrl_io_irqHigh_valid[28]; + interruptCtrl_4_io_inputs[29] = ctrl_io_irqHigh_valid[29]; + interruptCtrl_4_io_inputs[30] = ctrl_io_irqHigh_valid[30]; + interruptCtrl_4_io_inputs[31] = ctrl_io_irqHigh_valid[31]; + end + + always @(*) begin + interruptCtrl_5_io_inputs[0] = ctrl_io_irqLow_valid[0]; + interruptCtrl_5_io_inputs[1] = ctrl_io_irqLow_valid[1]; + interruptCtrl_5_io_inputs[2] = ctrl_io_irqLow_valid[2]; + interruptCtrl_5_io_inputs[3] = ctrl_io_irqLow_valid[3]; + interruptCtrl_5_io_inputs[4] = ctrl_io_irqLow_valid[4]; + interruptCtrl_5_io_inputs[5] = ctrl_io_irqLow_valid[5]; + interruptCtrl_5_io_inputs[6] = ctrl_io_irqLow_valid[6]; + interruptCtrl_5_io_inputs[7] = ctrl_io_irqLow_valid[7]; + interruptCtrl_5_io_inputs[8] = ctrl_io_irqLow_valid[8]; + interruptCtrl_5_io_inputs[9] = ctrl_io_irqLow_valid[9]; + interruptCtrl_5_io_inputs[10] = ctrl_io_irqLow_valid[10]; + interruptCtrl_5_io_inputs[11] = ctrl_io_irqLow_valid[11]; + interruptCtrl_5_io_inputs[12] = ctrl_io_irqLow_valid[12]; + interruptCtrl_5_io_inputs[13] = ctrl_io_irqLow_valid[13]; + interruptCtrl_5_io_inputs[14] = ctrl_io_irqLow_valid[14]; + interruptCtrl_5_io_inputs[15] = ctrl_io_irqLow_valid[15]; + interruptCtrl_5_io_inputs[16] = ctrl_io_irqLow_valid[16]; + interruptCtrl_5_io_inputs[17] = ctrl_io_irqLow_valid[17]; + interruptCtrl_5_io_inputs[18] = ctrl_io_irqLow_valid[18]; + interruptCtrl_5_io_inputs[19] = ctrl_io_irqLow_valid[19]; + interruptCtrl_5_io_inputs[20] = ctrl_io_irqLow_valid[20]; + interruptCtrl_5_io_inputs[21] = ctrl_io_irqLow_valid[21]; + interruptCtrl_5_io_inputs[22] = ctrl_io_irqLow_valid[22]; + interruptCtrl_5_io_inputs[23] = ctrl_io_irqLow_valid[23]; + interruptCtrl_5_io_inputs[24] = ctrl_io_irqLow_valid[24]; + interruptCtrl_5_io_inputs[25] = ctrl_io_irqLow_valid[25]; + interruptCtrl_5_io_inputs[26] = ctrl_io_irqLow_valid[26]; + interruptCtrl_5_io_inputs[27] = ctrl_io_irqLow_valid[27]; + interruptCtrl_5_io_inputs[28] = ctrl_io_irqLow_valid[28]; + interruptCtrl_5_io_inputs[29] = ctrl_io_irqLow_valid[29]; + interruptCtrl_5_io_inputs[30] = ctrl_io_irqLow_valid[30]; + interruptCtrl_5_io_inputs[31] = ctrl_io_irqLow_valid[31]; + end + + always @(*) begin + interruptCtrl_6_io_inputs[0] = ctrl_io_irqRise_valid[0]; + interruptCtrl_6_io_inputs[1] = ctrl_io_irqRise_valid[1]; + interruptCtrl_6_io_inputs[2] = ctrl_io_irqRise_valid[2]; + interruptCtrl_6_io_inputs[3] = ctrl_io_irqRise_valid[3]; + interruptCtrl_6_io_inputs[4] = ctrl_io_irqRise_valid[4]; + interruptCtrl_6_io_inputs[5] = ctrl_io_irqRise_valid[5]; + interruptCtrl_6_io_inputs[6] = ctrl_io_irqRise_valid[6]; + interruptCtrl_6_io_inputs[7] = ctrl_io_irqRise_valid[7]; + interruptCtrl_6_io_inputs[8] = ctrl_io_irqRise_valid[8]; + interruptCtrl_6_io_inputs[9] = ctrl_io_irqRise_valid[9]; + interruptCtrl_6_io_inputs[10] = ctrl_io_irqRise_valid[10]; + interruptCtrl_6_io_inputs[11] = ctrl_io_irqRise_valid[11]; + interruptCtrl_6_io_inputs[12] = ctrl_io_irqRise_valid[12]; + interruptCtrl_6_io_inputs[13] = ctrl_io_irqRise_valid[13]; + interruptCtrl_6_io_inputs[14] = ctrl_io_irqRise_valid[14]; + interruptCtrl_6_io_inputs[15] = ctrl_io_irqRise_valid[15]; + interruptCtrl_6_io_inputs[16] = ctrl_io_irqRise_valid[16]; + interruptCtrl_6_io_inputs[17] = ctrl_io_irqRise_valid[17]; + interruptCtrl_6_io_inputs[18] = ctrl_io_irqRise_valid[18]; + interruptCtrl_6_io_inputs[19] = ctrl_io_irqRise_valid[19]; + interruptCtrl_6_io_inputs[20] = ctrl_io_irqRise_valid[20]; + interruptCtrl_6_io_inputs[21] = ctrl_io_irqRise_valid[21]; + interruptCtrl_6_io_inputs[22] = ctrl_io_irqRise_valid[22]; + interruptCtrl_6_io_inputs[23] = ctrl_io_irqRise_valid[23]; + interruptCtrl_6_io_inputs[24] = ctrl_io_irqRise_valid[24]; + interruptCtrl_6_io_inputs[25] = ctrl_io_irqRise_valid[25]; + interruptCtrl_6_io_inputs[26] = ctrl_io_irqRise_valid[26]; + interruptCtrl_6_io_inputs[27] = ctrl_io_irqRise_valid[27]; + interruptCtrl_6_io_inputs[28] = ctrl_io_irqRise_valid[28]; + interruptCtrl_6_io_inputs[29] = ctrl_io_irqRise_valid[29]; + interruptCtrl_6_io_inputs[30] = ctrl_io_irqRise_valid[30]; + interruptCtrl_6_io_inputs[31] = ctrl_io_irqRise_valid[31]; + end + + always @(*) begin + interruptCtrl_7_io_inputs[0] = ctrl_io_irqFall_valid[0]; + interruptCtrl_7_io_inputs[1] = ctrl_io_irqFall_valid[1]; + interruptCtrl_7_io_inputs[2] = ctrl_io_irqFall_valid[2]; + interruptCtrl_7_io_inputs[3] = ctrl_io_irqFall_valid[3]; + interruptCtrl_7_io_inputs[4] = ctrl_io_irqFall_valid[4]; + interruptCtrl_7_io_inputs[5] = ctrl_io_irqFall_valid[5]; + interruptCtrl_7_io_inputs[6] = ctrl_io_irqFall_valid[6]; + interruptCtrl_7_io_inputs[7] = ctrl_io_irqFall_valid[7]; + interruptCtrl_7_io_inputs[8] = ctrl_io_irqFall_valid[8]; + interruptCtrl_7_io_inputs[9] = ctrl_io_irqFall_valid[9]; + interruptCtrl_7_io_inputs[10] = ctrl_io_irqFall_valid[10]; + interruptCtrl_7_io_inputs[11] = ctrl_io_irqFall_valid[11]; + interruptCtrl_7_io_inputs[12] = ctrl_io_irqFall_valid[12]; + interruptCtrl_7_io_inputs[13] = ctrl_io_irqFall_valid[13]; + interruptCtrl_7_io_inputs[14] = ctrl_io_irqFall_valid[14]; + interruptCtrl_7_io_inputs[15] = ctrl_io_irqFall_valid[15]; + interruptCtrl_7_io_inputs[16] = ctrl_io_irqFall_valid[16]; + interruptCtrl_7_io_inputs[17] = ctrl_io_irqFall_valid[17]; + interruptCtrl_7_io_inputs[18] = ctrl_io_irqFall_valid[18]; + interruptCtrl_7_io_inputs[19] = ctrl_io_irqFall_valid[19]; + interruptCtrl_7_io_inputs[20] = ctrl_io_irqFall_valid[20]; + interruptCtrl_7_io_inputs[21] = ctrl_io_irqFall_valid[21]; + interruptCtrl_7_io_inputs[22] = ctrl_io_irqFall_valid[22]; + interruptCtrl_7_io_inputs[23] = ctrl_io_irqFall_valid[23]; + interruptCtrl_7_io_inputs[24] = ctrl_io_irqFall_valid[24]; + interruptCtrl_7_io_inputs[25] = ctrl_io_irqFall_valid[25]; + interruptCtrl_7_io_inputs[26] = ctrl_io_irqFall_valid[26]; + interruptCtrl_7_io_inputs[27] = ctrl_io_irqFall_valid[27]; + interruptCtrl_7_io_inputs[28] = ctrl_io_irqFall_valid[28]; + interruptCtrl_7_io_inputs[29] = ctrl_io_irqFall_valid[29]; + interruptCtrl_7_io_inputs[30] = ctrl_io_irqFall_valid[30]; + interruptCtrl_7_io_inputs[31] = ctrl_io_irqFall_valid[31]; + end + + always @(*) begin + ctrl_io_irqHigh_pending[0] = interruptCtrl_4_io_pendings[0]; + ctrl_io_irqHigh_pending[1] = interruptCtrl_4_io_pendings[1]; + ctrl_io_irqHigh_pending[2] = interruptCtrl_4_io_pendings[2]; + ctrl_io_irqHigh_pending[3] = interruptCtrl_4_io_pendings[3]; + ctrl_io_irqHigh_pending[4] = interruptCtrl_4_io_pendings[4]; + ctrl_io_irqHigh_pending[5] = interruptCtrl_4_io_pendings[5]; + ctrl_io_irqHigh_pending[6] = interruptCtrl_4_io_pendings[6]; + ctrl_io_irqHigh_pending[7] = interruptCtrl_4_io_pendings[7]; + ctrl_io_irqHigh_pending[8] = interruptCtrl_4_io_pendings[8]; + ctrl_io_irqHigh_pending[9] = interruptCtrl_4_io_pendings[9]; + ctrl_io_irqHigh_pending[10] = interruptCtrl_4_io_pendings[10]; + ctrl_io_irqHigh_pending[11] = interruptCtrl_4_io_pendings[11]; + ctrl_io_irqHigh_pending[12] = interruptCtrl_4_io_pendings[12]; + ctrl_io_irqHigh_pending[13] = interruptCtrl_4_io_pendings[13]; + ctrl_io_irqHigh_pending[14] = interruptCtrl_4_io_pendings[14]; + ctrl_io_irqHigh_pending[15] = interruptCtrl_4_io_pendings[15]; + ctrl_io_irqHigh_pending[16] = interruptCtrl_4_io_pendings[16]; + ctrl_io_irqHigh_pending[17] = interruptCtrl_4_io_pendings[17]; + ctrl_io_irqHigh_pending[18] = interruptCtrl_4_io_pendings[18]; + ctrl_io_irqHigh_pending[19] = interruptCtrl_4_io_pendings[19]; + ctrl_io_irqHigh_pending[20] = interruptCtrl_4_io_pendings[20]; + ctrl_io_irqHigh_pending[21] = interruptCtrl_4_io_pendings[21]; + ctrl_io_irqHigh_pending[22] = interruptCtrl_4_io_pendings[22]; + ctrl_io_irqHigh_pending[23] = interruptCtrl_4_io_pendings[23]; + ctrl_io_irqHigh_pending[24] = interruptCtrl_4_io_pendings[24]; + ctrl_io_irqHigh_pending[25] = interruptCtrl_4_io_pendings[25]; + ctrl_io_irqHigh_pending[26] = interruptCtrl_4_io_pendings[26]; + ctrl_io_irqHigh_pending[27] = interruptCtrl_4_io_pendings[27]; + ctrl_io_irqHigh_pending[28] = interruptCtrl_4_io_pendings[28]; + ctrl_io_irqHigh_pending[29] = interruptCtrl_4_io_pendings[29]; + ctrl_io_irqHigh_pending[30] = interruptCtrl_4_io_pendings[30]; + ctrl_io_irqHigh_pending[31] = interruptCtrl_4_io_pendings[31]; + end + + always @(*) begin + ctrl_io_irqLow_pending[0] = interruptCtrl_5_io_pendings[0]; + ctrl_io_irqLow_pending[1] = interruptCtrl_5_io_pendings[1]; + ctrl_io_irqLow_pending[2] = interruptCtrl_5_io_pendings[2]; + ctrl_io_irqLow_pending[3] = interruptCtrl_5_io_pendings[3]; + ctrl_io_irqLow_pending[4] = interruptCtrl_5_io_pendings[4]; + ctrl_io_irqLow_pending[5] = interruptCtrl_5_io_pendings[5]; + ctrl_io_irqLow_pending[6] = interruptCtrl_5_io_pendings[6]; + ctrl_io_irqLow_pending[7] = interruptCtrl_5_io_pendings[7]; + ctrl_io_irqLow_pending[8] = interruptCtrl_5_io_pendings[8]; + ctrl_io_irqLow_pending[9] = interruptCtrl_5_io_pendings[9]; + ctrl_io_irqLow_pending[10] = interruptCtrl_5_io_pendings[10]; + ctrl_io_irqLow_pending[11] = interruptCtrl_5_io_pendings[11]; + ctrl_io_irqLow_pending[12] = interruptCtrl_5_io_pendings[12]; + ctrl_io_irqLow_pending[13] = interruptCtrl_5_io_pendings[13]; + ctrl_io_irqLow_pending[14] = interruptCtrl_5_io_pendings[14]; + ctrl_io_irqLow_pending[15] = interruptCtrl_5_io_pendings[15]; + ctrl_io_irqLow_pending[16] = interruptCtrl_5_io_pendings[16]; + ctrl_io_irqLow_pending[17] = interruptCtrl_5_io_pendings[17]; + ctrl_io_irqLow_pending[18] = interruptCtrl_5_io_pendings[18]; + ctrl_io_irqLow_pending[19] = interruptCtrl_5_io_pendings[19]; + ctrl_io_irqLow_pending[20] = interruptCtrl_5_io_pendings[20]; + ctrl_io_irqLow_pending[21] = interruptCtrl_5_io_pendings[21]; + ctrl_io_irqLow_pending[22] = interruptCtrl_5_io_pendings[22]; + ctrl_io_irqLow_pending[23] = interruptCtrl_5_io_pendings[23]; + ctrl_io_irqLow_pending[24] = interruptCtrl_5_io_pendings[24]; + ctrl_io_irqLow_pending[25] = interruptCtrl_5_io_pendings[25]; + ctrl_io_irqLow_pending[26] = interruptCtrl_5_io_pendings[26]; + ctrl_io_irqLow_pending[27] = interruptCtrl_5_io_pendings[27]; + ctrl_io_irqLow_pending[28] = interruptCtrl_5_io_pendings[28]; + ctrl_io_irqLow_pending[29] = interruptCtrl_5_io_pendings[29]; + ctrl_io_irqLow_pending[30] = interruptCtrl_5_io_pendings[30]; + ctrl_io_irqLow_pending[31] = interruptCtrl_5_io_pendings[31]; + end + + always @(*) begin + ctrl_io_irqRise_pending[0] = interruptCtrl_6_io_pendings[0]; + ctrl_io_irqRise_pending[1] = interruptCtrl_6_io_pendings[1]; + ctrl_io_irqRise_pending[2] = interruptCtrl_6_io_pendings[2]; + ctrl_io_irqRise_pending[3] = interruptCtrl_6_io_pendings[3]; + ctrl_io_irqRise_pending[4] = interruptCtrl_6_io_pendings[4]; + ctrl_io_irqRise_pending[5] = interruptCtrl_6_io_pendings[5]; + ctrl_io_irqRise_pending[6] = interruptCtrl_6_io_pendings[6]; + ctrl_io_irqRise_pending[7] = interruptCtrl_6_io_pendings[7]; + ctrl_io_irqRise_pending[8] = interruptCtrl_6_io_pendings[8]; + ctrl_io_irqRise_pending[9] = interruptCtrl_6_io_pendings[9]; + ctrl_io_irqRise_pending[10] = interruptCtrl_6_io_pendings[10]; + ctrl_io_irqRise_pending[11] = interruptCtrl_6_io_pendings[11]; + ctrl_io_irqRise_pending[12] = interruptCtrl_6_io_pendings[12]; + ctrl_io_irqRise_pending[13] = interruptCtrl_6_io_pendings[13]; + ctrl_io_irqRise_pending[14] = interruptCtrl_6_io_pendings[14]; + ctrl_io_irqRise_pending[15] = interruptCtrl_6_io_pendings[15]; + ctrl_io_irqRise_pending[16] = interruptCtrl_6_io_pendings[16]; + ctrl_io_irqRise_pending[17] = interruptCtrl_6_io_pendings[17]; + ctrl_io_irqRise_pending[18] = interruptCtrl_6_io_pendings[18]; + ctrl_io_irqRise_pending[19] = interruptCtrl_6_io_pendings[19]; + ctrl_io_irqRise_pending[20] = interruptCtrl_6_io_pendings[20]; + ctrl_io_irqRise_pending[21] = interruptCtrl_6_io_pendings[21]; + ctrl_io_irqRise_pending[22] = interruptCtrl_6_io_pendings[22]; + ctrl_io_irqRise_pending[23] = interruptCtrl_6_io_pendings[23]; + ctrl_io_irqRise_pending[24] = interruptCtrl_6_io_pendings[24]; + ctrl_io_irqRise_pending[25] = interruptCtrl_6_io_pendings[25]; + ctrl_io_irqRise_pending[26] = interruptCtrl_6_io_pendings[26]; + ctrl_io_irqRise_pending[27] = interruptCtrl_6_io_pendings[27]; + ctrl_io_irqRise_pending[28] = interruptCtrl_6_io_pendings[28]; + ctrl_io_irqRise_pending[29] = interruptCtrl_6_io_pendings[29]; + ctrl_io_irqRise_pending[30] = interruptCtrl_6_io_pendings[30]; + ctrl_io_irqRise_pending[31] = interruptCtrl_6_io_pendings[31]; + end + + always @(*) begin + ctrl_io_irqFall_pending[0] = interruptCtrl_7_io_pendings[0]; + ctrl_io_irqFall_pending[1] = interruptCtrl_7_io_pendings[1]; + ctrl_io_irqFall_pending[2] = interruptCtrl_7_io_pendings[2]; + ctrl_io_irqFall_pending[3] = interruptCtrl_7_io_pendings[3]; + ctrl_io_irqFall_pending[4] = interruptCtrl_7_io_pendings[4]; + ctrl_io_irqFall_pending[5] = interruptCtrl_7_io_pendings[5]; + ctrl_io_irqFall_pending[6] = interruptCtrl_7_io_pendings[6]; + ctrl_io_irqFall_pending[7] = interruptCtrl_7_io_pendings[7]; + ctrl_io_irqFall_pending[8] = interruptCtrl_7_io_pendings[8]; + ctrl_io_irqFall_pending[9] = interruptCtrl_7_io_pendings[9]; + ctrl_io_irqFall_pending[10] = interruptCtrl_7_io_pendings[10]; + ctrl_io_irqFall_pending[11] = interruptCtrl_7_io_pendings[11]; + ctrl_io_irqFall_pending[12] = interruptCtrl_7_io_pendings[12]; + ctrl_io_irqFall_pending[13] = interruptCtrl_7_io_pendings[13]; + ctrl_io_irqFall_pending[14] = interruptCtrl_7_io_pendings[14]; + ctrl_io_irqFall_pending[15] = interruptCtrl_7_io_pendings[15]; + ctrl_io_irqFall_pending[16] = interruptCtrl_7_io_pendings[16]; + ctrl_io_irqFall_pending[17] = interruptCtrl_7_io_pendings[17]; + ctrl_io_irqFall_pending[18] = interruptCtrl_7_io_pendings[18]; + ctrl_io_irqFall_pending[19] = interruptCtrl_7_io_pendings[19]; + ctrl_io_irqFall_pending[20] = interruptCtrl_7_io_pendings[20]; + ctrl_io_irqFall_pending[21] = interruptCtrl_7_io_pendings[21]; + ctrl_io_irqFall_pending[22] = interruptCtrl_7_io_pendings[22]; + ctrl_io_irqFall_pending[23] = interruptCtrl_7_io_pendings[23]; + ctrl_io_irqFall_pending[24] = interruptCtrl_7_io_pendings[24]; + ctrl_io_irqFall_pending[25] = interruptCtrl_7_io_pendings[25]; + ctrl_io_irqFall_pending[26] = interruptCtrl_7_io_pendings[26]; + ctrl_io_irqFall_pending[27] = interruptCtrl_7_io_pendings[27]; + ctrl_io_irqFall_pending[28] = interruptCtrl_7_io_pendings[28]; + ctrl_io_irqFall_pending[29] = interruptCtrl_7_io_pendings[29]; + ctrl_io_irqFall_pending[30] = interruptCtrl_7_io_pendings[30]; + ctrl_io_irqFall_pending[31] = interruptCtrl_7_io_pendings[31]; + end + + assign io_bus_a_ready = (_zz_io_bus_a_ready && (! _zz_io_bus_a_ready_1)); + always @(*) begin + _zz_io_bus_d_payload_data = 32'h0; + case(_zz_3) + 12'h0 : begin + _zz_io_bus_d_payload_data[31 : 0] = mapper_idCtrl_io_header; + end + 12'h004 : begin + _zz_io_bus_d_payload_data[31 : 0] = mapper_idCtrl_io_version; + end + 12'h008 : begin + _zz_io_bus_d_payload_data[31 : 0] = {16'h0001,16'h0020}; + end + 12'h018 : begin + _zz_io_bus_d_payload_data[31 : 0] = interruptCtrl_4_io_pendings; + end + 12'h01c : begin + _zz_io_bus_d_payload_data[31 : 0] = io_masks_driver; + end + 12'h020 : begin + _zz_io_bus_d_payload_data[31 : 0] = interruptCtrl_5_io_pendings; + end + 12'h024 : begin + _zz_io_bus_d_payload_data[31 : 0] = io_masks_driver_1; + end + 12'h028 : begin + _zz_io_bus_d_payload_data[31 : 0] = interruptCtrl_6_io_pendings; + end + 12'h02c : begin + _zz_io_bus_d_payload_data[31 : 0] = io_masks_driver_2; + end + 12'h030 : begin + _zz_io_bus_d_payload_data[31 : 0] = interruptCtrl_7_io_pendings; + end + 12'h034 : begin + _zz_io_bus_d_payload_data[31 : 0] = io_masks_driver_3; + end + 12'h00c : begin + _zz_io_bus_d_payload_data[0 : 0] = ctrl_io_value[0]; + _zz_io_bus_d_payload_data[1 : 1] = ctrl_io_value[1]; + _zz_io_bus_d_payload_data[2 : 2] = ctrl_io_value[2]; + _zz_io_bus_d_payload_data[3 : 3] = ctrl_io_value[3]; + _zz_io_bus_d_payload_data[4 : 4] = ctrl_io_value[4]; + _zz_io_bus_d_payload_data[5 : 5] = ctrl_io_value[5]; + _zz_io_bus_d_payload_data[6 : 6] = ctrl_io_value[6]; + _zz_io_bus_d_payload_data[7 : 7] = ctrl_io_value[7]; + _zz_io_bus_d_payload_data[8 : 8] = ctrl_io_value[8]; + _zz_io_bus_d_payload_data[9 : 9] = ctrl_io_value[9]; + _zz_io_bus_d_payload_data[10 : 10] = ctrl_io_value[10]; + _zz_io_bus_d_payload_data[11 : 11] = ctrl_io_value[11]; + _zz_io_bus_d_payload_data[12 : 12] = ctrl_io_value[12]; + _zz_io_bus_d_payload_data[13 : 13] = ctrl_io_value[13]; + _zz_io_bus_d_payload_data[14 : 14] = ctrl_io_value[14]; + _zz_io_bus_d_payload_data[15 : 15] = ctrl_io_value[15]; + _zz_io_bus_d_payload_data[16 : 16] = ctrl_io_value[16]; + _zz_io_bus_d_payload_data[17 : 17] = ctrl_io_value[17]; + _zz_io_bus_d_payload_data[18 : 18] = ctrl_io_value[18]; + _zz_io_bus_d_payload_data[19 : 19] = ctrl_io_value[19]; + _zz_io_bus_d_payload_data[20 : 20] = ctrl_io_value[20]; + _zz_io_bus_d_payload_data[21 : 21] = ctrl_io_value[21]; + _zz_io_bus_d_payload_data[22 : 22] = ctrl_io_value[22]; + _zz_io_bus_d_payload_data[23 : 23] = ctrl_io_value[23]; + _zz_io_bus_d_payload_data[24 : 24] = ctrl_io_value[24]; + _zz_io_bus_d_payload_data[25 : 25] = ctrl_io_value[25]; + _zz_io_bus_d_payload_data[26 : 26] = ctrl_io_value[26]; + _zz_io_bus_d_payload_data[27 : 27] = ctrl_io_value[27]; + _zz_io_bus_d_payload_data[28 : 28] = ctrl_io_value[28]; + _zz_io_bus_d_payload_data[29 : 29] = ctrl_io_value[29]; + _zz_io_bus_d_payload_data[30 : 30] = ctrl_io_value[30]; + _zz_io_bus_d_payload_data[31 : 31] = ctrl_io_value[31]; + end + 12'h010 : begin + _zz_io_bus_d_payload_data[0 : 0] = _zz_io_config_write; + _zz_io_bus_d_payload_data[1 : 1] = _zz_io_config_write_1; + _zz_io_bus_d_payload_data[2 : 2] = _zz_io_config_write_2; + _zz_io_bus_d_payload_data[3 : 3] = _zz_io_config_write_3; + _zz_io_bus_d_payload_data[4 : 4] = _zz_io_config_write_4; + _zz_io_bus_d_payload_data[5 : 5] = _zz_io_config_write_5; + _zz_io_bus_d_payload_data[6 : 6] = _zz_io_config_write_6; + _zz_io_bus_d_payload_data[7 : 7] = _zz_io_config_write_7; + _zz_io_bus_d_payload_data[8 : 8] = _zz_io_config_write_8; + _zz_io_bus_d_payload_data[9 : 9] = _zz_io_config_write_9; + _zz_io_bus_d_payload_data[10 : 10] = _zz_io_config_write_10; + _zz_io_bus_d_payload_data[11 : 11] = _zz_io_config_write_11; + _zz_io_bus_d_payload_data[12 : 12] = _zz_io_config_write_12; + _zz_io_bus_d_payload_data[13 : 13] = _zz_io_config_write_13; + _zz_io_bus_d_payload_data[14 : 14] = _zz_io_config_write_14; + _zz_io_bus_d_payload_data[15 : 15] = _zz_io_config_write_15; + _zz_io_bus_d_payload_data[16 : 16] = _zz_io_config_write_16; + _zz_io_bus_d_payload_data[17 : 17] = _zz_io_config_write_17; + _zz_io_bus_d_payload_data[18 : 18] = _zz_io_config_write_18; + _zz_io_bus_d_payload_data[19 : 19] = _zz_io_config_write_19; + _zz_io_bus_d_payload_data[20 : 20] = _zz_io_config_write_20; + _zz_io_bus_d_payload_data[21 : 21] = _zz_io_config_write_21; + _zz_io_bus_d_payload_data[22 : 22] = _zz_io_config_write_22; + _zz_io_bus_d_payload_data[23 : 23] = _zz_io_config_write_23; + _zz_io_bus_d_payload_data[24 : 24] = _zz_io_config_write_24; + _zz_io_bus_d_payload_data[25 : 25] = _zz_io_config_write_25; + _zz_io_bus_d_payload_data[26 : 26] = _zz_io_config_write_26; + _zz_io_bus_d_payload_data[27 : 27] = _zz_io_config_write_27; + _zz_io_bus_d_payload_data[28 : 28] = _zz_io_config_write_28; + _zz_io_bus_d_payload_data[29 : 29] = _zz_io_config_write_29; + _zz_io_bus_d_payload_data[30 : 30] = _zz_io_config_write_30; + _zz_io_bus_d_payload_data[31 : 31] = _zz_io_config_write_31; + end + 12'h014 : begin + _zz_io_bus_d_payload_data[0 : 0] = _zz_io_config_direction; + _zz_io_bus_d_payload_data[1 : 1] = _zz_io_config_direction_1; + _zz_io_bus_d_payload_data[2 : 2] = _zz_io_config_direction_2; + _zz_io_bus_d_payload_data[3 : 3] = _zz_io_config_direction_3; + _zz_io_bus_d_payload_data[4 : 4] = _zz_io_config_direction_4; + _zz_io_bus_d_payload_data[5 : 5] = _zz_io_config_direction_5; + _zz_io_bus_d_payload_data[6 : 6] = _zz_io_config_direction_6; + _zz_io_bus_d_payload_data[7 : 7] = _zz_io_config_direction_7; + _zz_io_bus_d_payload_data[8 : 8] = _zz_io_config_direction_8; + _zz_io_bus_d_payload_data[9 : 9] = _zz_io_config_direction_9; + _zz_io_bus_d_payload_data[10 : 10] = _zz_io_config_direction_10; + _zz_io_bus_d_payload_data[11 : 11] = _zz_io_config_direction_11; + _zz_io_bus_d_payload_data[12 : 12] = _zz_io_config_direction_12; + _zz_io_bus_d_payload_data[13 : 13] = _zz_io_config_direction_13; + _zz_io_bus_d_payload_data[14 : 14] = _zz_io_config_direction_14; + _zz_io_bus_d_payload_data[15 : 15] = _zz_io_config_direction_15; + _zz_io_bus_d_payload_data[16 : 16] = _zz_io_config_direction_16; + _zz_io_bus_d_payload_data[17 : 17] = _zz_io_config_direction_17; + _zz_io_bus_d_payload_data[18 : 18] = _zz_io_config_direction_18; + _zz_io_bus_d_payload_data[19 : 19] = _zz_io_config_direction_19; + _zz_io_bus_d_payload_data[20 : 20] = _zz_io_config_direction_20; + _zz_io_bus_d_payload_data[21 : 21] = _zz_io_config_direction_21; + _zz_io_bus_d_payload_data[22 : 22] = _zz_io_config_direction_22; + _zz_io_bus_d_payload_data[23 : 23] = _zz_io_config_direction_23; + _zz_io_bus_d_payload_data[24 : 24] = _zz_io_config_direction_24; + _zz_io_bus_d_payload_data[25 : 25] = _zz_io_config_direction_25; + _zz_io_bus_d_payload_data[26 : 26] = _zz_io_config_direction_26; + _zz_io_bus_d_payload_data[27 : 27] = _zz_io_config_direction_27; + _zz_io_bus_d_payload_data[28 : 28] = _zz_io_config_direction_28; + _zz_io_bus_d_payload_data[29 : 29] = _zz_io_config_direction_29; + _zz_io_bus_d_payload_data[30 : 30] = _zz_io_config_direction_30; + _zz_io_bus_d_payload_data[31 : 31] = _zz_io_config_direction_31; + end + default : begin + end + endcase + end + + assign _zz_io_bus_d_payload_opcode_1 = ((|(io_bus_a_payload_opcode == A_GET)) ? D_ACCESS_ACK_DATA : D_ACCESS_ACK); + assign _zz_io_bus_d_payload_opcode = _zz_io_bus_d_payload_opcode_1; + always @(*) begin + _zz_io_bus_a_ready = io_bus_d_ready; + if(when_Stream_l477) begin + _zz_io_bus_a_ready = 1'b1; + end + end + + assign when_Stream_l477 = (! _zz_io_bus_d_valid); + assign _zz_io_bus_d_valid = _zz_io_bus_d_valid_1; + assign _zz_io_bus_d_payload_opcode_2 = _zz_io_bus_d_payload_opcode_3; + assign io_bus_d_valid = _zz_io_bus_d_valid; + assign io_bus_d_payload_opcode = _zz_io_bus_d_payload_opcode_2; + assign io_bus_d_payload_param = _zz_io_bus_d_payload_param; + assign io_bus_d_payload_source = _zz_io_bus_d_payload_source; + assign io_bus_d_payload_size = _zz_io_bus_d_payload_size; + assign io_bus_d_payload_denied = _zz_io_bus_d_payload_denied; + assign io_bus_d_payload_data = _zz_io_bus_d_payload_data_1; + assign io_bus_d_payload_corrupt = _zz_io_bus_d_payload_corrupt; + always @(posedge clk or posedge reset) begin + if(reset) begin + io_masks_driver <= 32'h0; + io_masks_driver_1 <= 32'h0; + io_masks_driver_2 <= 32'h0; + io_masks_driver_3 <= 32'h0; + _zz_io_config_write <= 1'b0; + _zz_io_config_direction <= 1'b0; + _zz_io_config_write_1 <= 1'b0; + _zz_io_config_direction_1 <= 1'b0; + _zz_io_config_write_2 <= 1'b0; + _zz_io_config_direction_2 <= 1'b0; + _zz_io_config_write_3 <= 1'b0; + _zz_io_config_direction_3 <= 1'b0; + _zz_io_config_write_4 <= 1'b0; + _zz_io_config_direction_4 <= 1'b0; + _zz_io_config_write_5 <= 1'b0; + _zz_io_config_direction_5 <= 1'b0; + _zz_io_config_write_6 <= 1'b0; + _zz_io_config_direction_6 <= 1'b0; + _zz_io_config_write_7 <= 1'b0; + _zz_io_config_direction_7 <= 1'b0; + _zz_io_config_write_8 <= 1'b0; + _zz_io_config_direction_8 <= 1'b0; + _zz_io_config_write_9 <= 1'b0; + _zz_io_config_direction_9 <= 1'b0; + _zz_io_config_write_10 <= 1'b0; + _zz_io_config_direction_10 <= 1'b0; + _zz_io_config_write_11 <= 1'b0; + _zz_io_config_direction_11 <= 1'b0; + _zz_io_config_write_12 <= 1'b0; + _zz_io_config_direction_12 <= 1'b0; + _zz_io_config_write_13 <= 1'b0; + _zz_io_config_direction_13 <= 1'b0; + _zz_io_config_write_14 <= 1'b0; + _zz_io_config_direction_14 <= 1'b0; + _zz_io_config_write_15 <= 1'b0; + _zz_io_config_direction_15 <= 1'b0; + _zz_io_config_write_16 <= 1'b0; + _zz_io_config_direction_16 <= 1'b0; + _zz_io_config_write_17 <= 1'b0; + _zz_io_config_direction_17 <= 1'b0; + _zz_io_config_write_18 <= 1'b0; + _zz_io_config_direction_18 <= 1'b0; + _zz_io_config_write_19 <= 1'b0; + _zz_io_config_direction_19 <= 1'b0; + _zz_io_config_write_20 <= 1'b0; + _zz_io_config_direction_20 <= 1'b0; + _zz_io_config_write_21 <= 1'b0; + _zz_io_config_direction_21 <= 1'b0; + _zz_io_config_write_22 <= 1'b0; + _zz_io_config_direction_22 <= 1'b0; + _zz_io_config_write_23 <= 1'b0; + _zz_io_config_direction_23 <= 1'b0; + _zz_io_config_write_24 <= 1'b0; + _zz_io_config_direction_24 <= 1'b0; + _zz_io_config_write_25 <= 1'b0; + _zz_io_config_direction_25 <= 1'b0; + _zz_io_config_write_26 <= 1'b0; + _zz_io_config_direction_26 <= 1'b0; + _zz_io_config_write_27 <= 1'b0; + _zz_io_config_direction_27 <= 1'b0; + _zz_io_config_write_28 <= 1'b0; + _zz_io_config_direction_28 <= 1'b0; + _zz_io_config_write_29 <= 1'b0; + _zz_io_config_direction_29 <= 1'b0; + _zz_io_config_write_30 <= 1'b0; + _zz_io_config_direction_30 <= 1'b0; + _zz_io_config_write_31 <= 1'b0; + _zz_io_config_direction_31 <= 1'b0; + _zz_io_bus_d_valid_1 <= 1'b0; + end else begin + if(_zz_io_bus_a_ready) begin + _zz_io_bus_d_valid_1 <= ((io_bus_a_valid && (! _zz_io_bus_a_ready_1)) && 1'b1); + end + case(_zz_3) + 12'h01c : begin + if(_zz_2) begin + io_masks_driver <= io_bus_a_payload_data[31 : 0]; + end + end + 12'h024 : begin + if(_zz_2) begin + io_masks_driver_1 <= io_bus_a_payload_data[31 : 0]; + end + end + 12'h02c : begin + if(_zz_2) begin + io_masks_driver_2 <= io_bus_a_payload_data[31 : 0]; + end + end + 12'h034 : begin + if(_zz_2) begin + io_masks_driver_3 <= io_bus_a_payload_data[31 : 0]; + end + end + 12'h010 : begin + if(_zz_2) begin + _zz_io_config_write <= io_bus_a_payload_data[0]; + _zz_io_config_write_1 <= io_bus_a_payload_data[1]; + _zz_io_config_write_2 <= io_bus_a_payload_data[2]; + _zz_io_config_write_3 <= io_bus_a_payload_data[3]; + _zz_io_config_write_4 <= io_bus_a_payload_data[4]; + _zz_io_config_write_5 <= io_bus_a_payload_data[5]; + _zz_io_config_write_6 <= io_bus_a_payload_data[6]; + _zz_io_config_write_7 <= io_bus_a_payload_data[7]; + _zz_io_config_write_8 <= io_bus_a_payload_data[8]; + _zz_io_config_write_9 <= io_bus_a_payload_data[9]; + _zz_io_config_write_10 <= io_bus_a_payload_data[10]; + _zz_io_config_write_11 <= io_bus_a_payload_data[11]; + _zz_io_config_write_12 <= io_bus_a_payload_data[12]; + _zz_io_config_write_13 <= io_bus_a_payload_data[13]; + _zz_io_config_write_14 <= io_bus_a_payload_data[14]; + _zz_io_config_write_15 <= io_bus_a_payload_data[15]; + _zz_io_config_write_16 <= io_bus_a_payload_data[16]; + _zz_io_config_write_17 <= io_bus_a_payload_data[17]; + _zz_io_config_write_18 <= io_bus_a_payload_data[18]; + _zz_io_config_write_19 <= io_bus_a_payload_data[19]; + _zz_io_config_write_20 <= io_bus_a_payload_data[20]; + _zz_io_config_write_21 <= io_bus_a_payload_data[21]; + _zz_io_config_write_22 <= io_bus_a_payload_data[22]; + _zz_io_config_write_23 <= io_bus_a_payload_data[23]; + _zz_io_config_write_24 <= io_bus_a_payload_data[24]; + _zz_io_config_write_25 <= io_bus_a_payload_data[25]; + _zz_io_config_write_26 <= io_bus_a_payload_data[26]; + _zz_io_config_write_27 <= io_bus_a_payload_data[27]; + _zz_io_config_write_28 <= io_bus_a_payload_data[28]; + _zz_io_config_write_29 <= io_bus_a_payload_data[29]; + _zz_io_config_write_30 <= io_bus_a_payload_data[30]; + _zz_io_config_write_31 <= io_bus_a_payload_data[31]; + end + end + 12'h014 : begin + if(_zz_2) begin + _zz_io_config_direction <= io_bus_a_payload_data[0]; + _zz_io_config_direction_1 <= io_bus_a_payload_data[1]; + _zz_io_config_direction_2 <= io_bus_a_payload_data[2]; + _zz_io_config_direction_3 <= io_bus_a_payload_data[3]; + _zz_io_config_direction_4 <= io_bus_a_payload_data[4]; + _zz_io_config_direction_5 <= io_bus_a_payload_data[5]; + _zz_io_config_direction_6 <= io_bus_a_payload_data[6]; + _zz_io_config_direction_7 <= io_bus_a_payload_data[7]; + _zz_io_config_direction_8 <= io_bus_a_payload_data[8]; + _zz_io_config_direction_9 <= io_bus_a_payload_data[9]; + _zz_io_config_direction_10 <= io_bus_a_payload_data[10]; + _zz_io_config_direction_11 <= io_bus_a_payload_data[11]; + _zz_io_config_direction_12 <= io_bus_a_payload_data[12]; + _zz_io_config_direction_13 <= io_bus_a_payload_data[13]; + _zz_io_config_direction_14 <= io_bus_a_payload_data[14]; + _zz_io_config_direction_15 <= io_bus_a_payload_data[15]; + _zz_io_config_direction_16 <= io_bus_a_payload_data[16]; + _zz_io_config_direction_17 <= io_bus_a_payload_data[17]; + _zz_io_config_direction_18 <= io_bus_a_payload_data[18]; + _zz_io_config_direction_19 <= io_bus_a_payload_data[19]; + _zz_io_config_direction_20 <= io_bus_a_payload_data[20]; + _zz_io_config_direction_21 <= io_bus_a_payload_data[21]; + _zz_io_config_direction_22 <= io_bus_a_payload_data[22]; + _zz_io_config_direction_23 <= io_bus_a_payload_data[23]; + _zz_io_config_direction_24 <= io_bus_a_payload_data[24]; + _zz_io_config_direction_25 <= io_bus_a_payload_data[25]; + _zz_io_config_direction_26 <= io_bus_a_payload_data[26]; + _zz_io_config_direction_27 <= io_bus_a_payload_data[27]; + _zz_io_config_direction_28 <= io_bus_a_payload_data[28]; + _zz_io_config_direction_29 <= io_bus_a_payload_data[29]; + _zz_io_config_direction_30 <= io_bus_a_payload_data[30]; + _zz_io_config_direction_31 <= io_bus_a_payload_data[31]; + end + end + default : begin + end + endcase + end + end + + always @(posedge clk) begin + if(_zz_io_bus_a_ready) begin + _zz_io_bus_d_payload_opcode_3 <= _zz_io_bus_d_payload_opcode; + _zz_io_bus_d_payload_param <= 3'b000; + _zz_io_bus_d_payload_source <= io_bus_a_payload_source; + _zz_io_bus_d_payload_size <= io_bus_a_payload_size; + _zz_io_bus_d_payload_denied <= 1'b0; + _zz_io_bus_d_payload_data_1 <= _zz_io_bus_d_payload_data; + _zz_io_bus_d_payload_corrupt <= 1'b0; + end + end + + +endmodule + +//InterruptCtrl_3 replaced by InterruptCtrl + +//InterruptCtrl_2 replaced by InterruptCtrl + +//InterruptCtrl_1 replaced by InterruptCtrl + +module InterruptCtrl ( + input wire [31:0] io_inputs, + input wire [31:0] io_clears, + input wire [31:0] io_masks, + output wire [31:0] io_pendings, + input wire clk, + input wire reset +); + + reg [31:0] pendings; + + assign io_pendings = (pendings & io_masks); + always @(posedge clk or posedge reset) begin + if(reset) begin + pendings <= 32'h0; + end else begin + pendings <= ((pendings & (~ io_clears)) | io_inputs); + end + end + + +endmodule + +module IpIdentificationCtrl ( + output wire [31:0] io_header, + output wire [31:0] io_version, + input wire clk, + input wire reset +); + localparam Ids_Gpio = 5'd0; + localparam Ids_Pio = 5'd1; + localparam Ids_Pwm = 5'd2; + localparam Ids_Uart = 5'd3; + localparam Ids_I2cController = 5'd4; + localparam Ids_I2cDevice = 5'd5; + localparam Ids_SpiController = 5'd6; + localparam Ids_SpiXipController = 5'd7; + localparam Ids_SpiDevice = 5'd8; + localparam Ids_AesAccelerator = 5'd9; + localparam Ids_AesMaskedAccelerator = 5'd10; + localparam Ids_Reset = 5'd11; + localparam Ids_Clock = 5'd12; + localparam Ids_Pinmux = 5'd13; + localparam Ids_Semaphore = 5'd14; + localparam Ids_Mailbox = 5'd15; + localparam Ids_Prng = 5'd16; + localparam Ids_Trng = 5'd17; + localparam Ids_Crc8 = 5'd18; + localparam Ids_Crc16 = 5'd19; + localparam Ids_Crc32 = 5'd20; + localparam Ids_Watchdog = 5'd21; + localparam Ids_Esm = 5'd22; + localparam Ids_Timer = 5'd23; + localparam Ids_Syscon = 5'd24; + + wire [15:0] _zz_header; + wire [4:0] _zz_header_1; + wire [31:0] header; + wire [31:0] version; + + assign _zz_header_1 = Ids_Gpio; + assign _zz_header = {11'd0, _zz_header_1}; + assign header = {{8'h0,8'h08},_zz_header}; + assign version = {{8'h01,8'h0},16'h0}; + assign io_header = header; + assign io_version = version; + +endmodule + +module GpioCtrl ( + input wire [31:0] io_gpio_pins_read, + output wire [31:0] io_gpio_pins_write, + output wire [31:0] io_gpio_pins_writeEnable, + input wire [31:0] io_config_write, + input wire [31:0] io_config_direction, + output wire [31:0] io_value, + output wire io_interrupt, + output wire [31:0] io_irqHigh_valid, + input wire [31:0] io_irqHigh_pending, + output wire [31:0] io_irqLow_valid, + input wire [31:0] io_irqLow_pending, + output wire [31:0] io_irqRise_valid, + input wire [31:0] io_irqRise_pending, + output wire [31:0] io_irqFall_valid, + input wire [31:0] io_irqFall_pending, + input wire clk, + input wire reset +); + + wire [31:0] io_gpio_pins_read_buffercc_io_dataOut; + wire [31:0] synchronized; + reg [31:0] last; + + (* keep_hierarchy = "TRUE" *) BufferCC io_gpio_pins_read_buffercc ( + .io_dataIn (io_gpio_pins_read[31:0] ), //i + .io_dataOut (io_gpio_pins_read_buffercc_io_dataOut[31:0]), //o + .clk (clk ), //i + .reset (reset ) //i + ); + assign io_value = io_gpio_pins_read_buffercc_io_dataOut; + assign synchronized = io_value; + assign io_gpio_pins_write = io_config_write; + assign io_gpio_pins_writeEnable = io_config_direction; + assign io_irqHigh_valid = synchronized; + assign io_irqLow_valid = (~ synchronized); + assign io_irqRise_valid = (synchronized & (~ last)); + assign io_irqFall_valid = ((~ synchronized) & last); + assign io_interrupt = (|(((io_irqHigh_pending | io_irqLow_pending) | io_irqRise_pending) | io_irqFall_pending)); + always @(posedge clk) begin + last <= synchronized; + end + + +endmodule + +module BufferCC ( + input wire [31:0] io_dataIn, + output wire [31:0] io_dataOut, + input wire clk, + input wire reset +); + + (* async_reg = "true" *) reg [31:0] buffers_0; + (* async_reg = "true" *) reg [31:0] buffers_1; + + assign io_dataOut = buffers_1; + always @(posedge clk) begin + buffers_0 <= io_dataIn; + buffers_1 <= buffers_0; + end + + +endmodule diff --git a/sources/digital/peripherals/io/gpio/rtl/vhdl/gpio_tl_32b.vhd b/sources/digital/peripherals/io/gpio/rtl/vhdl/gpio_tl_32b.vhd new file mode 100644 index 0000000..07ff7ec --- /dev/null +++ b/sources/digital/peripherals/io/gpio/rtl/vhdl/gpio_tl_32b.vhd @@ -0,0 +1,1712 @@ +-- Generator : SpinalHDL v1.14.2 git head : 78f29dc66110fc099a777992b6daa2f803ab445e +-- Component : gpio_tl_32b +-- SPDX-FileCopyrightText: 2026 aesc silicon +-- +-- SPDX-License-Identifier: CERN-OHL-W-2.0 + +library IEEE; +use IEEE.STD_LOGIC_1164.ALL; +use IEEE.NUMERIC_STD.all; + +package pkg_enum is + type A is (PUT_FULL_DATA,PUT_PARTIAL_DATA,GET,ACQUIRE_BLOCK,ACQUIRE_PERM); + type D is (ACCESS_ACK,ACCESS_ACK_DATA,GRANT,GRANT_DATA,RELEASE_ACK); + type Ids is (Gpio,Pio,Pwm,Uart,I2cController,I2cDevice,SpiController,SpiXipController,SpiDevice,AesAccelerator,AesMaskedAccelerator,Reset,Clock,Pinmux,Semaphore,Mailbox,Prng,Trng,Crc8,Crc16,Crc32,Watchdog,Esm,Timer,Syscon); + + function pkg_mux (sel : std_logic; one : A; zero : A) return A; + subtype A_enc_type is std_logic_vector(2 downto 0); + constant A_enc_PUT_FULL_DATA : A_enc_type := "000"; + constant A_enc_PUT_PARTIAL_DATA : A_enc_type := "001"; + constant A_enc_GET : A_enc_type := "100"; + constant A_enc_ACQUIRE_BLOCK : A_enc_type := "110"; + constant A_enc_ACQUIRE_PERM : A_enc_type := "111"; + + function pkg_mux (sel : std_logic; one : D; zero : D) return D; + subtype D_enc_type is std_logic_vector(2 downto 0); + constant D_enc_ACCESS_ACK : D_enc_type := "000"; + constant D_enc_ACCESS_ACK_DATA : D_enc_type := "001"; + constant D_enc_GRANT : D_enc_type := "100"; + constant D_enc_GRANT_DATA : D_enc_type := "101"; + constant D_enc_RELEASE_ACK : D_enc_type := "110"; + + function pkg_mux (sel : std_logic; one : Ids; zero : Ids) return Ids; + function pkg_toStdLogicVector_native (value : Ids) return std_logic_vector; + function pkg_toIds_native (value : std_logic_vector(4 downto 0)) return Ids; +end pkg_enum; + +package body pkg_enum is + function pkg_mux (sel : std_logic; one : A; zero : A) return A is + begin + if sel = '1' then + return one; + else + return zero; + end if; + end pkg_mux; + + function pkg_mux (sel : std_logic; one : D; zero : D) return D is + begin + if sel = '1' then + return one; + else + return zero; + end if; + end pkg_mux; + + function pkg_mux (sel : std_logic; one : Ids; zero : Ids) return Ids is + begin + if sel = '1' then + return one; + else + return zero; + end if; + end pkg_mux; + + function pkg_toIds_native (value : std_logic_vector(4 downto 0)) return Ids is + begin + case value is + when "00000" => return Gpio; + when "00001" => return Pio; + when "00010" => return Pwm; + when "00011" => return Uart; + when "00100" => return I2cController; + when "00101" => return I2cDevice; + when "00110" => return SpiController; + when "00111" => return SpiXipController; + when "01000" => return SpiDevice; + when "01001" => return AesAccelerator; + when "01010" => return AesMaskedAccelerator; + when "01011" => return Reset; + when "01100" => return Clock; + when "01101" => return Pinmux; + when "01110" => return Semaphore; + when "01111" => return Mailbox; + when "10000" => return Prng; + when "10001" => return Trng; + when "10010" => return Crc8; + when "10011" => return Crc16; + when "10100" => return Crc32; + when "10101" => return Watchdog; + when "10110" => return Esm; + when "10111" => return Timer; + when "11000" => return Syscon; + when others => return Gpio; + end case; + end; + function pkg_toStdLogicVector_native (value : Ids) return std_logic_vector is + begin + case value is + when Gpio => return "00000"; + when Pio => return "00001"; + when Pwm => return "00010"; + when Uart => return "00011"; + when I2cController => return "00100"; + when I2cDevice => return "00101"; + when SpiController => return "00110"; + when SpiXipController => return "00111"; + when SpiDevice => return "01000"; + when AesAccelerator => return "01001"; + when AesMaskedAccelerator => return "01010"; + when Reset => return "01011"; + when Clock => return "01100"; + when Pinmux => return "01101"; + when Semaphore => return "01110"; + when Mailbox => return "01111"; + when Prng => return "10000"; + when Trng => return "10001"; + when Crc8 => return "10010"; + when Crc16 => return "10011"; + when Crc32 => return "10100"; + when Watchdog => return "10101"; + when Esm => return "10110"; + when Timer => return "10111"; + when Syscon => return "11000"; + when others => return "00000"; + end case; + end; +end pkg_enum; + + +library IEEE; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; +use ieee.math_real.all; + +package pkg_scala2hdl is + function pkg_extract (that : std_logic_vector; bitId : integer) return std_logic; + function pkg_extract (that : std_logic_vector; base : unsigned; size : integer) return std_logic_vector; + function pkg_cat (a : std_logic_vector; b : std_logic_vector) return std_logic_vector; + function pkg_not (value : std_logic_vector) return std_logic_vector; + function pkg_extract (that : unsigned; bitId : integer) return std_logic; + function pkg_extract (that : unsigned; base : unsigned; size : integer) return unsigned; + function pkg_cat (a : unsigned; b : unsigned) return unsigned; + function pkg_not (value : unsigned) return unsigned; + function pkg_extract (that : signed; bitId : integer) return std_logic; + function pkg_extract (that : signed; base : unsigned; size : integer) return signed; + function pkg_cat (a : signed; b : signed) return signed; + function pkg_not (value : signed) return signed; + + function pkg_mux (sel : std_logic; one : std_logic; zero : std_logic) return std_logic; + function pkg_mux (sel : std_logic; one : std_logic_vector; zero : std_logic_vector) return std_logic_vector; + function pkg_mux (sel : std_logic; one : unsigned; zero : unsigned) return unsigned; + function pkg_mux (sel : std_logic; one : signed; zero : signed) return signed; + + function pkg_toStdLogic (value : boolean) return std_logic; + function pkg_toStdLogicVector (value : std_logic) return std_logic_vector; + function pkg_toUnsigned (value : std_logic) return unsigned; + function pkg_toSigned (value : std_logic) return signed; + function pkg_stdLogicVector (lit : std_logic_vector) return std_logic_vector; + function pkg_unsigned (lit : unsigned) return unsigned; + function pkg_signed (lit : signed) return signed; + + function pkg_resize (that : std_logic_vector; width : integer) return std_logic_vector; + function pkg_resize (that : unsigned; width : integer) return unsigned; + function pkg_resize (that : signed; width : integer) return signed; + + function pkg_extract (that : std_logic_vector; high : integer; low : integer) return std_logic_vector; + function pkg_extract (that : unsigned; high : integer; low : integer) return unsigned; + function pkg_extract (that : signed; high : integer; low : integer) return signed; + + function pkg_shiftRight (that : std_logic_vector; size : natural) return std_logic_vector; + function pkg_shiftRight (that : std_logic_vector; size : unsigned) return std_logic_vector; + function pkg_shiftLeft (that : std_logic_vector; size : natural) return std_logic_vector; + function pkg_shiftLeft (that : std_logic_vector; size : unsigned) return std_logic_vector; + + function pkg_shiftRight (that : unsigned; size : natural) return unsigned; + function pkg_shiftRight (that : unsigned; size : unsigned) return unsigned; + function pkg_shiftLeft (that : unsigned; size : natural) return unsigned; + function pkg_shiftLeft (that : unsigned; size : unsigned) return unsigned; + + function pkg_shiftRight (that : signed; size : natural) return signed; + function pkg_shiftRight (that : signed; size : unsigned) return signed; + function pkg_shiftLeft (that : signed; size : natural) return signed; + function pkg_shiftLeft (that : signed; size : unsigned; w : integer) return signed; + + function pkg_rotateLeft (that : std_logic_vector; size : unsigned) return std_logic_vector; + + function pkg_toString (that : std_logic_vector) return string; + function pkg_toString (that : unsigned) return string; + function pkg_toString (that : signed) return string; +end pkg_scala2hdl; + +package body pkg_scala2hdl is + function pkg_extract (that : std_logic_vector; bitId : integer) return std_logic is + alias temp : std_logic_vector(that'length-1 downto 0) is that; + begin + if bitId >= temp'length then + return 'U'; + end if; + return temp(bitId); + end pkg_extract; + + function pkg_extract (that : std_logic_vector; base : unsigned; size : integer) return std_logic_vector is + alias temp : std_logic_vector(that'length-1 downto 0) is that; constant elementCount : integer := temp'length - size + 1; + type tableType is array (0 to elementCount-1) of std_logic_vector(size-1 downto 0); + variable table : tableType; + begin + for i in 0 to elementCount-1 loop + table(i) := temp(i + size - 1 downto i); + end loop; + if base + size >= elementCount then + return (size-1 downto 0 => 'U'); + end if; + return table(to_integer(base)); + end pkg_extract; + + function pkg_cat (a : std_logic_vector; b : std_logic_vector) return std_logic_vector is + variable cat : std_logic_vector(a'length + b'length-1 downto 0); + begin + cat := a & b; + return cat; + end pkg_cat; + + function pkg_not (value : std_logic_vector) return std_logic_vector is + variable ret : std_logic_vector(value'length-1 downto 0); + begin + ret := not value; + return ret; + end pkg_not; + + function pkg_extract (that : unsigned; bitId : integer) return std_logic is + alias temp : unsigned(that'length-1 downto 0) is that; + begin + if bitId >= temp'length then + return 'U'; + end if; + return temp(bitId); + end pkg_extract; + + function pkg_extract (that : unsigned; base : unsigned; size : integer) return unsigned is + alias temp : unsigned(that'length-1 downto 0) is that; constant elementCount : integer := temp'length - size + 1; + type tableType is array (0 to elementCount-1) of unsigned(size-1 downto 0); + variable table : tableType; + begin + for i in 0 to elementCount-1 loop + table(i) := temp(i + size - 1 downto i); + end loop; + if base + size >= elementCount then + return (size-1 downto 0 => 'U'); + end if; + return table(to_integer(base)); + end pkg_extract; + + function pkg_cat (a : unsigned; b : unsigned) return unsigned is + variable cat : unsigned(a'length + b'length-1 downto 0); + begin + cat := a & b; + return cat; + end pkg_cat; + + function pkg_not (value : unsigned) return unsigned is + variable ret : unsigned(value'length-1 downto 0); + begin + ret := not value; + return ret; + end pkg_not; + + function pkg_extract (that : signed; bitId : integer) return std_logic is + alias temp : signed(that'length-1 downto 0) is that; + begin + if bitId >= temp'length then + return 'U'; + end if; + return temp(bitId); + end pkg_extract; + + function pkg_extract (that : signed; base : unsigned; size : integer) return signed is + alias temp : signed(that'length-1 downto 0) is that; constant elementCount : integer := temp'length - size + 1; + type tableType is array (0 to elementCount-1) of signed(size-1 downto 0); + variable table : tableType; + begin + for i in 0 to elementCount-1 loop + table(i) := temp(i + size - 1 downto i); + end loop; + if base + size >= elementCount then + return (size-1 downto 0 => 'U'); + end if; + return table(to_integer(base)); + end pkg_extract; + + function pkg_cat (a : signed; b : signed) return signed is + variable cat : signed(a'length + b'length-1 downto 0); + begin + cat := a & b; + return cat; + end pkg_cat; + + function pkg_not (value : signed) return signed is + variable ret : signed(value'length-1 downto 0); + begin + ret := not value; + return ret; + end pkg_not; + + + -- unsigned shifts + function pkg_shiftRight (that : unsigned; size : natural) return unsigned is + variable ret : unsigned(that'length-1 downto 0); + begin + if size >= that'length then + return ""; + else + ret := shift_right(that,size); + return ret(that'length-1-size downto 0); + end if; + end pkg_shiftRight; + + function pkg_shiftRight (that : unsigned; size : unsigned) return unsigned is + variable ret : unsigned(that'length-1 downto 0); + begin + ret := shift_right(that,to_integer(size)); + return ret; + end pkg_shiftRight; + + function pkg_shiftLeft (that : unsigned; size : natural) return unsigned is + begin + return shift_left(resize(that,that'length + size),size); + end pkg_shiftLeft; + + function pkg_shiftLeft (that : unsigned; size : unsigned) return unsigned is + begin + return shift_left(resize(that,that'length + 2**size'length - 1),to_integer(size)); + end pkg_shiftLeft; + + -- std_logic_vector shifts + function pkg_shiftRight (that : std_logic_vector; size : natural) return std_logic_vector is + begin + return std_logic_vector(pkg_shiftRight(unsigned(that),size)); + end pkg_shiftRight; + + function pkg_shiftRight (that : std_logic_vector; size : unsigned) return std_logic_vector is + begin + return std_logic_vector(pkg_shiftRight(unsigned(that),size)); + end pkg_shiftRight; + + function pkg_shiftLeft (that : std_logic_vector; size : natural) return std_logic_vector is + begin + return std_logic_vector(pkg_shiftLeft(unsigned(that),size)); + end pkg_shiftLeft; + + function pkg_shiftLeft (that : std_logic_vector; size : unsigned) return std_logic_vector is + begin + return std_logic_vector(pkg_shiftLeft(unsigned(that),size)); + end pkg_shiftLeft; + + -- signed shifts + function pkg_shiftRight (that : signed; size : natural) return signed is + begin + return signed(pkg_shiftRight(unsigned(that),size)); + end pkg_shiftRight; + + function pkg_shiftRight (that : signed; size : unsigned) return signed is + begin + return shift_right(that,to_integer(size)); + end pkg_shiftRight; + + function pkg_shiftLeft (that : signed; size : natural) return signed is + begin + return signed(pkg_shiftLeft(unsigned(that),size)); + end pkg_shiftLeft; + + function pkg_shiftLeft (that : signed; size : unsigned; w : integer) return signed is + begin + return shift_left(resize(that,w),to_integer(size)); + end pkg_shiftLeft; + + function pkg_rotateLeft (that : std_logic_vector; size : unsigned) return std_logic_vector is + begin + return std_logic_vector(rotate_left(unsigned(that),to_integer(size))); + end pkg_rotateLeft; + + function pkg_extract (that : std_logic_vector; high : integer; low : integer) return std_logic_vector is + alias temp : std_logic_vector(that'length-1 downto 0) is that; + begin + return temp(high downto low); + end pkg_extract; + + function pkg_extract (that : unsigned; high : integer; low : integer) return unsigned is + alias temp : unsigned(that'length-1 downto 0) is that; + begin + return temp(high downto low); + end pkg_extract; + + function pkg_extract (that : signed; high : integer; low : integer) return signed is + alias temp : signed(that'length-1 downto 0) is that; + begin + return temp(high downto low); + end pkg_extract; + + function pkg_mux (sel : std_logic; one : std_logic; zero : std_logic) return std_logic is + begin + if sel = '1' then + return one; + else + return zero; + end if; + end pkg_mux; + + function pkg_mux (sel : std_logic; one : std_logic_vector; zero : std_logic_vector) return std_logic_vector is + variable ret : std_logic_vector(zero'range); + begin + if sel = '1' then + ret := one; + else + ret := zero; + end if; + return ret; + end pkg_mux; + + function pkg_mux (sel : std_logic; one : unsigned; zero : unsigned) return unsigned is + variable ret : unsigned(zero'range); + begin + if sel = '1' then + ret := one; + else + ret := zero; + end if; + return ret; + end pkg_mux; + + function pkg_mux (sel : std_logic; one : signed; zero : signed) return signed is + variable ret : signed(zero'range); + begin + if sel = '1' then + ret := one; + else + ret := zero; + end if; + return ret; + end pkg_mux; + + function pkg_toStdLogic (value : boolean) return std_logic is + begin + if value = true then + return '1'; + else + return '0'; + end if; + end pkg_toStdLogic; + + function pkg_toStdLogicVector (value : std_logic) return std_logic_vector is + variable ret : std_logic_vector(0 downto 0); + begin + ret(0) := value; + return ret; + end pkg_toStdLogicVector; + + function pkg_toUnsigned (value : std_logic) return unsigned is + variable ret : unsigned(0 downto 0); + begin + ret(0) := value; + return ret; + end pkg_toUnsigned; + + function pkg_toSigned (value : std_logic) return signed is + variable ret : signed(0 downto 0); + begin + ret(0) := value; + return ret; + end pkg_toSigned; + + function pkg_stdLogicVector (lit : std_logic_vector) return std_logic_vector is + alias ret : std_logic_vector(lit'length-1 downto 0) is lit; + begin + return std_logic_vector(ret); + end pkg_stdLogicVector; + + function pkg_unsigned (lit : unsigned) return unsigned is + alias ret : unsigned(lit'length-1 downto 0) is lit; + begin + return unsigned(ret); + end pkg_unsigned; + + function pkg_signed (lit : signed) return signed is + alias ret : signed(lit'length-1 downto 0) is lit; + begin + return signed(ret); + end pkg_signed; + + function pkg_resize (that : std_logic_vector; width : integer) return std_logic_vector is + begin + return std_logic_vector(resize(unsigned(that),width)); + end pkg_resize; + + function pkg_resize (that : unsigned; width : integer) return unsigned is + variable ret : unsigned(width-1 downto 0); + begin + if that'length = 0 then + ret := (others => '0'); + else + ret := resize(that,width); + end if; + return ret; + end pkg_resize; + function pkg_resize (that : signed; width : integer) return signed is + alias temp : signed(that'length-1 downto 0) is that; + variable ret : signed(width-1 downto 0); + begin + if temp'length = 0 then + ret := (others => '0'); + elsif temp'length >= width then + ret := temp(width-1 downto 0); + else + ret := resize(temp,width); + end if; + return ret; + end pkg_resize; + + function pkg_toString (that : std_logic_vector) return string is + variable ret : string((that'length-1)/4 downto 0); + constant chars : string := "0123456789abcdef"; + variable left : natural; + begin + for i in ret'range loop + left := i*4+3; + if left > that'left then + left := that'left; + end if; + ret(i) := chars(to_integer(unsigned(that(left downto i*4)))+1); + end loop; + return "x" & '"' & ret & '"'; + end pkg_toString; + function pkg_toString (that : unsigned) return string is + begin + if that > 0 then + return pkg_toString(that / 10) & integer'image(to_integer(that mod 10)); + else + return ""; + end if; + end pkg_toString; + function pkg_toString (that : signed) return string is + begin + if that < 0 then + return "-" & pkg_toString(0 - pkg_resize(that, that'length + 1)); + elsif that > 0 then + return pkg_toString(that / 10) & integer'image(to_integer(that mod 10)); + else + return ""; + end if; + end pkg_toString; +end pkg_scala2hdl; + + +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +library work; +use work.pkg_scala2hdl.all; +use work.all; +use work.pkg_enum.all; + + +entity BufferCC is + port( + io_dataIn : in std_logic_vector(31 downto 0); + io_dataOut : out std_logic_vector(31 downto 0); + clk : in std_logic; + reset : in std_logic + ); + +end BufferCC; + +architecture arch of BufferCC is + attribute async_reg : string; + + signal buffers_0 : std_logic_vector(31 downto 0); + attribute async_reg of buffers_0 : signal is "true"; + signal buffers_1 : std_logic_vector(31 downto 0); + attribute async_reg of buffers_1 : signal is "true"; +begin + io_dataOut <= buffers_1; + process(clk) + begin + if rising_edge(clk) then + buffers_0 <= io_dataIn; + buffers_1 <= buffers_0; + end if; + end process; + +end arch; + +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +library work; +use work.pkg_scala2hdl.all; +use work.all; +use work.pkg_enum.all; + + +entity GpioCtrl is + port( + io_gpio_pins_read : in std_logic_vector(31 downto 0); + io_gpio_pins_write : out std_logic_vector(31 downto 0); + io_gpio_pins_writeEnable : out std_logic_vector(31 downto 0); + io_config_write : in std_logic_vector(31 downto 0); + io_config_direction : in std_logic_vector(31 downto 0); + io_value : out std_logic_vector(31 downto 0); + io_interrupt : out std_logic; + io_irqHigh_valid : out std_logic_vector(31 downto 0); + io_irqHigh_pending : in std_logic_vector(31 downto 0); + io_irqLow_valid : out std_logic_vector(31 downto 0); + io_irqLow_pending : in std_logic_vector(31 downto 0); + io_irqRise_valid : out std_logic_vector(31 downto 0); + io_irqRise_pending : in std_logic_vector(31 downto 0); + io_irqFall_valid : out std_logic_vector(31 downto 0); + io_irqFall_pending : in std_logic_vector(31 downto 0); + clk : in std_logic; + reset : in std_logic + ); + attribute keep_hierarchy : string; + +end GpioCtrl; + +architecture arch of GpioCtrl is + signal io_value_read_buffer : std_logic_vector(31 downto 0); + signal io_gpio_pins_read_buffercc_io_dataOut : std_logic_vector(31 downto 0); + + signal synchronized : std_logic_vector(31 downto 0); + signal last : std_logic_vector(31 downto 0); + attribute keep_hierarchy of io_gpio_pins_read_buffercc : label is "TRUE"; +begin + io_value <= io_value_read_buffer; + io_gpio_pins_read_buffercc : entity work.BufferCC + port map ( + io_dataIn => io_gpio_pins_read, + io_dataOut => io_gpio_pins_read_buffercc_io_dataOut, + clk => clk, + reset => reset + ); + io_value_read_buffer <= io_gpio_pins_read_buffercc_io_dataOut; + synchronized <= io_value_read_buffer; + io_gpio_pins_write <= io_config_write; + io_gpio_pins_writeEnable <= io_config_direction; + io_irqHigh_valid <= synchronized; + io_irqLow_valid <= pkg_not(synchronized); + io_irqRise_valid <= (synchronized and pkg_not(last)); + io_irqFall_valid <= (pkg_not(synchronized) and last); + io_interrupt <= pkg_toStdLogic((((io_irqHigh_pending or io_irqLow_pending) or io_irqRise_pending) or io_irqFall_pending) /= pkg_stdLogicVector("00000000000000000000000000000000")); + process(clk) + begin + if rising_edge(clk) then + last <= synchronized; + end if; + end process; + +end arch; + +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +library work; +use work.pkg_scala2hdl.all; +use work.all; +use work.pkg_enum.all; + + +entity IpIdentificationCtrl is + port( + io_header : out std_logic_vector(31 downto 0); + io_version : out std_logic_vector(31 downto 0); + clk : in std_logic; + reset : in std_logic + ); + +end IpIdentificationCtrl; + +architecture arch of IpIdentificationCtrl is + + signal header : std_logic_vector(31 downto 0); + signal version : std_logic_vector(31 downto 0); +begin + header <= pkg_cat(pkg_cat(pkg_stdLogicVector("00000000"),pkg_stdLogicVector("00001000")),pkg_resize(pkg_toStdLogicVector_native(pkg_enum.Gpio),16)); + version <= pkg_cat(pkg_cat(pkg_stdLogicVector("00000001"),pkg_stdLogicVector("00000000")),pkg_stdLogicVector("0000000000000000")); + io_header <= header; + io_version <= version; +end arch; + +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +library work; +use work.pkg_scala2hdl.all; +use work.all; +use work.pkg_enum.all; + + +entity InterruptCtrl is + port( + io_inputs : in std_logic_vector(31 downto 0); + io_clears : in std_logic_vector(31 downto 0); + io_masks : in std_logic_vector(31 downto 0); + io_pendings : out std_logic_vector(31 downto 0); + clk : in std_logic; + reset : in std_logic + ); + +end InterruptCtrl; + +architecture arch of InterruptCtrl is + + signal pendings : std_logic_vector(31 downto 0); +begin + io_pendings <= (pendings and io_masks); + process(clk, reset) + begin + if reset = '1' then + pendings <= pkg_stdLogicVector("00000000000000000000000000000000"); + elsif rising_edge(clk) then + pendings <= ((pendings and pkg_not(io_clears)) or io_inputs); + end if; + end process; + +end arch; + + +--InterruptCtrl_1 replaced by InterruptCtrl + + +--InterruptCtrl_2 replaced by InterruptCtrl + + +--InterruptCtrl_3 replaced by InterruptCtrl + +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +library work; +use work.pkg_scala2hdl.all; +use work.all; +use work.pkg_enum.all; + + +entity gpio_tl_32b is + port( + io_bus_a_valid : in std_logic; + io_bus_a_ready : out std_logic; + io_bus_a_payload_opcode : in A_enc_type; + io_bus_a_payload_param : in std_logic_vector(2 downto 0); + io_bus_a_payload_source : in unsigned(3 downto 0); + io_bus_a_payload_address : in unsigned(11 downto 0); + io_bus_a_payload_size : in unsigned(2 downto 0); + io_bus_a_payload_mask : in std_logic_vector(3 downto 0); + io_bus_a_payload_data : in std_logic_vector(31 downto 0); + io_bus_a_payload_corrupt : in std_logic; + io_bus_d_valid : out std_logic; + io_bus_d_ready : in std_logic; + io_bus_d_payload_opcode : out D_enc_type; + io_bus_d_payload_param : out std_logic_vector(2 downto 0); + io_bus_d_payload_source : out unsigned(3 downto 0); + io_bus_d_payload_size : out unsigned(2 downto 0); + io_bus_d_payload_denied : out std_logic; + io_bus_d_payload_data : out std_logic_vector(31 downto 0); + io_bus_d_payload_corrupt : out std_logic; + io_gpio_pins_read : in std_logic_vector(31 downto 0); + io_gpio_pins_write : out std_logic_vector(31 downto 0); + io_gpio_pins_writeEnable : out std_logic_vector(31 downto 0); + io_interrupt : out std_logic; + clk : in std_logic; + reset : in std_logic + ); + +end gpio_tl_32b; + +architecture arch of gpio_tl_32b is + signal ctrl_io_config_write : std_logic_vector(31 downto 0); + signal ctrl_io_config_direction : std_logic_vector(31 downto 0); + signal ctrl_io_irqHigh_pending : std_logic_vector(31 downto 0); + signal ctrl_io_irqLow_pending : std_logic_vector(31 downto 0); + signal ctrl_io_irqRise_pending : std_logic_vector(31 downto 0); + signal ctrl_io_irqFall_pending : std_logic_vector(31 downto 0); + signal interruptCtrl_4_io_inputs : std_logic_vector(31 downto 0); + signal interruptCtrl_4_io_clears : std_logic_vector(31 downto 0); + signal interruptCtrl_5_io_inputs : std_logic_vector(31 downto 0); + signal interruptCtrl_5_io_clears : std_logic_vector(31 downto 0); + signal interruptCtrl_6_io_inputs : std_logic_vector(31 downto 0); + signal interruptCtrl_6_io_clears : std_logic_vector(31 downto 0); + signal interruptCtrl_7_io_inputs : std_logic_vector(31 downto 0); + signal interruptCtrl_7_io_clears : std_logic_vector(31 downto 0); + signal io_bus_a_ready_read_buffer : std_logic; + signal ctrl_io_gpio_pins_write : std_logic_vector(31 downto 0); + signal ctrl_io_gpio_pins_writeEnable : std_logic_vector(31 downto 0); + signal ctrl_io_value : std_logic_vector(31 downto 0); + signal ctrl_io_interrupt : std_logic; + signal ctrl_io_irqHigh_valid : std_logic_vector(31 downto 0); + signal ctrl_io_irqLow_valid : std_logic_vector(31 downto 0); + signal ctrl_io_irqRise_valid : std_logic_vector(31 downto 0); + signal ctrl_io_irqFall_valid : std_logic_vector(31 downto 0); + signal mapper_idCtrl_io_header : std_logic_vector(31 downto 0); + signal mapper_idCtrl_io_version : std_logic_vector(31 downto 0); + signal interruptCtrl_4_io_pendings : std_logic_vector(31 downto 0); + signal interruptCtrl_5_io_pendings : std_logic_vector(31 downto 0); + signal interruptCtrl_6_io_pendings : std_logic_vector(31 downto 0); + signal interruptCtrl_7_io_pendings : std_logic_vector(31 downto 0); + signal zz_3 : unsigned(11 downto 0); + + signal zz_io_bus_a_ready : std_logic; + signal zz_io_bus_d_payload_opcode : D_enc_type; + signal zz_io_bus_d_payload_data : std_logic_vector(31 downto 0); + signal zz_1 : std_logic; + signal zz_2 : std_logic; + signal zz_io_bus_a_ready_1 : std_logic; + signal io_masks_driver : std_logic_vector(31 downto 0); + signal io_masks_driver_1 : std_logic_vector(31 downto 0); + signal io_masks_driver_2 : std_logic_vector(31 downto 0); + signal io_masks_driver_3 : std_logic_vector(31 downto 0); + signal zz_io_config_write : std_logic; + signal zz_io_config_direction : std_logic; + signal zz_io_config_write_1 : std_logic; + signal zz_io_config_direction_1 : std_logic; + signal zz_io_config_write_2 : std_logic; + signal zz_io_config_direction_2 : std_logic; + signal zz_io_config_write_3 : std_logic; + signal zz_io_config_direction_3 : std_logic; + signal zz_io_config_write_4 : std_logic; + signal zz_io_config_direction_4 : std_logic; + signal zz_io_config_write_5 : std_logic; + signal zz_io_config_direction_5 : std_logic; + signal zz_io_config_write_6 : std_logic; + signal zz_io_config_direction_6 : std_logic; + signal zz_io_config_write_7 : std_logic; + signal zz_io_config_direction_7 : std_logic; + signal zz_io_config_write_8 : std_logic; + signal zz_io_config_direction_8 : std_logic; + signal zz_io_config_write_9 : std_logic; + signal zz_io_config_direction_9 : std_logic; + signal zz_io_config_write_10 : std_logic; + signal zz_io_config_direction_10 : std_logic; + signal zz_io_config_write_11 : std_logic; + signal zz_io_config_direction_11 : std_logic; + signal zz_io_config_write_12 : std_logic; + signal zz_io_config_direction_12 : std_logic; + signal zz_io_config_write_13 : std_logic; + signal zz_io_config_direction_13 : std_logic; + signal zz_io_config_write_14 : std_logic; + signal zz_io_config_direction_14 : std_logic; + signal zz_io_config_write_15 : std_logic; + signal zz_io_config_direction_15 : std_logic; + signal zz_io_config_write_16 : std_logic; + signal zz_io_config_direction_16 : std_logic; + signal zz_io_config_write_17 : std_logic; + signal zz_io_config_direction_17 : std_logic; + signal zz_io_config_write_18 : std_logic; + signal zz_io_config_direction_18 : std_logic; + signal zz_io_config_write_19 : std_logic; + signal zz_io_config_direction_19 : std_logic; + signal zz_io_config_write_20 : std_logic; + signal zz_io_config_direction_20 : std_logic; + signal zz_io_config_write_21 : std_logic; + signal zz_io_config_direction_21 : std_logic; + signal zz_io_config_write_22 : std_logic; + signal zz_io_config_direction_22 : std_logic; + signal zz_io_config_write_23 : std_logic; + signal zz_io_config_direction_23 : std_logic; + signal zz_io_config_write_24 : std_logic; + signal zz_io_config_direction_24 : std_logic; + signal zz_io_config_write_25 : std_logic; + signal zz_io_config_direction_25 : std_logic; + signal zz_io_config_write_26 : std_logic; + signal zz_io_config_direction_26 : std_logic; + signal zz_io_config_write_27 : std_logic; + signal zz_io_config_direction_27 : std_logic; + signal zz_io_config_write_28 : std_logic; + signal zz_io_config_direction_28 : std_logic; + signal zz_io_config_write_29 : std_logic; + signal zz_io_config_direction_29 : std_logic; + signal zz_io_config_write_30 : std_logic; + signal zz_io_config_direction_30 : std_logic; + signal zz_io_config_write_31 : std_logic; + signal zz_io_config_direction_31 : std_logic; + signal zz_io_bus_d_payload_opcode_1 : D_enc_type; + signal zz_io_bus_d_valid : std_logic; + signal zz_io_bus_d_payload_opcode_2 : D_enc_type; + signal zz_io_bus_d_valid_1 : std_logic; + signal zz_io_bus_d_payload_opcode_3 : D_enc_type; + signal zz_io_bus_d_payload_param : std_logic_vector(2 downto 0); + signal zz_io_bus_d_payload_source : unsigned(3 downto 0); + signal zz_io_bus_d_payload_size : unsigned(2 downto 0); + signal zz_io_bus_d_payload_denied : std_logic; + signal zz_io_bus_d_payload_data_1 : std_logic_vector(31 downto 0); + signal zz_io_bus_d_payload_corrupt : std_logic; + signal when_Stream_l477 : std_logic; +begin + io_bus_a_ready <= io_bus_a_ready_read_buffer; + zz_3 <= pkg_shiftLeft(pkg_shiftRight(io_bus_a_payload_address,2),2); + ctrl : entity work.GpioCtrl + port map ( + io_gpio_pins_read => io_gpio_pins_read, + io_gpio_pins_write => ctrl_io_gpio_pins_write, + io_gpio_pins_writeEnable => ctrl_io_gpio_pins_writeEnable, + io_config_write => ctrl_io_config_write, + io_config_direction => ctrl_io_config_direction, + io_value => ctrl_io_value, + io_interrupt => ctrl_io_interrupt, + io_irqHigh_valid => ctrl_io_irqHigh_valid, + io_irqHigh_pending => ctrl_io_irqHigh_pending, + io_irqLow_valid => ctrl_io_irqLow_valid, + io_irqLow_pending => ctrl_io_irqLow_pending, + io_irqRise_valid => ctrl_io_irqRise_valid, + io_irqRise_pending => ctrl_io_irqRise_pending, + io_irqFall_valid => ctrl_io_irqFall_valid, + io_irqFall_pending => ctrl_io_irqFall_pending, + clk => clk, + reset => reset + ); + mapper_idCtrl : entity work.IpIdentificationCtrl + port map ( + io_header => mapper_idCtrl_io_header, + io_version => mapper_idCtrl_io_version, + clk => clk, + reset => reset + ); + interruptCtrl_4 : entity work.InterruptCtrl + port map ( + io_inputs => interruptCtrl_4_io_inputs, + io_clears => interruptCtrl_4_io_clears, + io_masks => io_masks_driver, + io_pendings => interruptCtrl_4_io_pendings, + clk => clk, + reset => reset + ); + interruptCtrl_5 : entity work.InterruptCtrl + port map ( + io_inputs => interruptCtrl_5_io_inputs, + io_clears => interruptCtrl_5_io_clears, + io_masks => io_masks_driver_1, + io_pendings => interruptCtrl_5_io_pendings, + clk => clk, + reset => reset + ); + interruptCtrl_6 : entity work.InterruptCtrl + port map ( + io_inputs => interruptCtrl_6_io_inputs, + io_clears => interruptCtrl_6_io_clears, + io_masks => io_masks_driver_2, + io_pendings => interruptCtrl_6_io_pendings, + clk => clk, + reset => reset + ); + interruptCtrl_7 : entity work.InterruptCtrl + port map ( + io_inputs => interruptCtrl_7_io_inputs, + io_clears => interruptCtrl_7_io_clears, + io_masks => io_masks_driver_3, + io_pendings => interruptCtrl_7_io_pendings, + clk => clk, + reset => reset + ); + io_gpio_pins_write <= ctrl_io_gpio_pins_write; + io_gpio_pins_writeEnable <= ctrl_io_gpio_pins_writeEnable; + io_interrupt <= ctrl_io_interrupt; + zz_1 <= (io_bus_a_valid and pkg_toStdLogic(pkg_cat(pkg_toStdLogicVector(pkg_toStdLogic(io_bus_a_payload_opcode = A_enc_PUT_PARTIAL_DATA)),pkg_toStdLogicVector(pkg_toStdLogic(io_bus_a_payload_opcode = A_enc_PUT_FULL_DATA))) /= pkg_stdLogicVector("00"))); + zz_2 <= (zz_1 and io_bus_a_ready_read_buffer); + zz_io_bus_a_ready_1 <= pkg_toStdLogic(false); + process(zz_3,zz_2,io_bus_a_payload_data) + begin + interruptCtrl_4_io_clears <= pkg_stdLogicVector("00000000000000000000000000000000"); + case zz_3 is + when "000000011000" => + if zz_2 = '1' then + interruptCtrl_4_io_clears <= pkg_extract(io_bus_a_payload_data,31,0); + end if; + when others => + end case; + end process; + + process(zz_3,zz_2,io_bus_a_payload_data) + begin + interruptCtrl_5_io_clears <= pkg_stdLogicVector("00000000000000000000000000000000"); + case zz_3 is + when "000000100000" => + if zz_2 = '1' then + interruptCtrl_5_io_clears <= pkg_extract(io_bus_a_payload_data,31,0); + end if; + when others => + end case; + end process; + + process(zz_3,zz_2,io_bus_a_payload_data) + begin + interruptCtrl_6_io_clears <= pkg_stdLogicVector("00000000000000000000000000000000"); + case zz_3 is + when "000000101000" => + if zz_2 = '1' then + interruptCtrl_6_io_clears <= pkg_extract(io_bus_a_payload_data,31,0); + end if; + when others => + end case; + end process; + + process(zz_3,zz_2,io_bus_a_payload_data) + begin + interruptCtrl_7_io_clears <= pkg_stdLogicVector("00000000000000000000000000000000"); + case zz_3 is + when "000000110000" => + if zz_2 = '1' then + interruptCtrl_7_io_clears <= pkg_extract(io_bus_a_payload_data,31,0); + end if; + when others => + end case; + end process; + + process(zz_io_config_write,zz_io_config_write_1,zz_io_config_write_2,zz_io_config_write_3,zz_io_config_write_4,zz_io_config_write_5,zz_io_config_write_6,zz_io_config_write_7,zz_io_config_write_8,zz_io_config_write_9,zz_io_config_write_10,zz_io_config_write_11,zz_io_config_write_12,zz_io_config_write_13,zz_io_config_write_14,zz_io_config_write_15,zz_io_config_write_16,zz_io_config_write_17,zz_io_config_write_18,zz_io_config_write_19,zz_io_config_write_20,zz_io_config_write_21,zz_io_config_write_22,zz_io_config_write_23,zz_io_config_write_24,zz_io_config_write_25,zz_io_config_write_26,zz_io_config_write_27,zz_io_config_write_28,zz_io_config_write_29,zz_io_config_write_30,zz_io_config_write_31) + begin + ctrl_io_config_write(0) <= zz_io_config_write; + ctrl_io_config_write(1) <= zz_io_config_write_1; + ctrl_io_config_write(2) <= zz_io_config_write_2; + ctrl_io_config_write(3) <= zz_io_config_write_3; + ctrl_io_config_write(4) <= zz_io_config_write_4; + ctrl_io_config_write(5) <= zz_io_config_write_5; + ctrl_io_config_write(6) <= zz_io_config_write_6; + ctrl_io_config_write(7) <= zz_io_config_write_7; + ctrl_io_config_write(8) <= zz_io_config_write_8; + ctrl_io_config_write(9) <= zz_io_config_write_9; + ctrl_io_config_write(10) <= zz_io_config_write_10; + ctrl_io_config_write(11) <= zz_io_config_write_11; + ctrl_io_config_write(12) <= zz_io_config_write_12; + ctrl_io_config_write(13) <= zz_io_config_write_13; + ctrl_io_config_write(14) <= zz_io_config_write_14; + ctrl_io_config_write(15) <= zz_io_config_write_15; + ctrl_io_config_write(16) <= zz_io_config_write_16; + ctrl_io_config_write(17) <= zz_io_config_write_17; + ctrl_io_config_write(18) <= zz_io_config_write_18; + ctrl_io_config_write(19) <= zz_io_config_write_19; + ctrl_io_config_write(20) <= zz_io_config_write_20; + ctrl_io_config_write(21) <= zz_io_config_write_21; + ctrl_io_config_write(22) <= zz_io_config_write_22; + ctrl_io_config_write(23) <= zz_io_config_write_23; + ctrl_io_config_write(24) <= zz_io_config_write_24; + ctrl_io_config_write(25) <= zz_io_config_write_25; + ctrl_io_config_write(26) <= zz_io_config_write_26; + ctrl_io_config_write(27) <= zz_io_config_write_27; + ctrl_io_config_write(28) <= zz_io_config_write_28; + ctrl_io_config_write(29) <= zz_io_config_write_29; + ctrl_io_config_write(30) <= zz_io_config_write_30; + ctrl_io_config_write(31) <= zz_io_config_write_31; + end process; + + process(zz_io_config_direction,zz_io_config_direction_1,zz_io_config_direction_2,zz_io_config_direction_3,zz_io_config_direction_4,zz_io_config_direction_5,zz_io_config_direction_6,zz_io_config_direction_7,zz_io_config_direction_8,zz_io_config_direction_9,zz_io_config_direction_10,zz_io_config_direction_11,zz_io_config_direction_12,zz_io_config_direction_13,zz_io_config_direction_14,zz_io_config_direction_15,zz_io_config_direction_16,zz_io_config_direction_17,zz_io_config_direction_18,zz_io_config_direction_19,zz_io_config_direction_20,zz_io_config_direction_21,zz_io_config_direction_22,zz_io_config_direction_23,zz_io_config_direction_24,zz_io_config_direction_25,zz_io_config_direction_26,zz_io_config_direction_27,zz_io_config_direction_28,zz_io_config_direction_29,zz_io_config_direction_30,zz_io_config_direction_31) + begin + ctrl_io_config_direction(0) <= zz_io_config_direction; + ctrl_io_config_direction(1) <= zz_io_config_direction_1; + ctrl_io_config_direction(2) <= zz_io_config_direction_2; + ctrl_io_config_direction(3) <= zz_io_config_direction_3; + ctrl_io_config_direction(4) <= zz_io_config_direction_4; + ctrl_io_config_direction(5) <= zz_io_config_direction_5; + ctrl_io_config_direction(6) <= zz_io_config_direction_6; + ctrl_io_config_direction(7) <= zz_io_config_direction_7; + ctrl_io_config_direction(8) <= zz_io_config_direction_8; + ctrl_io_config_direction(9) <= zz_io_config_direction_9; + ctrl_io_config_direction(10) <= zz_io_config_direction_10; + ctrl_io_config_direction(11) <= zz_io_config_direction_11; + ctrl_io_config_direction(12) <= zz_io_config_direction_12; + ctrl_io_config_direction(13) <= zz_io_config_direction_13; + ctrl_io_config_direction(14) <= zz_io_config_direction_14; + ctrl_io_config_direction(15) <= zz_io_config_direction_15; + ctrl_io_config_direction(16) <= zz_io_config_direction_16; + ctrl_io_config_direction(17) <= zz_io_config_direction_17; + ctrl_io_config_direction(18) <= zz_io_config_direction_18; + ctrl_io_config_direction(19) <= zz_io_config_direction_19; + ctrl_io_config_direction(20) <= zz_io_config_direction_20; + ctrl_io_config_direction(21) <= zz_io_config_direction_21; + ctrl_io_config_direction(22) <= zz_io_config_direction_22; + ctrl_io_config_direction(23) <= zz_io_config_direction_23; + ctrl_io_config_direction(24) <= zz_io_config_direction_24; + ctrl_io_config_direction(25) <= zz_io_config_direction_25; + ctrl_io_config_direction(26) <= zz_io_config_direction_26; + ctrl_io_config_direction(27) <= zz_io_config_direction_27; + ctrl_io_config_direction(28) <= zz_io_config_direction_28; + ctrl_io_config_direction(29) <= zz_io_config_direction_29; + ctrl_io_config_direction(30) <= zz_io_config_direction_30; + ctrl_io_config_direction(31) <= zz_io_config_direction_31; + end process; + + process(ctrl_io_irqHigh_valid) + begin + interruptCtrl_4_io_inputs(0) <= pkg_extract(ctrl_io_irqHigh_valid,0); + interruptCtrl_4_io_inputs(1) <= pkg_extract(ctrl_io_irqHigh_valid,1); + interruptCtrl_4_io_inputs(2) <= pkg_extract(ctrl_io_irqHigh_valid,2); + interruptCtrl_4_io_inputs(3) <= pkg_extract(ctrl_io_irqHigh_valid,3); + interruptCtrl_4_io_inputs(4) <= pkg_extract(ctrl_io_irqHigh_valid,4); + interruptCtrl_4_io_inputs(5) <= pkg_extract(ctrl_io_irqHigh_valid,5); + interruptCtrl_4_io_inputs(6) <= pkg_extract(ctrl_io_irqHigh_valid,6); + interruptCtrl_4_io_inputs(7) <= pkg_extract(ctrl_io_irqHigh_valid,7); + interruptCtrl_4_io_inputs(8) <= pkg_extract(ctrl_io_irqHigh_valid,8); + interruptCtrl_4_io_inputs(9) <= pkg_extract(ctrl_io_irqHigh_valid,9); + interruptCtrl_4_io_inputs(10) <= pkg_extract(ctrl_io_irqHigh_valid,10); + interruptCtrl_4_io_inputs(11) <= pkg_extract(ctrl_io_irqHigh_valid,11); + interruptCtrl_4_io_inputs(12) <= pkg_extract(ctrl_io_irqHigh_valid,12); + interruptCtrl_4_io_inputs(13) <= pkg_extract(ctrl_io_irqHigh_valid,13); + interruptCtrl_4_io_inputs(14) <= pkg_extract(ctrl_io_irqHigh_valid,14); + interruptCtrl_4_io_inputs(15) <= pkg_extract(ctrl_io_irqHigh_valid,15); + interruptCtrl_4_io_inputs(16) <= pkg_extract(ctrl_io_irqHigh_valid,16); + interruptCtrl_4_io_inputs(17) <= pkg_extract(ctrl_io_irqHigh_valid,17); + interruptCtrl_4_io_inputs(18) <= pkg_extract(ctrl_io_irqHigh_valid,18); + interruptCtrl_4_io_inputs(19) <= pkg_extract(ctrl_io_irqHigh_valid,19); + interruptCtrl_4_io_inputs(20) <= pkg_extract(ctrl_io_irqHigh_valid,20); + interruptCtrl_4_io_inputs(21) <= pkg_extract(ctrl_io_irqHigh_valid,21); + interruptCtrl_4_io_inputs(22) <= pkg_extract(ctrl_io_irqHigh_valid,22); + interruptCtrl_4_io_inputs(23) <= pkg_extract(ctrl_io_irqHigh_valid,23); + interruptCtrl_4_io_inputs(24) <= pkg_extract(ctrl_io_irqHigh_valid,24); + interruptCtrl_4_io_inputs(25) <= pkg_extract(ctrl_io_irqHigh_valid,25); + interruptCtrl_4_io_inputs(26) <= pkg_extract(ctrl_io_irqHigh_valid,26); + interruptCtrl_4_io_inputs(27) <= pkg_extract(ctrl_io_irqHigh_valid,27); + interruptCtrl_4_io_inputs(28) <= pkg_extract(ctrl_io_irqHigh_valid,28); + interruptCtrl_4_io_inputs(29) <= pkg_extract(ctrl_io_irqHigh_valid,29); + interruptCtrl_4_io_inputs(30) <= pkg_extract(ctrl_io_irqHigh_valid,30); + interruptCtrl_4_io_inputs(31) <= pkg_extract(ctrl_io_irqHigh_valid,31); + end process; + + process(ctrl_io_irqLow_valid) + begin + interruptCtrl_5_io_inputs(0) <= pkg_extract(ctrl_io_irqLow_valid,0); + interruptCtrl_5_io_inputs(1) <= pkg_extract(ctrl_io_irqLow_valid,1); + interruptCtrl_5_io_inputs(2) <= pkg_extract(ctrl_io_irqLow_valid,2); + interruptCtrl_5_io_inputs(3) <= pkg_extract(ctrl_io_irqLow_valid,3); + interruptCtrl_5_io_inputs(4) <= pkg_extract(ctrl_io_irqLow_valid,4); + interruptCtrl_5_io_inputs(5) <= pkg_extract(ctrl_io_irqLow_valid,5); + interruptCtrl_5_io_inputs(6) <= pkg_extract(ctrl_io_irqLow_valid,6); + interruptCtrl_5_io_inputs(7) <= pkg_extract(ctrl_io_irqLow_valid,7); + interruptCtrl_5_io_inputs(8) <= pkg_extract(ctrl_io_irqLow_valid,8); + interruptCtrl_5_io_inputs(9) <= pkg_extract(ctrl_io_irqLow_valid,9); + interruptCtrl_5_io_inputs(10) <= pkg_extract(ctrl_io_irqLow_valid,10); + interruptCtrl_5_io_inputs(11) <= pkg_extract(ctrl_io_irqLow_valid,11); + interruptCtrl_5_io_inputs(12) <= pkg_extract(ctrl_io_irqLow_valid,12); + interruptCtrl_5_io_inputs(13) <= pkg_extract(ctrl_io_irqLow_valid,13); + interruptCtrl_5_io_inputs(14) <= pkg_extract(ctrl_io_irqLow_valid,14); + interruptCtrl_5_io_inputs(15) <= pkg_extract(ctrl_io_irqLow_valid,15); + interruptCtrl_5_io_inputs(16) <= pkg_extract(ctrl_io_irqLow_valid,16); + interruptCtrl_5_io_inputs(17) <= pkg_extract(ctrl_io_irqLow_valid,17); + interruptCtrl_5_io_inputs(18) <= pkg_extract(ctrl_io_irqLow_valid,18); + interruptCtrl_5_io_inputs(19) <= pkg_extract(ctrl_io_irqLow_valid,19); + interruptCtrl_5_io_inputs(20) <= pkg_extract(ctrl_io_irqLow_valid,20); + interruptCtrl_5_io_inputs(21) <= pkg_extract(ctrl_io_irqLow_valid,21); + interruptCtrl_5_io_inputs(22) <= pkg_extract(ctrl_io_irqLow_valid,22); + interruptCtrl_5_io_inputs(23) <= pkg_extract(ctrl_io_irqLow_valid,23); + interruptCtrl_5_io_inputs(24) <= pkg_extract(ctrl_io_irqLow_valid,24); + interruptCtrl_5_io_inputs(25) <= pkg_extract(ctrl_io_irqLow_valid,25); + interruptCtrl_5_io_inputs(26) <= pkg_extract(ctrl_io_irqLow_valid,26); + interruptCtrl_5_io_inputs(27) <= pkg_extract(ctrl_io_irqLow_valid,27); + interruptCtrl_5_io_inputs(28) <= pkg_extract(ctrl_io_irqLow_valid,28); + interruptCtrl_5_io_inputs(29) <= pkg_extract(ctrl_io_irqLow_valid,29); + interruptCtrl_5_io_inputs(30) <= pkg_extract(ctrl_io_irqLow_valid,30); + interruptCtrl_5_io_inputs(31) <= pkg_extract(ctrl_io_irqLow_valid,31); + end process; + + process(ctrl_io_irqRise_valid) + begin + interruptCtrl_6_io_inputs(0) <= pkg_extract(ctrl_io_irqRise_valid,0); + interruptCtrl_6_io_inputs(1) <= pkg_extract(ctrl_io_irqRise_valid,1); + interruptCtrl_6_io_inputs(2) <= pkg_extract(ctrl_io_irqRise_valid,2); + interruptCtrl_6_io_inputs(3) <= pkg_extract(ctrl_io_irqRise_valid,3); + interruptCtrl_6_io_inputs(4) <= pkg_extract(ctrl_io_irqRise_valid,4); + interruptCtrl_6_io_inputs(5) <= pkg_extract(ctrl_io_irqRise_valid,5); + interruptCtrl_6_io_inputs(6) <= pkg_extract(ctrl_io_irqRise_valid,6); + interruptCtrl_6_io_inputs(7) <= pkg_extract(ctrl_io_irqRise_valid,7); + interruptCtrl_6_io_inputs(8) <= pkg_extract(ctrl_io_irqRise_valid,8); + interruptCtrl_6_io_inputs(9) <= pkg_extract(ctrl_io_irqRise_valid,9); + interruptCtrl_6_io_inputs(10) <= pkg_extract(ctrl_io_irqRise_valid,10); + interruptCtrl_6_io_inputs(11) <= pkg_extract(ctrl_io_irqRise_valid,11); + interruptCtrl_6_io_inputs(12) <= pkg_extract(ctrl_io_irqRise_valid,12); + interruptCtrl_6_io_inputs(13) <= pkg_extract(ctrl_io_irqRise_valid,13); + interruptCtrl_6_io_inputs(14) <= pkg_extract(ctrl_io_irqRise_valid,14); + interruptCtrl_6_io_inputs(15) <= pkg_extract(ctrl_io_irqRise_valid,15); + interruptCtrl_6_io_inputs(16) <= pkg_extract(ctrl_io_irqRise_valid,16); + interruptCtrl_6_io_inputs(17) <= pkg_extract(ctrl_io_irqRise_valid,17); + interruptCtrl_6_io_inputs(18) <= pkg_extract(ctrl_io_irqRise_valid,18); + interruptCtrl_6_io_inputs(19) <= pkg_extract(ctrl_io_irqRise_valid,19); + interruptCtrl_6_io_inputs(20) <= pkg_extract(ctrl_io_irqRise_valid,20); + interruptCtrl_6_io_inputs(21) <= pkg_extract(ctrl_io_irqRise_valid,21); + interruptCtrl_6_io_inputs(22) <= pkg_extract(ctrl_io_irqRise_valid,22); + interruptCtrl_6_io_inputs(23) <= pkg_extract(ctrl_io_irqRise_valid,23); + interruptCtrl_6_io_inputs(24) <= pkg_extract(ctrl_io_irqRise_valid,24); + interruptCtrl_6_io_inputs(25) <= pkg_extract(ctrl_io_irqRise_valid,25); + interruptCtrl_6_io_inputs(26) <= pkg_extract(ctrl_io_irqRise_valid,26); + interruptCtrl_6_io_inputs(27) <= pkg_extract(ctrl_io_irqRise_valid,27); + interruptCtrl_6_io_inputs(28) <= pkg_extract(ctrl_io_irqRise_valid,28); + interruptCtrl_6_io_inputs(29) <= pkg_extract(ctrl_io_irqRise_valid,29); + interruptCtrl_6_io_inputs(30) <= pkg_extract(ctrl_io_irqRise_valid,30); + interruptCtrl_6_io_inputs(31) <= pkg_extract(ctrl_io_irqRise_valid,31); + end process; + + process(ctrl_io_irqFall_valid) + begin + interruptCtrl_7_io_inputs(0) <= pkg_extract(ctrl_io_irqFall_valid,0); + interruptCtrl_7_io_inputs(1) <= pkg_extract(ctrl_io_irqFall_valid,1); + interruptCtrl_7_io_inputs(2) <= pkg_extract(ctrl_io_irqFall_valid,2); + interruptCtrl_7_io_inputs(3) <= pkg_extract(ctrl_io_irqFall_valid,3); + interruptCtrl_7_io_inputs(4) <= pkg_extract(ctrl_io_irqFall_valid,4); + interruptCtrl_7_io_inputs(5) <= pkg_extract(ctrl_io_irqFall_valid,5); + interruptCtrl_7_io_inputs(6) <= pkg_extract(ctrl_io_irqFall_valid,6); + interruptCtrl_7_io_inputs(7) <= pkg_extract(ctrl_io_irqFall_valid,7); + interruptCtrl_7_io_inputs(8) <= pkg_extract(ctrl_io_irqFall_valid,8); + interruptCtrl_7_io_inputs(9) <= pkg_extract(ctrl_io_irqFall_valid,9); + interruptCtrl_7_io_inputs(10) <= pkg_extract(ctrl_io_irqFall_valid,10); + interruptCtrl_7_io_inputs(11) <= pkg_extract(ctrl_io_irqFall_valid,11); + interruptCtrl_7_io_inputs(12) <= pkg_extract(ctrl_io_irqFall_valid,12); + interruptCtrl_7_io_inputs(13) <= pkg_extract(ctrl_io_irqFall_valid,13); + interruptCtrl_7_io_inputs(14) <= pkg_extract(ctrl_io_irqFall_valid,14); + interruptCtrl_7_io_inputs(15) <= pkg_extract(ctrl_io_irqFall_valid,15); + interruptCtrl_7_io_inputs(16) <= pkg_extract(ctrl_io_irqFall_valid,16); + interruptCtrl_7_io_inputs(17) <= pkg_extract(ctrl_io_irqFall_valid,17); + interruptCtrl_7_io_inputs(18) <= pkg_extract(ctrl_io_irqFall_valid,18); + interruptCtrl_7_io_inputs(19) <= pkg_extract(ctrl_io_irqFall_valid,19); + interruptCtrl_7_io_inputs(20) <= pkg_extract(ctrl_io_irqFall_valid,20); + interruptCtrl_7_io_inputs(21) <= pkg_extract(ctrl_io_irqFall_valid,21); + interruptCtrl_7_io_inputs(22) <= pkg_extract(ctrl_io_irqFall_valid,22); + interruptCtrl_7_io_inputs(23) <= pkg_extract(ctrl_io_irqFall_valid,23); + interruptCtrl_7_io_inputs(24) <= pkg_extract(ctrl_io_irqFall_valid,24); + interruptCtrl_7_io_inputs(25) <= pkg_extract(ctrl_io_irqFall_valid,25); + interruptCtrl_7_io_inputs(26) <= pkg_extract(ctrl_io_irqFall_valid,26); + interruptCtrl_7_io_inputs(27) <= pkg_extract(ctrl_io_irqFall_valid,27); + interruptCtrl_7_io_inputs(28) <= pkg_extract(ctrl_io_irqFall_valid,28); + interruptCtrl_7_io_inputs(29) <= pkg_extract(ctrl_io_irqFall_valid,29); + interruptCtrl_7_io_inputs(30) <= pkg_extract(ctrl_io_irqFall_valid,30); + interruptCtrl_7_io_inputs(31) <= pkg_extract(ctrl_io_irqFall_valid,31); + end process; + + process(interruptCtrl_4_io_pendings) + begin + ctrl_io_irqHigh_pending(0) <= pkg_extract(interruptCtrl_4_io_pendings,0); + ctrl_io_irqHigh_pending(1) <= pkg_extract(interruptCtrl_4_io_pendings,1); + ctrl_io_irqHigh_pending(2) <= pkg_extract(interruptCtrl_4_io_pendings,2); + ctrl_io_irqHigh_pending(3) <= pkg_extract(interruptCtrl_4_io_pendings,3); + ctrl_io_irqHigh_pending(4) <= pkg_extract(interruptCtrl_4_io_pendings,4); + ctrl_io_irqHigh_pending(5) <= pkg_extract(interruptCtrl_4_io_pendings,5); + ctrl_io_irqHigh_pending(6) <= pkg_extract(interruptCtrl_4_io_pendings,6); + ctrl_io_irqHigh_pending(7) <= pkg_extract(interruptCtrl_4_io_pendings,7); + ctrl_io_irqHigh_pending(8) <= pkg_extract(interruptCtrl_4_io_pendings,8); + ctrl_io_irqHigh_pending(9) <= pkg_extract(interruptCtrl_4_io_pendings,9); + ctrl_io_irqHigh_pending(10) <= pkg_extract(interruptCtrl_4_io_pendings,10); + ctrl_io_irqHigh_pending(11) <= pkg_extract(interruptCtrl_4_io_pendings,11); + ctrl_io_irqHigh_pending(12) <= pkg_extract(interruptCtrl_4_io_pendings,12); + ctrl_io_irqHigh_pending(13) <= pkg_extract(interruptCtrl_4_io_pendings,13); + ctrl_io_irqHigh_pending(14) <= pkg_extract(interruptCtrl_4_io_pendings,14); + ctrl_io_irqHigh_pending(15) <= pkg_extract(interruptCtrl_4_io_pendings,15); + ctrl_io_irqHigh_pending(16) <= pkg_extract(interruptCtrl_4_io_pendings,16); + ctrl_io_irqHigh_pending(17) <= pkg_extract(interruptCtrl_4_io_pendings,17); + ctrl_io_irqHigh_pending(18) <= pkg_extract(interruptCtrl_4_io_pendings,18); + ctrl_io_irqHigh_pending(19) <= pkg_extract(interruptCtrl_4_io_pendings,19); + ctrl_io_irqHigh_pending(20) <= pkg_extract(interruptCtrl_4_io_pendings,20); + ctrl_io_irqHigh_pending(21) <= pkg_extract(interruptCtrl_4_io_pendings,21); + ctrl_io_irqHigh_pending(22) <= pkg_extract(interruptCtrl_4_io_pendings,22); + ctrl_io_irqHigh_pending(23) <= pkg_extract(interruptCtrl_4_io_pendings,23); + ctrl_io_irqHigh_pending(24) <= pkg_extract(interruptCtrl_4_io_pendings,24); + ctrl_io_irqHigh_pending(25) <= pkg_extract(interruptCtrl_4_io_pendings,25); + ctrl_io_irqHigh_pending(26) <= pkg_extract(interruptCtrl_4_io_pendings,26); + ctrl_io_irqHigh_pending(27) <= pkg_extract(interruptCtrl_4_io_pendings,27); + ctrl_io_irqHigh_pending(28) <= pkg_extract(interruptCtrl_4_io_pendings,28); + ctrl_io_irqHigh_pending(29) <= pkg_extract(interruptCtrl_4_io_pendings,29); + ctrl_io_irqHigh_pending(30) <= pkg_extract(interruptCtrl_4_io_pendings,30); + ctrl_io_irqHigh_pending(31) <= pkg_extract(interruptCtrl_4_io_pendings,31); + end process; + + process(interruptCtrl_5_io_pendings) + begin + ctrl_io_irqLow_pending(0) <= pkg_extract(interruptCtrl_5_io_pendings,0); + ctrl_io_irqLow_pending(1) <= pkg_extract(interruptCtrl_5_io_pendings,1); + ctrl_io_irqLow_pending(2) <= pkg_extract(interruptCtrl_5_io_pendings,2); + ctrl_io_irqLow_pending(3) <= pkg_extract(interruptCtrl_5_io_pendings,3); + ctrl_io_irqLow_pending(4) <= pkg_extract(interruptCtrl_5_io_pendings,4); + ctrl_io_irqLow_pending(5) <= pkg_extract(interruptCtrl_5_io_pendings,5); + ctrl_io_irqLow_pending(6) <= pkg_extract(interruptCtrl_5_io_pendings,6); + ctrl_io_irqLow_pending(7) <= pkg_extract(interruptCtrl_5_io_pendings,7); + ctrl_io_irqLow_pending(8) <= pkg_extract(interruptCtrl_5_io_pendings,8); + ctrl_io_irqLow_pending(9) <= pkg_extract(interruptCtrl_5_io_pendings,9); + ctrl_io_irqLow_pending(10) <= pkg_extract(interruptCtrl_5_io_pendings,10); + ctrl_io_irqLow_pending(11) <= pkg_extract(interruptCtrl_5_io_pendings,11); + ctrl_io_irqLow_pending(12) <= pkg_extract(interruptCtrl_5_io_pendings,12); + ctrl_io_irqLow_pending(13) <= pkg_extract(interruptCtrl_5_io_pendings,13); + ctrl_io_irqLow_pending(14) <= pkg_extract(interruptCtrl_5_io_pendings,14); + ctrl_io_irqLow_pending(15) <= pkg_extract(interruptCtrl_5_io_pendings,15); + ctrl_io_irqLow_pending(16) <= pkg_extract(interruptCtrl_5_io_pendings,16); + ctrl_io_irqLow_pending(17) <= pkg_extract(interruptCtrl_5_io_pendings,17); + ctrl_io_irqLow_pending(18) <= pkg_extract(interruptCtrl_5_io_pendings,18); + ctrl_io_irqLow_pending(19) <= pkg_extract(interruptCtrl_5_io_pendings,19); + ctrl_io_irqLow_pending(20) <= pkg_extract(interruptCtrl_5_io_pendings,20); + ctrl_io_irqLow_pending(21) <= pkg_extract(interruptCtrl_5_io_pendings,21); + ctrl_io_irqLow_pending(22) <= pkg_extract(interruptCtrl_5_io_pendings,22); + ctrl_io_irqLow_pending(23) <= pkg_extract(interruptCtrl_5_io_pendings,23); + ctrl_io_irqLow_pending(24) <= pkg_extract(interruptCtrl_5_io_pendings,24); + ctrl_io_irqLow_pending(25) <= pkg_extract(interruptCtrl_5_io_pendings,25); + ctrl_io_irqLow_pending(26) <= pkg_extract(interruptCtrl_5_io_pendings,26); + ctrl_io_irqLow_pending(27) <= pkg_extract(interruptCtrl_5_io_pendings,27); + ctrl_io_irqLow_pending(28) <= pkg_extract(interruptCtrl_5_io_pendings,28); + ctrl_io_irqLow_pending(29) <= pkg_extract(interruptCtrl_5_io_pendings,29); + ctrl_io_irqLow_pending(30) <= pkg_extract(interruptCtrl_5_io_pendings,30); + ctrl_io_irqLow_pending(31) <= pkg_extract(interruptCtrl_5_io_pendings,31); + end process; + + process(interruptCtrl_6_io_pendings) + begin + ctrl_io_irqRise_pending(0) <= pkg_extract(interruptCtrl_6_io_pendings,0); + ctrl_io_irqRise_pending(1) <= pkg_extract(interruptCtrl_6_io_pendings,1); + ctrl_io_irqRise_pending(2) <= pkg_extract(interruptCtrl_6_io_pendings,2); + ctrl_io_irqRise_pending(3) <= pkg_extract(interruptCtrl_6_io_pendings,3); + ctrl_io_irqRise_pending(4) <= pkg_extract(interruptCtrl_6_io_pendings,4); + ctrl_io_irqRise_pending(5) <= pkg_extract(interruptCtrl_6_io_pendings,5); + ctrl_io_irqRise_pending(6) <= pkg_extract(interruptCtrl_6_io_pendings,6); + ctrl_io_irqRise_pending(7) <= pkg_extract(interruptCtrl_6_io_pendings,7); + ctrl_io_irqRise_pending(8) <= pkg_extract(interruptCtrl_6_io_pendings,8); + ctrl_io_irqRise_pending(9) <= pkg_extract(interruptCtrl_6_io_pendings,9); + ctrl_io_irqRise_pending(10) <= pkg_extract(interruptCtrl_6_io_pendings,10); + ctrl_io_irqRise_pending(11) <= pkg_extract(interruptCtrl_6_io_pendings,11); + ctrl_io_irqRise_pending(12) <= pkg_extract(interruptCtrl_6_io_pendings,12); + ctrl_io_irqRise_pending(13) <= pkg_extract(interruptCtrl_6_io_pendings,13); + ctrl_io_irqRise_pending(14) <= pkg_extract(interruptCtrl_6_io_pendings,14); + ctrl_io_irqRise_pending(15) <= pkg_extract(interruptCtrl_6_io_pendings,15); + ctrl_io_irqRise_pending(16) <= pkg_extract(interruptCtrl_6_io_pendings,16); + ctrl_io_irqRise_pending(17) <= pkg_extract(interruptCtrl_6_io_pendings,17); + ctrl_io_irqRise_pending(18) <= pkg_extract(interruptCtrl_6_io_pendings,18); + ctrl_io_irqRise_pending(19) <= pkg_extract(interruptCtrl_6_io_pendings,19); + ctrl_io_irqRise_pending(20) <= pkg_extract(interruptCtrl_6_io_pendings,20); + ctrl_io_irqRise_pending(21) <= pkg_extract(interruptCtrl_6_io_pendings,21); + ctrl_io_irqRise_pending(22) <= pkg_extract(interruptCtrl_6_io_pendings,22); + ctrl_io_irqRise_pending(23) <= pkg_extract(interruptCtrl_6_io_pendings,23); + ctrl_io_irqRise_pending(24) <= pkg_extract(interruptCtrl_6_io_pendings,24); + ctrl_io_irqRise_pending(25) <= pkg_extract(interruptCtrl_6_io_pendings,25); + ctrl_io_irqRise_pending(26) <= pkg_extract(interruptCtrl_6_io_pendings,26); + ctrl_io_irqRise_pending(27) <= pkg_extract(interruptCtrl_6_io_pendings,27); + ctrl_io_irqRise_pending(28) <= pkg_extract(interruptCtrl_6_io_pendings,28); + ctrl_io_irqRise_pending(29) <= pkg_extract(interruptCtrl_6_io_pendings,29); + ctrl_io_irqRise_pending(30) <= pkg_extract(interruptCtrl_6_io_pendings,30); + ctrl_io_irqRise_pending(31) <= pkg_extract(interruptCtrl_6_io_pendings,31); + end process; + + process(interruptCtrl_7_io_pendings) + begin + ctrl_io_irqFall_pending(0) <= pkg_extract(interruptCtrl_7_io_pendings,0); + ctrl_io_irqFall_pending(1) <= pkg_extract(interruptCtrl_7_io_pendings,1); + ctrl_io_irqFall_pending(2) <= pkg_extract(interruptCtrl_7_io_pendings,2); + ctrl_io_irqFall_pending(3) <= pkg_extract(interruptCtrl_7_io_pendings,3); + ctrl_io_irqFall_pending(4) <= pkg_extract(interruptCtrl_7_io_pendings,4); + ctrl_io_irqFall_pending(5) <= pkg_extract(interruptCtrl_7_io_pendings,5); + ctrl_io_irqFall_pending(6) <= pkg_extract(interruptCtrl_7_io_pendings,6); + ctrl_io_irqFall_pending(7) <= pkg_extract(interruptCtrl_7_io_pendings,7); + ctrl_io_irqFall_pending(8) <= pkg_extract(interruptCtrl_7_io_pendings,8); + ctrl_io_irqFall_pending(9) <= pkg_extract(interruptCtrl_7_io_pendings,9); + ctrl_io_irqFall_pending(10) <= pkg_extract(interruptCtrl_7_io_pendings,10); + ctrl_io_irqFall_pending(11) <= pkg_extract(interruptCtrl_7_io_pendings,11); + ctrl_io_irqFall_pending(12) <= pkg_extract(interruptCtrl_7_io_pendings,12); + ctrl_io_irqFall_pending(13) <= pkg_extract(interruptCtrl_7_io_pendings,13); + ctrl_io_irqFall_pending(14) <= pkg_extract(interruptCtrl_7_io_pendings,14); + ctrl_io_irqFall_pending(15) <= pkg_extract(interruptCtrl_7_io_pendings,15); + ctrl_io_irqFall_pending(16) <= pkg_extract(interruptCtrl_7_io_pendings,16); + ctrl_io_irqFall_pending(17) <= pkg_extract(interruptCtrl_7_io_pendings,17); + ctrl_io_irqFall_pending(18) <= pkg_extract(interruptCtrl_7_io_pendings,18); + ctrl_io_irqFall_pending(19) <= pkg_extract(interruptCtrl_7_io_pendings,19); + ctrl_io_irqFall_pending(20) <= pkg_extract(interruptCtrl_7_io_pendings,20); + ctrl_io_irqFall_pending(21) <= pkg_extract(interruptCtrl_7_io_pendings,21); + ctrl_io_irqFall_pending(22) <= pkg_extract(interruptCtrl_7_io_pendings,22); + ctrl_io_irqFall_pending(23) <= pkg_extract(interruptCtrl_7_io_pendings,23); + ctrl_io_irqFall_pending(24) <= pkg_extract(interruptCtrl_7_io_pendings,24); + ctrl_io_irqFall_pending(25) <= pkg_extract(interruptCtrl_7_io_pendings,25); + ctrl_io_irqFall_pending(26) <= pkg_extract(interruptCtrl_7_io_pendings,26); + ctrl_io_irqFall_pending(27) <= pkg_extract(interruptCtrl_7_io_pendings,27); + ctrl_io_irqFall_pending(28) <= pkg_extract(interruptCtrl_7_io_pendings,28); + ctrl_io_irqFall_pending(29) <= pkg_extract(interruptCtrl_7_io_pendings,29); + ctrl_io_irqFall_pending(30) <= pkg_extract(interruptCtrl_7_io_pendings,30); + ctrl_io_irqFall_pending(31) <= pkg_extract(interruptCtrl_7_io_pendings,31); + end process; + + io_bus_a_ready_read_buffer <= (zz_io_bus_a_ready and (not zz_io_bus_a_ready_1)); + process(zz_3,mapper_idCtrl_io_header,mapper_idCtrl_io_version,interruptCtrl_4_io_pendings,io_masks_driver,interruptCtrl_5_io_pendings,io_masks_driver_1,interruptCtrl_6_io_pendings,io_masks_driver_2,interruptCtrl_7_io_pendings,io_masks_driver_3,ctrl_io_value,zz_io_config_write,zz_io_config_write_1,zz_io_config_write_2,zz_io_config_write_3,zz_io_config_write_4,zz_io_config_write_5,zz_io_config_write_6,zz_io_config_write_7,zz_io_config_write_8,zz_io_config_write_9,zz_io_config_write_10,zz_io_config_write_11,zz_io_config_write_12,zz_io_config_write_13,zz_io_config_write_14,zz_io_config_write_15,zz_io_config_write_16,zz_io_config_write_17,zz_io_config_write_18,zz_io_config_write_19,zz_io_config_write_20,zz_io_config_write_21,zz_io_config_write_22,zz_io_config_write_23,zz_io_config_write_24,zz_io_config_write_25,zz_io_config_write_26,zz_io_config_write_27,zz_io_config_write_28,zz_io_config_write_29,zz_io_config_write_30,zz_io_config_write_31,zz_io_config_direction,zz_io_config_direction_1,zz_io_config_direction_2,zz_io_config_direction_3,zz_io_config_direction_4,zz_io_config_direction_5,zz_io_config_direction_6,zz_io_config_direction_7,zz_io_config_direction_8,zz_io_config_direction_9,zz_io_config_direction_10,zz_io_config_direction_11,zz_io_config_direction_12,zz_io_config_direction_13,zz_io_config_direction_14,zz_io_config_direction_15,zz_io_config_direction_16,zz_io_config_direction_17,zz_io_config_direction_18,zz_io_config_direction_19,zz_io_config_direction_20,zz_io_config_direction_21,zz_io_config_direction_22,zz_io_config_direction_23,zz_io_config_direction_24,zz_io_config_direction_25,zz_io_config_direction_26,zz_io_config_direction_27,zz_io_config_direction_28,zz_io_config_direction_29,zz_io_config_direction_30,zz_io_config_direction_31) + begin + zz_io_bus_d_payload_data <= pkg_stdLogicVector("00000000000000000000000000000000"); + case zz_3 is + when "000000000000" => + zz_io_bus_d_payload_data(31 downto 0) <= mapper_idCtrl_io_header; + when "000000000100" => + zz_io_bus_d_payload_data(31 downto 0) <= mapper_idCtrl_io_version; + when "000000001000" => + zz_io_bus_d_payload_data(31 downto 0) <= pkg_cat(pkg_stdLogicVector("0000000000000001"),pkg_stdLogicVector("0000000000100000")); + when "000000011000" => + zz_io_bus_d_payload_data(31 downto 0) <= interruptCtrl_4_io_pendings; + when "000000011100" => + zz_io_bus_d_payload_data(31 downto 0) <= io_masks_driver; + when "000000100000" => + zz_io_bus_d_payload_data(31 downto 0) <= interruptCtrl_5_io_pendings; + when "000000100100" => + zz_io_bus_d_payload_data(31 downto 0) <= io_masks_driver_1; + when "000000101000" => + zz_io_bus_d_payload_data(31 downto 0) <= interruptCtrl_6_io_pendings; + when "000000101100" => + zz_io_bus_d_payload_data(31 downto 0) <= io_masks_driver_2; + when "000000110000" => + zz_io_bus_d_payload_data(31 downto 0) <= interruptCtrl_7_io_pendings; + when "000000110100" => + zz_io_bus_d_payload_data(31 downto 0) <= io_masks_driver_3; + when "000000001100" => + zz_io_bus_d_payload_data(0 downto 0) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,0)); + zz_io_bus_d_payload_data(1 downto 1) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,1)); + zz_io_bus_d_payload_data(2 downto 2) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,2)); + zz_io_bus_d_payload_data(3 downto 3) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,3)); + zz_io_bus_d_payload_data(4 downto 4) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,4)); + zz_io_bus_d_payload_data(5 downto 5) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,5)); + zz_io_bus_d_payload_data(6 downto 6) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,6)); + zz_io_bus_d_payload_data(7 downto 7) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,7)); + zz_io_bus_d_payload_data(8 downto 8) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,8)); + zz_io_bus_d_payload_data(9 downto 9) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,9)); + zz_io_bus_d_payload_data(10 downto 10) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,10)); + zz_io_bus_d_payload_data(11 downto 11) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,11)); + zz_io_bus_d_payload_data(12 downto 12) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,12)); + zz_io_bus_d_payload_data(13 downto 13) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,13)); + zz_io_bus_d_payload_data(14 downto 14) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,14)); + zz_io_bus_d_payload_data(15 downto 15) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,15)); + zz_io_bus_d_payload_data(16 downto 16) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,16)); + zz_io_bus_d_payload_data(17 downto 17) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,17)); + zz_io_bus_d_payload_data(18 downto 18) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,18)); + zz_io_bus_d_payload_data(19 downto 19) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,19)); + zz_io_bus_d_payload_data(20 downto 20) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,20)); + zz_io_bus_d_payload_data(21 downto 21) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,21)); + zz_io_bus_d_payload_data(22 downto 22) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,22)); + zz_io_bus_d_payload_data(23 downto 23) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,23)); + zz_io_bus_d_payload_data(24 downto 24) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,24)); + zz_io_bus_d_payload_data(25 downto 25) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,25)); + zz_io_bus_d_payload_data(26 downto 26) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,26)); + zz_io_bus_d_payload_data(27 downto 27) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,27)); + zz_io_bus_d_payload_data(28 downto 28) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,28)); + zz_io_bus_d_payload_data(29 downto 29) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,29)); + zz_io_bus_d_payload_data(30 downto 30) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,30)); + zz_io_bus_d_payload_data(31 downto 31) <= pkg_toStdLogicVector(pkg_extract(ctrl_io_value,31)); + when "000000010000" => + zz_io_bus_d_payload_data(0 downto 0) <= pkg_toStdLogicVector(zz_io_config_write); + zz_io_bus_d_payload_data(1 downto 1) <= pkg_toStdLogicVector(zz_io_config_write_1); + zz_io_bus_d_payload_data(2 downto 2) <= pkg_toStdLogicVector(zz_io_config_write_2); + zz_io_bus_d_payload_data(3 downto 3) <= pkg_toStdLogicVector(zz_io_config_write_3); + zz_io_bus_d_payload_data(4 downto 4) <= pkg_toStdLogicVector(zz_io_config_write_4); + zz_io_bus_d_payload_data(5 downto 5) <= pkg_toStdLogicVector(zz_io_config_write_5); + zz_io_bus_d_payload_data(6 downto 6) <= pkg_toStdLogicVector(zz_io_config_write_6); + zz_io_bus_d_payload_data(7 downto 7) <= pkg_toStdLogicVector(zz_io_config_write_7); + zz_io_bus_d_payload_data(8 downto 8) <= pkg_toStdLogicVector(zz_io_config_write_8); + zz_io_bus_d_payload_data(9 downto 9) <= pkg_toStdLogicVector(zz_io_config_write_9); + zz_io_bus_d_payload_data(10 downto 10) <= pkg_toStdLogicVector(zz_io_config_write_10); + zz_io_bus_d_payload_data(11 downto 11) <= pkg_toStdLogicVector(zz_io_config_write_11); + zz_io_bus_d_payload_data(12 downto 12) <= pkg_toStdLogicVector(zz_io_config_write_12); + zz_io_bus_d_payload_data(13 downto 13) <= pkg_toStdLogicVector(zz_io_config_write_13); + zz_io_bus_d_payload_data(14 downto 14) <= pkg_toStdLogicVector(zz_io_config_write_14); + zz_io_bus_d_payload_data(15 downto 15) <= pkg_toStdLogicVector(zz_io_config_write_15); + zz_io_bus_d_payload_data(16 downto 16) <= pkg_toStdLogicVector(zz_io_config_write_16); + zz_io_bus_d_payload_data(17 downto 17) <= pkg_toStdLogicVector(zz_io_config_write_17); + zz_io_bus_d_payload_data(18 downto 18) <= pkg_toStdLogicVector(zz_io_config_write_18); + zz_io_bus_d_payload_data(19 downto 19) <= pkg_toStdLogicVector(zz_io_config_write_19); + zz_io_bus_d_payload_data(20 downto 20) <= pkg_toStdLogicVector(zz_io_config_write_20); + zz_io_bus_d_payload_data(21 downto 21) <= pkg_toStdLogicVector(zz_io_config_write_21); + zz_io_bus_d_payload_data(22 downto 22) <= pkg_toStdLogicVector(zz_io_config_write_22); + zz_io_bus_d_payload_data(23 downto 23) <= pkg_toStdLogicVector(zz_io_config_write_23); + zz_io_bus_d_payload_data(24 downto 24) <= pkg_toStdLogicVector(zz_io_config_write_24); + zz_io_bus_d_payload_data(25 downto 25) <= pkg_toStdLogicVector(zz_io_config_write_25); + zz_io_bus_d_payload_data(26 downto 26) <= pkg_toStdLogicVector(zz_io_config_write_26); + zz_io_bus_d_payload_data(27 downto 27) <= pkg_toStdLogicVector(zz_io_config_write_27); + zz_io_bus_d_payload_data(28 downto 28) <= pkg_toStdLogicVector(zz_io_config_write_28); + zz_io_bus_d_payload_data(29 downto 29) <= pkg_toStdLogicVector(zz_io_config_write_29); + zz_io_bus_d_payload_data(30 downto 30) <= pkg_toStdLogicVector(zz_io_config_write_30); + zz_io_bus_d_payload_data(31 downto 31) <= pkg_toStdLogicVector(zz_io_config_write_31); + when "000000010100" => + zz_io_bus_d_payload_data(0 downto 0) <= pkg_toStdLogicVector(zz_io_config_direction); + zz_io_bus_d_payload_data(1 downto 1) <= pkg_toStdLogicVector(zz_io_config_direction_1); + zz_io_bus_d_payload_data(2 downto 2) <= pkg_toStdLogicVector(zz_io_config_direction_2); + zz_io_bus_d_payload_data(3 downto 3) <= pkg_toStdLogicVector(zz_io_config_direction_3); + zz_io_bus_d_payload_data(4 downto 4) <= pkg_toStdLogicVector(zz_io_config_direction_4); + zz_io_bus_d_payload_data(5 downto 5) <= pkg_toStdLogicVector(zz_io_config_direction_5); + zz_io_bus_d_payload_data(6 downto 6) <= pkg_toStdLogicVector(zz_io_config_direction_6); + zz_io_bus_d_payload_data(7 downto 7) <= pkg_toStdLogicVector(zz_io_config_direction_7); + zz_io_bus_d_payload_data(8 downto 8) <= pkg_toStdLogicVector(zz_io_config_direction_8); + zz_io_bus_d_payload_data(9 downto 9) <= pkg_toStdLogicVector(zz_io_config_direction_9); + zz_io_bus_d_payload_data(10 downto 10) <= pkg_toStdLogicVector(zz_io_config_direction_10); + zz_io_bus_d_payload_data(11 downto 11) <= pkg_toStdLogicVector(zz_io_config_direction_11); + zz_io_bus_d_payload_data(12 downto 12) <= pkg_toStdLogicVector(zz_io_config_direction_12); + zz_io_bus_d_payload_data(13 downto 13) <= pkg_toStdLogicVector(zz_io_config_direction_13); + zz_io_bus_d_payload_data(14 downto 14) <= pkg_toStdLogicVector(zz_io_config_direction_14); + zz_io_bus_d_payload_data(15 downto 15) <= pkg_toStdLogicVector(zz_io_config_direction_15); + zz_io_bus_d_payload_data(16 downto 16) <= pkg_toStdLogicVector(zz_io_config_direction_16); + zz_io_bus_d_payload_data(17 downto 17) <= pkg_toStdLogicVector(zz_io_config_direction_17); + zz_io_bus_d_payload_data(18 downto 18) <= pkg_toStdLogicVector(zz_io_config_direction_18); + zz_io_bus_d_payload_data(19 downto 19) <= pkg_toStdLogicVector(zz_io_config_direction_19); + zz_io_bus_d_payload_data(20 downto 20) <= pkg_toStdLogicVector(zz_io_config_direction_20); + zz_io_bus_d_payload_data(21 downto 21) <= pkg_toStdLogicVector(zz_io_config_direction_21); + zz_io_bus_d_payload_data(22 downto 22) <= pkg_toStdLogicVector(zz_io_config_direction_22); + zz_io_bus_d_payload_data(23 downto 23) <= pkg_toStdLogicVector(zz_io_config_direction_23); + zz_io_bus_d_payload_data(24 downto 24) <= pkg_toStdLogicVector(zz_io_config_direction_24); + zz_io_bus_d_payload_data(25 downto 25) <= pkg_toStdLogicVector(zz_io_config_direction_25); + zz_io_bus_d_payload_data(26 downto 26) <= pkg_toStdLogicVector(zz_io_config_direction_26); + zz_io_bus_d_payload_data(27 downto 27) <= pkg_toStdLogicVector(zz_io_config_direction_27); + zz_io_bus_d_payload_data(28 downto 28) <= pkg_toStdLogicVector(zz_io_config_direction_28); + zz_io_bus_d_payload_data(29 downto 29) <= pkg_toStdLogicVector(zz_io_config_direction_29); + zz_io_bus_d_payload_data(30 downto 30) <= pkg_toStdLogicVector(zz_io_config_direction_30); + zz_io_bus_d_payload_data(31 downto 31) <= pkg_toStdLogicVector(zz_io_config_direction_31); + when others => + end case; + end process; + + zz_io_bus_d_payload_opcode_1 <= pkg_mux(pkg_toStdLogic(pkg_toStdLogicVector(pkg_toStdLogic(io_bus_a_payload_opcode = A_enc_GET)) /= pkg_stdLogicVector("0")),D_enc_ACCESS_ACK_DATA,D_enc_ACCESS_ACK); + zz_io_bus_d_payload_opcode <= zz_io_bus_d_payload_opcode_1; + process(io_bus_d_ready,when_Stream_l477) + begin + zz_io_bus_a_ready <= io_bus_d_ready; + if when_Stream_l477 = '1' then + zz_io_bus_a_ready <= pkg_toStdLogic(true); + end if; + end process; + + when_Stream_l477 <= (not zz_io_bus_d_valid); + zz_io_bus_d_valid <= zz_io_bus_d_valid_1; + zz_io_bus_d_payload_opcode_2 <= zz_io_bus_d_payload_opcode_3; + io_bus_d_valid <= zz_io_bus_d_valid; + io_bus_d_payload_opcode <= zz_io_bus_d_payload_opcode_2; + io_bus_d_payload_param <= zz_io_bus_d_payload_param; + io_bus_d_payload_source <= zz_io_bus_d_payload_source; + io_bus_d_payload_size <= zz_io_bus_d_payload_size; + io_bus_d_payload_denied <= zz_io_bus_d_payload_denied; + io_bus_d_payload_data <= zz_io_bus_d_payload_data_1; + io_bus_d_payload_corrupt <= zz_io_bus_d_payload_corrupt; + process(clk, reset) + begin + if reset = '1' then + io_masks_driver <= pkg_stdLogicVector("00000000000000000000000000000000"); + io_masks_driver_1 <= pkg_stdLogicVector("00000000000000000000000000000000"); + io_masks_driver_2 <= pkg_stdLogicVector("00000000000000000000000000000000"); + io_masks_driver_3 <= pkg_stdLogicVector("00000000000000000000000000000000"); + zz_io_config_write <= pkg_toStdLogic(false); + zz_io_config_direction <= pkg_toStdLogic(false); + zz_io_config_write_1 <= pkg_toStdLogic(false); + zz_io_config_direction_1 <= pkg_toStdLogic(false); + zz_io_config_write_2 <= pkg_toStdLogic(false); + zz_io_config_direction_2 <= pkg_toStdLogic(false); + zz_io_config_write_3 <= pkg_toStdLogic(false); + zz_io_config_direction_3 <= pkg_toStdLogic(false); + zz_io_config_write_4 <= pkg_toStdLogic(false); + zz_io_config_direction_4 <= pkg_toStdLogic(false); + zz_io_config_write_5 <= pkg_toStdLogic(false); + zz_io_config_direction_5 <= pkg_toStdLogic(false); + zz_io_config_write_6 <= pkg_toStdLogic(false); + zz_io_config_direction_6 <= pkg_toStdLogic(false); + zz_io_config_write_7 <= pkg_toStdLogic(false); + zz_io_config_direction_7 <= pkg_toStdLogic(false); + zz_io_config_write_8 <= pkg_toStdLogic(false); + zz_io_config_direction_8 <= pkg_toStdLogic(false); + zz_io_config_write_9 <= pkg_toStdLogic(false); + zz_io_config_direction_9 <= pkg_toStdLogic(false); + zz_io_config_write_10 <= pkg_toStdLogic(false); + zz_io_config_direction_10 <= pkg_toStdLogic(false); + zz_io_config_write_11 <= pkg_toStdLogic(false); + zz_io_config_direction_11 <= pkg_toStdLogic(false); + zz_io_config_write_12 <= pkg_toStdLogic(false); + zz_io_config_direction_12 <= pkg_toStdLogic(false); + zz_io_config_write_13 <= pkg_toStdLogic(false); + zz_io_config_direction_13 <= pkg_toStdLogic(false); + zz_io_config_write_14 <= pkg_toStdLogic(false); + zz_io_config_direction_14 <= pkg_toStdLogic(false); + zz_io_config_write_15 <= pkg_toStdLogic(false); + zz_io_config_direction_15 <= pkg_toStdLogic(false); + zz_io_config_write_16 <= pkg_toStdLogic(false); + zz_io_config_direction_16 <= pkg_toStdLogic(false); + zz_io_config_write_17 <= pkg_toStdLogic(false); + zz_io_config_direction_17 <= pkg_toStdLogic(false); + zz_io_config_write_18 <= pkg_toStdLogic(false); + zz_io_config_direction_18 <= pkg_toStdLogic(false); + zz_io_config_write_19 <= pkg_toStdLogic(false); + zz_io_config_direction_19 <= pkg_toStdLogic(false); + zz_io_config_write_20 <= pkg_toStdLogic(false); + zz_io_config_direction_20 <= pkg_toStdLogic(false); + zz_io_config_write_21 <= pkg_toStdLogic(false); + zz_io_config_direction_21 <= pkg_toStdLogic(false); + zz_io_config_write_22 <= pkg_toStdLogic(false); + zz_io_config_direction_22 <= pkg_toStdLogic(false); + zz_io_config_write_23 <= pkg_toStdLogic(false); + zz_io_config_direction_23 <= pkg_toStdLogic(false); + zz_io_config_write_24 <= pkg_toStdLogic(false); + zz_io_config_direction_24 <= pkg_toStdLogic(false); + zz_io_config_write_25 <= pkg_toStdLogic(false); + zz_io_config_direction_25 <= pkg_toStdLogic(false); + zz_io_config_write_26 <= pkg_toStdLogic(false); + zz_io_config_direction_26 <= pkg_toStdLogic(false); + zz_io_config_write_27 <= pkg_toStdLogic(false); + zz_io_config_direction_27 <= pkg_toStdLogic(false); + zz_io_config_write_28 <= pkg_toStdLogic(false); + zz_io_config_direction_28 <= pkg_toStdLogic(false); + zz_io_config_write_29 <= pkg_toStdLogic(false); + zz_io_config_direction_29 <= pkg_toStdLogic(false); + zz_io_config_write_30 <= pkg_toStdLogic(false); + zz_io_config_direction_30 <= pkg_toStdLogic(false); + zz_io_config_write_31 <= pkg_toStdLogic(false); + zz_io_config_direction_31 <= pkg_toStdLogic(false); + zz_io_bus_d_valid_1 <= pkg_toStdLogic(false); + elsif rising_edge(clk) then + if zz_io_bus_a_ready = '1' then + zz_io_bus_d_valid_1 <= ((io_bus_a_valid and (not zz_io_bus_a_ready_1)) and pkg_toStdLogic(true)); + end if; + case zz_3 is + when "000000011100" => + if zz_2 = '1' then + io_masks_driver <= pkg_extract(io_bus_a_payload_data,31,0); + end if; + when "000000100100" => + if zz_2 = '1' then + io_masks_driver_1 <= pkg_extract(io_bus_a_payload_data,31,0); + end if; + when "000000101100" => + if zz_2 = '1' then + io_masks_driver_2 <= pkg_extract(io_bus_a_payload_data,31,0); + end if; + when "000000110100" => + if zz_2 = '1' then + io_masks_driver_3 <= pkg_extract(io_bus_a_payload_data,31,0); + end if; + when "000000010000" => + if zz_2 = '1' then + zz_io_config_write <= pkg_extract(io_bus_a_payload_data,0); + zz_io_config_write_1 <= pkg_extract(io_bus_a_payload_data,1); + zz_io_config_write_2 <= pkg_extract(io_bus_a_payload_data,2); + zz_io_config_write_3 <= pkg_extract(io_bus_a_payload_data,3); + zz_io_config_write_4 <= pkg_extract(io_bus_a_payload_data,4); + zz_io_config_write_5 <= pkg_extract(io_bus_a_payload_data,5); + zz_io_config_write_6 <= pkg_extract(io_bus_a_payload_data,6); + zz_io_config_write_7 <= pkg_extract(io_bus_a_payload_data,7); + zz_io_config_write_8 <= pkg_extract(io_bus_a_payload_data,8); + zz_io_config_write_9 <= pkg_extract(io_bus_a_payload_data,9); + zz_io_config_write_10 <= pkg_extract(io_bus_a_payload_data,10); + zz_io_config_write_11 <= pkg_extract(io_bus_a_payload_data,11); + zz_io_config_write_12 <= pkg_extract(io_bus_a_payload_data,12); + zz_io_config_write_13 <= pkg_extract(io_bus_a_payload_data,13); + zz_io_config_write_14 <= pkg_extract(io_bus_a_payload_data,14); + zz_io_config_write_15 <= pkg_extract(io_bus_a_payload_data,15); + zz_io_config_write_16 <= pkg_extract(io_bus_a_payload_data,16); + zz_io_config_write_17 <= pkg_extract(io_bus_a_payload_data,17); + zz_io_config_write_18 <= pkg_extract(io_bus_a_payload_data,18); + zz_io_config_write_19 <= pkg_extract(io_bus_a_payload_data,19); + zz_io_config_write_20 <= pkg_extract(io_bus_a_payload_data,20); + zz_io_config_write_21 <= pkg_extract(io_bus_a_payload_data,21); + zz_io_config_write_22 <= pkg_extract(io_bus_a_payload_data,22); + zz_io_config_write_23 <= pkg_extract(io_bus_a_payload_data,23); + zz_io_config_write_24 <= pkg_extract(io_bus_a_payload_data,24); + zz_io_config_write_25 <= pkg_extract(io_bus_a_payload_data,25); + zz_io_config_write_26 <= pkg_extract(io_bus_a_payload_data,26); + zz_io_config_write_27 <= pkg_extract(io_bus_a_payload_data,27); + zz_io_config_write_28 <= pkg_extract(io_bus_a_payload_data,28); + zz_io_config_write_29 <= pkg_extract(io_bus_a_payload_data,29); + zz_io_config_write_30 <= pkg_extract(io_bus_a_payload_data,30); + zz_io_config_write_31 <= pkg_extract(io_bus_a_payload_data,31); + end if; + when "000000010100" => + if zz_2 = '1' then + zz_io_config_direction <= pkg_extract(io_bus_a_payload_data,0); + zz_io_config_direction_1 <= pkg_extract(io_bus_a_payload_data,1); + zz_io_config_direction_2 <= pkg_extract(io_bus_a_payload_data,2); + zz_io_config_direction_3 <= pkg_extract(io_bus_a_payload_data,3); + zz_io_config_direction_4 <= pkg_extract(io_bus_a_payload_data,4); + zz_io_config_direction_5 <= pkg_extract(io_bus_a_payload_data,5); + zz_io_config_direction_6 <= pkg_extract(io_bus_a_payload_data,6); + zz_io_config_direction_7 <= pkg_extract(io_bus_a_payload_data,7); + zz_io_config_direction_8 <= pkg_extract(io_bus_a_payload_data,8); + zz_io_config_direction_9 <= pkg_extract(io_bus_a_payload_data,9); + zz_io_config_direction_10 <= pkg_extract(io_bus_a_payload_data,10); + zz_io_config_direction_11 <= pkg_extract(io_bus_a_payload_data,11); + zz_io_config_direction_12 <= pkg_extract(io_bus_a_payload_data,12); + zz_io_config_direction_13 <= pkg_extract(io_bus_a_payload_data,13); + zz_io_config_direction_14 <= pkg_extract(io_bus_a_payload_data,14); + zz_io_config_direction_15 <= pkg_extract(io_bus_a_payload_data,15); + zz_io_config_direction_16 <= pkg_extract(io_bus_a_payload_data,16); + zz_io_config_direction_17 <= pkg_extract(io_bus_a_payload_data,17); + zz_io_config_direction_18 <= pkg_extract(io_bus_a_payload_data,18); + zz_io_config_direction_19 <= pkg_extract(io_bus_a_payload_data,19); + zz_io_config_direction_20 <= pkg_extract(io_bus_a_payload_data,20); + zz_io_config_direction_21 <= pkg_extract(io_bus_a_payload_data,21); + zz_io_config_direction_22 <= pkg_extract(io_bus_a_payload_data,22); + zz_io_config_direction_23 <= pkg_extract(io_bus_a_payload_data,23); + zz_io_config_direction_24 <= pkg_extract(io_bus_a_payload_data,24); + zz_io_config_direction_25 <= pkg_extract(io_bus_a_payload_data,25); + zz_io_config_direction_26 <= pkg_extract(io_bus_a_payload_data,26); + zz_io_config_direction_27 <= pkg_extract(io_bus_a_payload_data,27); + zz_io_config_direction_28 <= pkg_extract(io_bus_a_payload_data,28); + zz_io_config_direction_29 <= pkg_extract(io_bus_a_payload_data,29); + zz_io_config_direction_30 <= pkg_extract(io_bus_a_payload_data,30); + zz_io_config_direction_31 <= pkg_extract(io_bus_a_payload_data,31); + end if; + when others => + end case; + end if; + end process; + + process(clk) + begin + if rising_edge(clk) then + if zz_io_bus_a_ready = '1' then + zz_io_bus_d_payload_opcode_3 <= zz_io_bus_d_payload_opcode; + zz_io_bus_d_payload_param <= pkg_stdLogicVector("000"); + zz_io_bus_d_payload_source <= io_bus_a_payload_source; + zz_io_bus_d_payload_size <= io_bus_a_payload_size; + zz_io_bus_d_payload_denied <= pkg_toStdLogic(false); + zz_io_bus_d_payload_data_1 <= zz_io_bus_d_payload_data; + zz_io_bus_d_payload_corrupt <= pkg_toStdLogic(false); + end if; + end if; + end process; + +end arch; + diff --git a/sources/digital/peripherals/io/gpio/sky130A/constraints/io/gpio_tl_32b.tcl b/sources/digital/peripherals/io/gpio/sky130A/constraints/io/gpio_tl_32b.tcl new file mode 100644 index 0000000..bc705cf --- /dev/null +++ b/sources/digital/peripherals/io/gpio/sky130A/constraints/io/gpio_tl_32b.tcl @@ -0,0 +1,223 @@ +# SPDX-FileCopyrightText: 2026 aesc silicon +# +# SPDX-License-Identifier: CERN-OHL-W-2.0 + +# met2 (HORIZONTAL) → left/right edge pins; Y positions from DB track grid +# met3 (VERTICAL) → top edge pins; X positions from DB track grid +# +# Left edge — layout bottom→top: +# d_payload_data[0..31] (4-track) | reset | clk | a_payload_data[0..31] (4-track) +# | Channel A ctrl+addr (1-track) | Channel D ctrl (1-track) +# clk lands at track 222 ≈ die vertical centre (y ≈ 102 µm) +# +# Data buses use 4-track spacing for signal integrity. +# Control/address signals use 1-track spacing to fit within the 204 µm die height. +# Pin length = met2 pitch (0.46 µm); center snaps to a mfg-grid-aligned routing track. +# +# Right edge — 4-track spacing, 7-track gaps between the three GPIO groups +# +# All shared state uses the :: namespace so procs reach it regardless of the +# scope in which OpenROAD sources this file. + +set block [ord::get_db_block] +set die [$block getDieArea] +set tech [ord::get_db_tech] +set ::dbu [$tech getDbUnitsPerMicron] + +set ::x_left [expr {double([$die xMin]) / $::dbu}] +set ::x_right [expr {double([$die xMax]) / $::dbu}] +set ::y_top [expr {double([$die yMax]) / $::dbu}] + +# met2 — horizontal layer → left/right edge pins +set m2_layer [$tech findLayer "met2"] +set ::m2_y_all [[$block findTrackGrid $m2_layer] getGridY] +set ::m2_pin_sz [expr {double([$m2_layer getMinWidth]) / $::dbu}] +# Compute pin_len in integer DBU to avoid floating-point issues. +# Snap to next multiple of 2 × mfg_grid so that pin_len/2 (the center +# offset from the die edge) is also on the manufacturing grid — otherwise +# place_pin snaps the size up while the center stays off-grid (DRT-0416). +# Also ensures pin_len × minWidth ≥ minArea (DRC area rule). +set m2_pitch_dbu [$m2_layer getPitch] +set m2_minwidth_dbu [$m2_layer getMinWidth] +set m2_minarea_dbu2 [expr {int([$m2_layer getArea] * $::dbu * $::dbu + 0.5)}] +set mfg_grid_dbu [$tech getManufacturingGrid] +set snap_dbu [expr {2 * $mfg_grid_dbu}] +set min_len_dbu [expr {int(ceil(double($m2_minarea_dbu2) / $m2_minwidth_dbu))}] +set raw_len_dbu [expr {max($m2_pitch_dbu, $min_len_dbu)}] +set m2_len_dbu [expr {int(ceil(double($raw_len_dbu) / $snap_dbu)) * $snap_dbu}] +set ::m2_pin_len [expr {double($m2_len_dbu) / $::dbu}] + +# met3 — vertical layer → top edge pins +set m3_layer [$tech findLayer "met3"] +set ::m3_x_all [[$block findTrackGrid $m3_layer] getGridX] +set ::m3_pin_sz [expr {double([$m3_layer getMinWidth]) / $::dbu}] +set ::m3_pin_len [expr {double([$m3_layer getPitch]) / $::dbu}] + +# Y coordinate of the Nth met2 track (1-based) +proc m2_y {n} { + return [expr {double([lindex $::m2_y_all [expr {$n - 1}]]) / $::dbu}] +} + +# X coordinate of the Nth met3 track (1-based) +proc m3_x {n} { + return [expr {double([lindex $::m3_x_all [expr {$n - 1}]]) / $::dbu}] +} + +# Place a pin on the left die edge, extending inward by pin_len +proc place_left {pin_name track} { + place_pin -pin_name $pin_name \ + -layer met2 \ + -location [list [expr {$::x_left + $::m2_pin_len / 2}] [m2_y $track]] \ + -pin_size [list $::m2_pin_len $::m2_pin_sz] +} + +# Place a pin on the right die edge, extending inward by pin_len +proc place_right {pin_name track} { + place_pin -pin_name $pin_name \ + -layer met2 \ + -location [list [expr {$::x_right - $::m2_pin_len / 2}] [m2_y $track]] \ + -pin_size [list $::m2_pin_len $::m2_pin_sz] +} + +# met3 X track closest to die horizontal centre (for io_interrupt) +set cx [expr {([$die xMin] + [$die xMax]) / 2}] +set intr_i 0 +set intr_d [expr {abs([lindex $::m3_x_all 0] - $cx)}] +for {set i 1} {$i < [llength $::m3_x_all]} {incr i} { + set d [expr {abs([lindex $::m3_x_all $i] - $cx)}] + if {$d < $intr_d} { set intr_d $d; set intr_i $i } +} +set intr_x [expr {double([lindex $::m3_x_all $intr_i]) / $::dbu}] + +# ── Left edge — clk/reset at die vertical centre ───────────────────────────── +# +# Data buses: 4-track spacing +# Track 90..214 d_payload_data[0..31] (below centre) +# Track 218 reset +# Track 222 clk (≈ die centre y = 102 µm) +# Track 226..350 a_payload_data[0..31] (above centre) +# +# Control/address: 1-track spacing +# Track 354..355 Channel A handshake (a_valid, a_ready) +# Track 356..358 a_payload_opcode[0..2] +# Track 359..361 a_payload_param[0..2] +# Track 362..365 a_payload_source[0..3] +# Track 366..377 a_payload_address[0..11] +# Track 378..380 a_payload_size[0..2] +# Track 381..384 a_payload_mask[0..3] +# Track 385 a_payload_corrupt +# Track 386..387 Channel D handshake (d_valid, d_ready) +# Track 388..390 d_payload_opcode[0..2] +# Track 391..393 d_payload_param[0..2] +# Track 394..397 d_payload_source[0..3] +# Track 398..400 d_payload_size[0..2] +# Track 401 d_payload_denied +# Track 402 d_payload_corrupt + +# d_payload_data[0..31] (tracks 90..214, 4-track spacing) +for {set i 0} {$i < 32} {incr i} { + place_left "io_bus_d_payload_data\[$i\]" [expr {90 + $i * 4}] +} + +# reset / clk at centre +place_left reset 218 +place_left clk 222 + +# a_payload_data[0..31] (tracks 226..350, 4-track spacing) +for {set i 0} {$i < 32} {incr i} { + place_left "io_bus_a_payload_data\[$i\]" [expr {226 + $i * 4}] +} + +# Channel A handshake (tracks 354..355) +place_left io_bus_a_valid 354 +place_left io_bus_a_ready 355 + +# a_payload_opcode[0..2] (tracks 356..358) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_a_payload_opcode\[$i\]" [expr {356 + $i}] +} + +# a_payload_param[0..2] (tracks 359..361) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_a_payload_param\[$i\]" [expr {359 + $i}] +} + +# a_payload_source[0..3] (tracks 362..365) +for {set i 0} {$i < 4} {incr i} { + place_left "io_bus_a_payload_source\[$i\]" [expr {362 + $i}] +} + +# a_payload_address[0..11] (tracks 366..377) +for {set i 0} {$i < 12} {incr i} { + place_left "io_bus_a_payload_address\[$i\]" [expr {366 + $i}] +} + +# a_payload_size[0..2] (tracks 378..380) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_a_payload_size\[$i\]" [expr {378 + $i}] +} + +# a_payload_mask[0..3] (tracks 381..384) +for {set i 0} {$i < 4} {incr i} { + place_left "io_bus_a_payload_mask\[$i\]" [expr {381 + $i}] +} + +# a_payload_corrupt (track 385) +place_left io_bus_a_payload_corrupt 385 + +# Channel D handshake (tracks 386..387) +place_left io_bus_d_valid 386 +place_left io_bus_d_ready 387 + +# d_payload_opcode[0..2] (tracks 388..390) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_d_payload_opcode\[$i\]" [expr {388 + $i}] +} + +# d_payload_param[0..2] (tracks 391..393) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_d_payload_param\[$i\]" [expr {391 + $i}] +} + +# d_payload_source[0..3] (tracks 394..397) +for {set i 0} {$i < 4} {incr i} { + place_left "io_bus_d_payload_source\[$i\]" [expr {394 + $i}] +} + +# d_payload_size[0..2] (tracks 398..400) +for {set i 0} {$i < 3} {incr i} { + place_left "io_bus_d_payload_size\[$i\]" [expr {398 + $i}] +} + +# d_payload_denied (track 401) +place_left io_bus_d_payload_denied 401 + +# d_payload_corrupt (track 402) +place_left io_bus_d_payload_corrupt 402 + +# ── Right edge — 4-track spacing, 7-track gaps between groups ──────────────── +# +# Track 28..152 io_gpio_pins_read[0..31] +# Track 159..283 io_gpio_pins_write[0..31] +# Track 290..414 io_gpio_pins_writeEnable[0..31] + +# io_gpio_pins_read[0..31] (tracks 28..152) +for {set i 0} {$i < 32} {incr i} { + place_right "io_gpio_pins_read\[$i\]" [expr {28 + $i * 4}] +} + +# io_gpio_pins_write[0..31] (tracks 159..283) +for {set i 0} {$i < 32} {incr i} { + place_right "io_gpio_pins_write\[$i\]" [expr {159 + $i * 4}] +} + +# io_gpio_pins_writeEnable[0..31] (tracks 290..414) +for {set i 0} {$i < 32} {incr i} { + place_right "io_gpio_pins_writeEnable\[$i\]" [expr {290 + $i * 4}] +} + +# ── Top edge — met3, track nearest to die centre ────────────────────────────── +place_pin -pin_name io_interrupt \ + -layer met3 \ + -location [list $intr_x [expr {$::y_top - $::m3_pin_len / 2}]] \ + -pin_size [list $::m3_pin_sz $::m3_pin_len] diff --git a/sources/digital/peripherals/io/gpio/sky130A/flow/orfs/gpio_tl_32b/config.mk b/sources/digital/peripherals/io/gpio/sky130A/flow/orfs/gpio_tl_32b/config.mk new file mode 100644 index 0000000..b29ec87 --- /dev/null +++ b/sources/digital/peripherals/io/gpio/sky130A/flow/orfs/gpio_tl_32b/config.mk @@ -0,0 +1,27 @@ +# SPDX-FileCopyrightText: 2026 aesc silicon +# +# SPDX-License-Identifier: CERN-OHL-W-2.0 + +export DESIGN_NAME=gpio_tl_32b +export DESIGN_NICKNAME=gpio_tl_32b +export PLATFORM=sky130hd +export VERILOG_FILES=${IP_ROOT}/rtl/verilog/gpio_tl_32b.v +export DIE_AREA = 0.0 0.0 171.12 204.00 +export CORE_AREA = 11.50 10.88 159.62 193.12 +export LEC_CHECK = 0 +export MAX_ROUTING_LAYER = met4 +export PLACE_DENSITY = 0.80 +export CORNERS = slow typ fast +export SDC_FILE=${IP_ROOT}/${PDK}/constraints/sdc/gpio_x_x.sdc +export PDN_TCL=${IP_ROOT}/${PDK}/constraints/pdn/gpio_x_32b.tcl +export IO_CONSTRAINTS=${IP_ROOT}/${PDK}/constraints/io/gpio_tl_32b.tcl +export TECH_LEF = $(PDK_ROOT)/${PDK}/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef +export SC_LEF = $(PDK_ROOT)/${PDK}/libs.ref/sky130_fd_sc_hd/lef/sky130_fd_sc_hd.lef +export TYP_LIB_FILES = $(PDK_ROOT)/${PDK}/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__tt_025C_1v80.lib +export SLOW_LIB_FILES = $(PDK_ROOT)/${PDK}/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__ss_100C_1v60.lib +export FAST_LIB_FILES = $(PDK_ROOT)/${PDK}/libs.ref/sky130_fd_sc_hd/lib/sky130_fd_sc_hd__ff_n40C_1v95.lib +export TYP_LIB_FILES += $(ADDITIONAL_LIBS) +export SLOW_LIB_FILES += $(ADDITIONAL_SLOW_LIBS) +export FAST_LIB_FILES += $(ADDITIONAL_FAST_LIBS) +export GDS_FILES = $(PDK_ROOT)/${PDK}/libs.ref/sky130_fd_sc_hd/gds/sky130_fd_sc_hd.gds +export GDS_FILES += $(ADDITIONAL_GDS) diff --git a/sources/digital/peripherals/io/gpio/sky130A/flow/orfs/gpio_tl_32b/rules-base.json b/sources/digital/peripherals/io/gpio/sky130A/flow/orfs/gpio_tl_32b/rules-base.json new file mode 100644 index 0000000..fa8cfd9 --- /dev/null +++ b/sources/digital/peripherals/io/gpio/sky130A/flow/orfs/gpio_tl_32b/rules-base.json @@ -0,0 +1,102 @@ +{ + "synth__design__instance__area__stdcell": { + "value": 22200.0, + "compare": "<=" + }, + "constraints__clocks__count": { + "value": 1, + "compare": "==" + }, + "placeopt__design__instance__area": { + "value": 24316, + "compare": "<=" + }, + "placeopt__design__instance__count__stdcell": { + "value": 2404, + "compare": "<=" + }, + "detailedplace__design__violations": { + "value": 0, + "compare": "==" + }, + "cts__design__instance__count__setup_buffer": { + "value": 209, + "compare": "<=" + }, + "cts__design__instance__count__hold_buffer": { + "value": 209, + "compare": "<=" + }, + "cts__timing__setup__ws": { + "value": -1.0, + "compare": ">=" + }, + "cts__timing__setup__tns": { + "value": -4.0, + "compare": ">=" + }, + "cts__timing__hold__ws": { + "value": -1.0, + "compare": ">=" + }, + "cts__timing__hold__tns": { + "value": -4.0, + "compare": ">=" + }, + "globalroute__antenna_diodes_count": { + "value": 100, + "compare": "<=" + }, + "globalroute__timing__setup__ws": { + "value": -1.0, + "compare": ">=" + }, + "globalroute__timing__setup__tns": { + "value": -4.0, + "compare": ">=" + }, + "globalroute__timing__hold__ws": { + "value": -1.0, + "compare": ">=" + }, + "globalroute__timing__hold__tns": { + "value": -4.0, + "compare": ">=" + }, + "detailedroute__route__wirelength": { + "value": 89522, + "compare": "<=" + }, + "detailedroute__route__drc_errors": { + "value": 0, + "compare": "<=" + }, + "detailedroute__antenna__violating__nets": { + "value": 0, + "compare": "<=" + }, + "detailedroute__antenna_diodes_count": { + "value": 100, + "compare": "<=" + }, + "finish__timing__setup__ws": { + "value": -1.0, + "compare": ">=" + }, + "finish__timing__setup__tns": { + "value": -4.0, + "compare": ">=" + }, + "finish__timing__hold__ws": { + "value": -1.0, + "compare": ">=" + }, + "finish__timing__hold__tns": { + "value": -4.0, + "compare": ">=" + }, + "finish__design__instance__area": { + "value": 26260, + "compare": "<=" + } +} \ No newline at end of file diff --git a/sources/digital/peripherals/io/gpio/test/test_gpio_tl_32b.py b/sources/digital/peripherals/io/gpio/test/test_gpio_tl_32b.py new file mode 100644 index 0000000..49c7f1b --- /dev/null +++ b/sources/digital/peripherals/io/gpio/test/test_gpio_tl_32b.py @@ -0,0 +1,280 @@ +# SPDX-FileCopyrightText: 2026 aesc silicon +# +# SPDX-License-Identifier: CERN-OHL-W-2.0 + +""" +Cocotb testbench for gpio_tl_32b. + +DUT configuration (matches the generated gpio_tl_32b Verilog): + - 32 IO pins, readBufferDepth = 1 + +Note: test_io accesses the internal wire ``ctrl_io_value`` to verify the +input-synchronisation delay. The simulator must expose internal signals for +this assertion (e.g. Verilator with ``--public-flat-rw``). +""" + +import cocotb +from cocotb.clock import Clock +from cocotb.triggers import RisingEdge, FallingEdge, ClockCycles + +# ── Register map ────────────────────────────────────────────────────────────── +STATIC_OFFSET = 0x008 # self-disclosure: banks[31:16] | total_pins[15:0] +REG_OFFSET = 0x00C # IO bank 0 base address + +# Offsets relative to REG_OFFSET +OFF_INPUT = 0x00 +OFF_OUTPUT = 0x04 +OFF_DIR = 0x08 + +OFF_IRQ_HIGH_PEND = 0x0C +OFF_IRQ_HIGH_MASK = 0x10 +OFF_IRQ_LOW_PEND = 0x14 +OFF_IRQ_LOW_MASK = 0x18 +OFF_IRQ_RISE_PEND = 0x1C +OFF_IRQ_RISE_MASK = 0x20 +OFF_IRQ_FALL_PEND = 0x24 +OFF_IRQ_FALL_MASK = 0x28 + +# Actual number of flip-flop stages in the generated BufferCC. +# SpinalHDL always emits a 2-stage BufferCC regardless of readBufferDepth. +READ_BUFFER_DEPTH = 2 + +# TileLink opcodes +TL_A_GET = 4 +TL_A_PUT_FULL_DATA = 0 +TL_D_ACCESS_ACK = 0 +TL_D_ACCESS_ACK_DATA = 1 + + +# ── TileLink master driver ──────────────────────────────────────────────────── + +class TileLinkDriver: + """Minimal TileLink UL master driver (single-beat, no burst).""" + + def __init__(self, dut, source=0): + self._dut = dut + self._source = source + dut.io_bus_a_valid.value = 0 + dut.io_bus_a_payload_opcode.value = 0 + dut.io_bus_a_payload_param.value = 0 + dut.io_bus_a_payload_source.value = 0 + dut.io_bus_a_payload_address.value = 0 + dut.io_bus_a_payload_size.value = 2 # 4 bytes + dut.io_bus_a_payload_mask.value = 0xF + dut.io_bus_a_payload_data.value = 0 + dut.io_bus_a_payload_corrupt.value = 0 + dut.io_bus_d_ready.value = 1 + + async def write(self, addr: int, data: int) -> None: + dut = self._dut + await RisingEdge(dut.clk) + dut.io_bus_a_valid.value = 1 + dut.io_bus_a_payload_opcode.value = TL_A_PUT_FULL_DATA + dut.io_bus_a_payload_param.value = 0 + dut.io_bus_a_payload_source.value = self._source + dut.io_bus_a_payload_address.value = addr + dut.io_bus_a_payload_size.value = 2 # log2(4) = 2 + dut.io_bus_a_payload_mask.value = 0xF + dut.io_bus_a_payload_data.value = data & 0xFFFF_FFFF + dut.io_bus_a_payload_corrupt.value = 0 + # Wait for Channel A handshake + while True: + await RisingEdge(dut.clk) + if dut.io_bus_a_ready.value == 1: + break + dut.io_bus_a_valid.value = 0 + # Wait for Channel D response + while True: + await RisingEdge(dut.clk) + if dut.io_bus_d_valid.value == 1: + break + + async def read(self, addr: int) -> int: + dut = self._dut + await RisingEdge(dut.clk) + dut.io_bus_a_valid.value = 1 + dut.io_bus_a_payload_opcode.value = TL_A_GET + dut.io_bus_a_payload_param.value = 0 + dut.io_bus_a_payload_source.value = self._source + dut.io_bus_a_payload_address.value = addr + dut.io_bus_a_payload_size.value = 2 # log2(4) = 2 + dut.io_bus_a_payload_mask.value = 0xF + dut.io_bus_a_payload_data.value = 0 + dut.io_bus_a_payload_corrupt.value = 0 + # Wait for Channel A handshake + while True: + await RisingEdge(dut.clk) + if dut.io_bus_a_ready.value == 1: + break + dut.io_bus_a_valid.value = 0 + # Wait for Channel D response + while True: + await RisingEdge(dut.clk) + if dut.io_bus_d_valid.value == 1: + break + data = int(dut.io_bus_d_payload_data.value) + return data + + +# ── Helpers ─────────────────────────────────────────────────────────────────── + +async def reset_dut(dut) -> None: + dut.reset.value = 1 + dut.io_gpio_pins_read.value = 0 + await ClockCycles(dut.clk, 4) + dut.reset.value = 0 + await ClockCycles(dut.clk, 2) + + +# ── Tests ───────────────────────────────────────────────────────────────────── + +@cocotb.test() +async def test_io(dut): + """ + Verify IP identification, self-disclosure, input synchronisation, output + write masking, and direction masking. + """ + cocotb.start_soon(Clock(dut.clk, 10, unit="ns").start()) + tl = TileLinkDriver(dut) + await reset_dut(dut) + + # Check clean interrupt state after reset + await FallingEdge(dut.clk) + assert dut.io_interrupt.value == 0, \ + f"Interrupt pending after reset: {int(dut.io_interrupt.value)}" + + # IP identification header: API=0, length=8, ID=0x0000 + val = await tl.read(0x000) + assert val == 0x00080000, \ + f"Header register: expected 0x00080000, got 0x{val:08X}" + + # IP identification version: v1.0.0 + val = await tl.read(0x004) + assert val == 0x01000000, \ + f"Version register: expected 0x01000000, got 0x{val:08X}" + + # Self-disclosure: 1 bank, 32 pins + val = await tl.read(STATIC_OFFSET) + assert val == 0x00010020, \ + f"Self-disclosure: expected 0x00010020, got 0x{val:08X}" + + # Input synchronisation: drive all pins high and verify the sync delay. + dut.io_gpio_pins_read.value = 0xFFFF_FFFF + for _ in range(READ_BUFFER_DEPTH): + await FallingEdge(dut.clk) + assert int(dut.ctrl_io_value.value) == 0x00000000, \ + f"Sync delay: expected 0x00000000 after {READ_BUFFER_DEPTH} cycle(s), " \ + f"got 0x{int(dut.ctrl_io_value.value):08X}" + await FallingEdge(dut.clk) + assert int(dut.ctrl_io_value.value) == 0xFFFFFFFF, \ + f"Sync delay: expected 0xFFFFFFFF after sync, " \ + f"got 0x{int(dut.ctrl_io_value.value):08X}" + + # Input register via TileLink + val = await tl.read(REG_OFFSET + OFF_INPUT) + assert val == 0xFFFF_FFFF, \ + f"Input register: expected 0xFFFF_FFFF, got 0x{val:08X}" + + # Output register + await FallingEdge(dut.clk) + await tl.write(REG_OFFSET + OFF_OUTPUT, 0xFFFF_FFFF) + await FallingEdge(dut.clk) + assert int(dut.io_gpio_pins_write.value) == 0xFFFF_FFFF, \ + f"io_gpio_pins_write: expected 0xFFFF_FFFF, got 0x{int(dut.io_gpio_pins_write.value):08X}" + val = await tl.read(REG_OFFSET + OFF_OUTPUT) + assert val == 0xFFFF_FFFF, \ + f"Output register readback: expected 0xFFFF_FFFF, got 0x{val:08X}" + + # Direction register + await FallingEdge(dut.clk) + await tl.write(REG_OFFSET + OFF_DIR, 0xFFFF_FFFF) + await FallingEdge(dut.clk) + assert int(dut.io_gpio_pins_writeEnable.value) == 0xFFFF_FFFF, \ + f"io_gpio_pins_writeEnable: expected 0xFFFF_FFFF, " \ + f"got 0x{int(dut.io_gpio_pins_writeEnable.value):08X}" + val = await tl.read(REG_OFFSET + OFF_DIR) + assert val == 0xFFFF_FFFF, \ + f"Direction register readback: expected 0xFFFF_FFFF, got 0x{val:08X}" + + +@cocotb.test() +async def test_irq(dut): + """ + Verify all four interrupt channels: high-level, low-level, rising edge, + falling edge. + """ + cocotb.start_soon(Clock(dut.clk, 10, unit="ns").start()) + tl = TileLinkDriver(dut) + await reset_dut(dut) + + await FallingEdge(dut.clk) + assert dut.io_interrupt.value == 0, \ + f"Interrupt pending after reset: {int(dut.io_interrupt.value)}" + + # ── High-level interrupt ────────────────────────────────────────────────── + await tl.write(REG_OFFSET + OFF_IRQ_HIGH_PEND, 0xFFFF_FFFF) # clear + await tl.write(REG_OFFSET + OFF_IRQ_HIGH_MASK, 0xFFFF_FFFF) # enable + dut.io_gpio_pins_read.value = 0xFFFF_FFFF + for i in range(READ_BUFFER_DEPTH + 2): + assert dut.io_interrupt.value == 0, \ + f"IRQ high: premature interrupt on iteration {i}" + await FallingEdge(dut.clk) + assert dut.io_interrupt.value == 1, \ + "IRQ high: interrupt did not assert" + await tl.write(REG_OFFSET + OFF_IRQ_HIGH_MASK, 0x0000_0000) # disable + await FallingEdge(dut.clk) + assert dut.io_interrupt.value == 0, \ + "IRQ high: interrupt did not deassert after mask cleared" + + # ── Low-level interrupt ─────────────────────────────────────────────────── + await tl.write(REG_OFFSET + OFF_IRQ_LOW_PEND, 0xFFFF_FFFF) # clear + await tl.write(REG_OFFSET + OFF_IRQ_LOW_MASK, 0xFFFF_FFFF) # enable + dut.io_gpio_pins_read.value = 0x0000_0000 + for i in range(READ_BUFFER_DEPTH + 2): + assert dut.io_interrupt.value == 0, \ + f"IRQ low: premature interrupt on iteration {i}" + await FallingEdge(dut.clk) + assert dut.io_interrupt.value == 1, \ + "IRQ low: interrupt did not assert" + await tl.write(REG_OFFSET + OFF_IRQ_LOW_MASK, 0x0000_0000) # disable + await FallingEdge(dut.clk) + assert dut.io_interrupt.value == 0, \ + "IRQ low: interrupt did not deassert after mask cleared" + + # ── Rising-edge interrupt ───────────────────────────────────────────────── + await tl.write(REG_OFFSET + OFF_IRQ_RISE_PEND, 0xFFFF_FFFF) # clear + await tl.write(REG_OFFSET + OFF_IRQ_RISE_MASK, 0xFFFF_FFFF) # enable + dut.io_gpio_pins_read.value = 0x0000_0000 + assert dut.io_interrupt.value == 0, \ + "IRQ rise: interrupt should be 0 before edge" + await FallingEdge(dut.clk) + dut.io_gpio_pins_read.value = 0xFFFF_FFFF # rising edge + for i in range(READ_BUFFER_DEPTH + 1): + assert dut.io_interrupt.value == 0, \ + f"IRQ rise: premature interrupt on iteration {i}" + await FallingEdge(dut.clk) + assert dut.io_interrupt.value == 1, \ + "IRQ rise: interrupt did not assert" + await tl.write(REG_OFFSET + OFF_IRQ_RISE_MASK, 0x0000_0000) # disable + await FallingEdge(dut.clk) + assert dut.io_interrupt.value == 0, \ + "IRQ rise: interrupt did not deassert after mask cleared" + + # ── Falling-edge interrupt ──────────────────────────────────────────────── + await tl.write(REG_OFFSET + OFF_IRQ_FALL_PEND, 0xFFFF_FFFF) # clear + await tl.write(REG_OFFSET + OFF_IRQ_FALL_MASK, 0xFFFF_FFFF) # enable + dut.io_gpio_pins_read.value = 0xFFFF_FFFF + assert dut.io_interrupt.value == 0, \ + "IRQ fall: interrupt should be 0 before edge" + await FallingEdge(dut.clk) + dut.io_gpio_pins_read.value = 0x0000_0000 # falling edge + for i in range(READ_BUFFER_DEPTH + 1): + assert dut.io_interrupt.value == 0, \ + f"IRQ fall: premature interrupt on iteration {i}" + await FallingEdge(dut.clk) + assert dut.io_interrupt.value == 1, \ + "IRQ fall: interrupt did not assert" + await tl.write(REG_OFFSET + OFF_IRQ_FALL_MASK, 0x0000_0000) # disable + await FallingEdge(dut.clk) + assert dut.io_interrupt.value == 0, \ + "IRQ fall: interrupt did not deassert after mask cleared"