als244.github.io/index.html at master · als244/als244.github.io · GitHub

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    <meta name="description" content="Andrew Sheinberg">
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    <title>Andrew Sheinberg</title>

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  <h1>Andrew Sheinberg's Homepage</h1>

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  <a href="/">
  <img src="assets/graduation_pro_pic.jpg" alt="Andrew Sheinberg" width="258" height="285">
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  <li> <a href="research/research_home.html">Research</a> </li>
  <li> <a href="projects/project_home.html">Side Projects</a> </li>
  <li> <a href="favorite_pictures.html">Favorite Pictures</a> </li>
  <li> <a href="travels/travel_home.html">Trips</a> </li>
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  <h2 id="currentWork"> Current Work </h2>
  <p> Achieving near-peak Transformer training throughput, particularly beneficical in memory or communication constrained environments </p>
  <h3> <a href="https://github.com/als244/flextrain">Training Library: High Throughput, Low Memory Usage</a></h3>
  <!-- <h3> <a href=research/publications/adaws_0216_preprint.pdf>Adapative Working Set for Transformer Training (Preprint)</a></h3> -->
  <h4> <a href="https://dataflowsim.sunshein.net/">Transformer Dataflow Simulator</a></h4>

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    <h2 id="aboutMe"> About Me </h2>

    <p> Hi, I'm Andrew Sheinberg. I am a third-year CS PhD student at Princeton University advised by Professor Kai Li. Prior to Princeton, I graduated from Yale where where I studied Computer Science & Mathematics. I grew up in Barrington, RI.
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    <p>
    I am researching high-performant, machine learning systems. More specifically, I focus on understanding the relationships between operating systems and accelerator + networking software stacks. I'm developing a collection of efficent, robust, and portable software libraries to empower resource-concious machine learning workloads. In particular, this means maximizing compute utilization under memory or communication constraints. This entails investigating the low-level details of:
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      <li> Accelerator Memory-Management </li>
      <li> Accelerator Computation Scheduling </li>
      <li> Asynchronous Data Transfers across filesystems/host memory/PCIe/accelerator memory/accelerator interconnects/network </li>
      <li> InfiniBand/RoCE</li>
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     <p> There is a link to some side projects I've worked on over the years. I enjoy traveling and have linked some of my favorite photos. </p>

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    <h2 id="contact"> Contact </h2>
    Feel free to email me at: <a href="mailto:asheinb@princeton.edu">asheinb@princeton.edu</a>
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