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Segfault with certain typedef names #2647

@s-holst

Description

@s-holst

Consider this verilog module:

module m;
    typedef enum { FALSE, TRUE } u;
    //typedef u [0:1] yeah;  // "yeah" works
    typedef u [0:1] crash;  // "crash" segfaults
endmodule

This crashes synlig in systemverilog_plugin::synlig_simplify and this crash seems to depend on the name of the second typedef.

Here is the crash in GDB:

$ gdb /cad/synlig/bin/synlig
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Reading symbols from /cad/synlig/bin/synlig...
(No debugging symbols found in /cad/synlig/bin/synlig)
(gdb) r
Starting program: /cad/synlig/bin/synlig 
[Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1".

synlig> read_systemverilog -debug check.sv


1. Executing SystemVerilog frontend.
[INF:CM0023] Creating log file "/.../slpp_all/surelog.log".
[INF:CP0300] Compilation...
[INF:CP0303] /.../check.sv:1:1: Compile module "work@m".
[INF:CP0302] Compile class "work@mailbox".
[INF:CP0302] Compile class "work@process".
[INF:CP0302] Compile class "work@semaphore".
[INF:EL0526] Design Elaboration...
[NTE:EL0503] /.../check.sv:1:1: Top level module "work@m".
[NTE:EL0508] Nb Top level modules: 1.
[NTE:EL0509] Max instance depth: 1.
[NTE:EL0510] Nb instances: 1.
[NTE:EL0511] Nb leaf instances: 1.
[INF:UH0706] Creating UHDM Model...
[INF:UH0707] Elaborating UHDM...
[  FATAL] : 0
[ SYNTAX] : 0
[  ERROR] : 0
[WARNING] : 0
[   NOTE] : 5
Object 'work@m' of type 'design'
  Object 'builtin' of type 'package'
  Object 'work@m' of type 'module_inst'
    Object 'crash' of type 'packed_array_typespec'
      Object '' of type 'range'
        Object '' of type 'constant'
        Object '' of type 'constant'
      Object 'u' of type 'enum_typespec'
        Object 'FALSE' of type 'enum_const'
        Object 'TRUE' of type 'enum_const'
    Object 'u' of type 'enum_typespec'
      Object 'FALSE' of type 'enum_const'
      Object 'TRUE' of type 'enum_const'

Program received signal SIGSEGV, Segmentation fault.
0x00005555577b4200 in systemverilog_plugin::synlig_simplify(Yosys::AST::AstNode*, bool, bool, bool, int, int, bool, bool) ()
(gdb) 

I didn't manage to build synlig with debug symbols yet.
If you need more info, please let me know.

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