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260 changes: 260 additions & 0 deletions Documentation/devicetree/bindings/sound/ti,tac5x1x.yaml
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
# Copyright (C) 2025 Texas Instruments Incorporated
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/ti,tac5x1x.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Texas Instruments TAC5X1X Codec

description: |
TAC5X1X are series of low-power and high performance mono or stereo
audio codecs, as well as multiple inputs and outputs programmable in
single-ended or fully differential configurations. Device supports both
Microphone and Line In input on ADC Channel. DAC Output can be configured
for either Line Out or Head Phone Load.

The serial control bus supports SPI or I2C protocols, while the serial audio
data bus is programmable for I2S, left/right-justified, DSP, or TDM modes.

Specification about the codecs can be found at:
https://www.ti.com/lit/gpn/taa5212
https://www.ti.com/lit/gpn/taa5412-q1
https://www.ti.com/lit/gpn/tac5111
https://www.ti.com/lit/gpn/tac5112
https://www.ti.com/lit/gpn/tac5211
https://www.ti.com/lit/gpn/tac5212
https://www.ti.com/lit/gpn/tac5311-q1
https://www.ti.com/lit/gpn/tac5312-q1
https://www.ti.com/lit/gpn/tac5411-q1
https://www.ti.com/lit/gpn/tac5412-q1
https://www.ti.com/lit/gpn/tad5112
https://www.ti.com/lit/gpn/tad5212

maintainers:
- Niranjan H Y <niranjan.hy@ti.com>
- Kevin Lu <kevin-lu@ti.com>

properties:
compatible:
enum:
- ti,taa5212
- ti,taa5412
- ti,tac5111
- ti,tac5112
- ti,tac5211
- ti,tac5212
- ti,tac5311
- ti,tac5312
- ti,tac5411
- ti,tac5412
- ti,tad5112
- ti,tad5212

reg:
maxItems: 1

ti,vref:
description: VREF required voltage. If node is omitted then VREF is powered down.
$ref: /schemas/types.yaml#/definitions/uint32
oneOf:
- const: 0
description: VREF output is powered to 2.75V.
- const: 1
description: VREF output is powered to 2.5V.
- const: 2
description: VREF output is powered to 1.375V.

ti,micbias-vg:
description: MicBias required voltage. If node is omitted then MicBias is powered down.
$ref: /schemas/types.yaml#/definitions/uint32
oneOf:
- const: 0
description: MICBIAS output is same as the VREF output
- const: 1
description: MICBIAS output is 0.5 times the VREF output
- const: 3
description: MICBIAS output is same as the AVDD

avdd-supply:
description: Analog DAC voltage.

iovdd-supply:
description: I/O voltage.

ti,gpios-func:
description: |
Array indicating the GPIO1, GPIO2, GPO1 Functionality in the same order.
Each integer elemnent in the array represent the following
- 0 TAC5X1X_GPIO_DISABLE - GPIO is Disabled
- 1 TAC5X1X_GPIO_GPI - General Purpose Input
- 2 ADC3XXX_GPIO_GPO - General Purpose Output
- 3 TAC5X1X_GPIO_IRQ - Chip Interrupt
- 4 TAC5X1X_GPIO_PDMCLK - PDM CLK Output
- 5 TAC5X1X_GPIO_P_DOUT - Primary ASI DOUT
- 6 TAC5X1X_GPIO_P_DOUT2 - Primary ASI DOUT2
- 7 TAC5X1X_GPIO_S_DOUT - Secondary ASI DOUT
- 8 TAC5X1X_GPIO_S_DOUT2 - Secondary ASI DOUT2
- 9 TAC5X1X_GPIO_S_BCLK - Secondary BCLK Output
- 10 TAC5X1X_GPIO_S_FSYNC - Secondary FSYNC Output
- 11 TAC5X1X_GPIO_CLKOUT - General Purpose Output
- 12 TAC5X1X_GPIO_DOUT_MUX
- 13 TAC5X1X_GPIO_DAISY_OUT
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems: 3
maxItems: 3

ti,gpios-drive:
description: |
Array indicating the GPIO1, GPIO2, GPO1 Driver values
Each number in the array indicate the following driver values.
- 0 # Hi-Z Output
- 1 # Drive active low and active High
- 2 # Drive active low and weak High
- 3 # Drive acive low and Hi-Z
- 4 # Drive weak low and active High
- 5 # Drive Hi-Z and active High
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems: 3
maxItems: 3

ti,pdm-input-pins:
description: |
Array indicating the PDM Data Input for "Ch1 & Ch2" and "Ch3 & Ch4"
respectively. Each number in the array indicate the following
- 0 # PDM input disabled
- 1 # PDM input GPIO1
- 2 # PDM input GPIO2
- 3 # PDM input GPI1
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems: 2
maxItems: 2

ti,gpi1-func:
description: GPI1 Functionality
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 0 # TAC5X1X_GPIO_DISABLE - I/O buffers powered down and not used
- 1 # TAC5X1X_GPIO_GPI - General purpose input
default: 0

'#sound-dai-cells':
const: 0

clocks:
maxItems: 1

ti,gpa-gpio:
description: GPA using GPIO1 configuration
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 0 # GPA using GPIO1 is disabled
- 1 # GPA using GPIO1
default: 0

ti,in-ch-en:
description: Enable Input channel diagnostics for TAC54XX and TAC53XX device.
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 0 # Disable input channel diagnostics
- 1 # Enable input channel diagnostics

ti,out-ch-en:
description: Enable Output channel diagnostics for TAC54XX and TAC53XX device
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 0 # Disable Output channel diagnostics
- 1 # Enable Output channel Diagnostics

ti,incl-se-inm:
description: INxM pin Diagnostics Scan Selection for Single Ended Configuration
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 0 # INxM pin Diagnostics Scan Selection for Single Ended excluded for diagnosis
- 1 # INxM pin Diagnostics Scan Selection for Single Ended included for diagnosis

ti,incl-ac-coup:
description: AC coupled channels pins Scan Selection for Diagnostics
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 0 # AC coupled channels pins Scan Selection for Diagnostics exluded for diagnosis
- 1 # AC coupled channels pins Scan Selection for Diagnostics included for diagnosis

ti,micbias-threshold:
description: Micbias Low and High threshold values for TAC54XX and TAC53XX series
$ref: /schemas/types.yaml#/definitions/uint32-array
maxItems: 2
minItems: 2
items:
minimum: 72
maximum: 162

ti,gpa-threshold:
description: GPA Low and High threshold Values
$ref: /schemas/types.yaml#/definitions/uint32-array
maxItems: 2
minItems: 2
items:
minimum: 75
maximum: 186

ti,adc1-impedance:
description: Channel 1 Input Impedance Value
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 0 # 5 kOhm
- 1 # 10 kOhm
- 2 # 40 kOhm
default: 0

ti,adc2-impedance:
description: Channel 2 Input Impedance Value
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 0 # 5 kOhm
- 1 # 10 kOhm
- 2 # 40 kOhm
default: 0

ti,out2x-vcom-cfg:
description: Channel OUT2x VCOM configuration
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 0 # 0.6 * Vref
- 1 # AVDD by 2
default: 0

required:
- compatible
- reg

additionalProperties: false

examples:
- |
#include <dt-bindings/gpio/gpio.h>

i2c {
#address-cells = <1>;
#size-cells = <0>;

tac5x1x: tac5x1x@52 {
compatible = "ti,tac5212";
reg = <0x52>;
#sound-dai-cells = <0>;
avdd-supply = <&vdd_3v3_reg>;
iovdd-supply = <&vdd_3v3_reg>;
ti,vref = <0>;
ti,micbias-vg = <3>;
ti,gpi1-func = <0>;
ti,gpios-func = <4>, <1>, <0>;
ti,gpios-drive = <0>, <0>, <0>;
ti,gpa-gpio = <0>;
ti,in-ch-en = <1>;
ti,out-ch-en = <1>;
ti,incl-ac-coup = <0>;
ti,incl-se-inm = <0>;
ti,gpa-threshold = <75>, <186>;
};
};
...
3 changes: 3 additions & 0 deletions arch/arm64/boot/dts/freescale/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -382,6 +382,9 @@ imx95-19x19-evk-pcie1-ep-dtbs += imx95-19x19-evk.dtb imx-pcie1-ep.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk-pcie0-ep.dtb imx95-19x19-evk-pcie1-ep.dtb
dtb-$(CONFIG_ARCH_MXC) += imx95-libra-rdk-fpsc.dtb

dtb-$(CONFIG_ARCH_MXC) += imx93-ts9370.dtb


imx8mm-kontron-dl-dtbs := imx8mm-kontron-bl.dtb imx8mm-kontron-dl.dtbo
imx8mm-kontron-bl-lte-dtbs := imx8mm-kontron-bl.dtb imx8mm-kontron-bl-lte.dtbo

Expand Down
76 changes: 76 additions & 0 deletions arch/arm64/boot/dts/freescale/imx93-ts9370-pinfunc.h

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I'm not sure about the organization of this, e.g. should it be in the freescale/ folder, or our own folder since its IOMUX for our FPGA? should it have imx93- as the prefix, since its a pinfunc for our 9370 FPGA that happens to have an i.MX93 CPU?

@markfeathers if you have any ideas of this, let me know. Otherwise I'll probably dig a little bit more just to find any other platforms that might be doing something like this and how they have their IOMUXes laid out.

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2024-2026 Technologic Systems, Inc. (dba embeddedTS)
*/

#ifndef __DTS_TS9370_PINFUNC_H
#define __DTS_TS9370_PINFUNC_H

/*
* Tuple layout per pin-function:
* <pin_idx> <mux_mode> <highz_pin_idx> <highz_en>
*
* - mux_mode 0-7 : output selects function_index 0-7
* - highz_en == 1 : set the companion pin to high-Z
*/

#define TS9370_PAD_BT_RXD__UART6_TXD 0x000 0x1 0x000 0x0
#define TS9370_PAD_BT_CTS__UART6_RTS 0x003 0x1 0x000 0x0
#define TS9370_PAD_DP_19P2MHZ_CLK__DC_1 0x004 0x1 0x010 0x1
#define TS9370_PAD_MIKRO_TXD__GPIO0_IO14 0x006 0x0 0x000 0x0
#define TS9370_PAD_MIKRO_TXD__UART8_TXD 0x006 0x1 0x000 0x0
#define TS9370_PAD_MIKRO_RXD__GPIO0_IO15 0x007 0x0 0x000 0x0
#define TS9370_PAD_MIKRO_SPI_CLK__GPIO0_IO16 0x008 0x0 0x000 0x0
#define TS9370_PAD_MIKRO_SPI_CLK__LPSPI4_CLK 0x008 0x1 0x000 0x0
#define TS9370_PAD_MIKRO_SPI_CS___GPIO0_IO17 0x009 0x0 0x000 0x0
#define TS9370_PAD_MIKRO_SPI_CS___LPSPI4_CS_MUX_1 0x009 0x1 0x000 0x0
#define TS9370_PAD_MIKRO_SPI_MISO__GPIO0_IO18 0x00A 0x0 0x000 0x0
#define TS9370_PAD_MIKRO_SPI_MOSI__GPIO0_IO19 0x00B 0x0 0x000 0x0
#define TS9370_PAD_MIKRO_SPI_MOSI__LPSPI4_MOSI 0x00B 0x1 0x000 0x0
#define TS9370_PAD_MIKRO_RESET___GPIO0_IO20 0x00C 0x0 0x000 0x0
#define TS9370_PAD_MIKRO_AN__GPIO0_IO21 0x00D 0x0 0x000 0x0
#define TS9370_PAD_MIKRO_PWM__GPIO0_IO22 0x00E 0x0 0x000 0x0
#define TS9370_PAD_MIKRO_PWM__PWM0_OUT 0x00E 0x1 0x000 0x0
#define TS9370_PAD_MIKRO_INT__GPIO0_IO23 0x00F 0x0 0x000 0x0
#define TS9370_PAD_DC_1__GPIO2_IO27 0x010 0x0 0x000 0x0
#define TS9370_PAD_DC_1__UART7_TX 0x010 0x1 0x000 0x0
#define TS9370_PAD_DC_1__LPSPI4_CLK 0x010 0x2 0x000 0x0
#define TS9370_PAD_DC_3__GPIO2_IO28 0x011 0x0 0x000 0x0
#define TS9370_PAD_DC_5__GPIO2_IO29 0x012 0x0 0x000 0x0
#define TS9370_PAD_DC_5__UART7_RTS 0x012 0x1 0x000 0x0
#define TS9370_PAD_DC_5__LPSPI4_MOSI 0x012 0x2 0x000 0x0
#define TS9370_PAD_DC_7__GPIO2_IO30 0x013 0x0 0x000 0x0
#define TS9370_PAD_DC_7__LPSPI4_CS_MUX_2 0x013 0x1 0x000 0x0
#define TS9370_PAD_DC_9__GPIO2_IO31 0x014 0x0 0x000 0x0
#define TS9370_PAD_EN_LS_OUT_1__GPIO2_IO17 0x019 0x0 0x000 0x0
#define TS9370_PAD_EN_LS_OUT_2__GPIO2_IO18 0x01A 0x0 0x000 0x0
#define TS9370_PAD_EN_LS_OUT_3__GPIO2_IO19 0x01B 0x0 0x000 0x0
#define TS9370_PAD_EN_LS_OUT_4__GPIO2_IO20 0x01C 0x0 0x000 0x0
#define TS9370_PAD_EN_HS_SW__GPIO2_IO16 0x01D 0x0 0x000 0x0
#define TS9370_PAD_PRIM_485_TXD__UART7_TXD 0x01E 0x1 0x000 0x0
#define TS9370_PAD_PRIM_485_TXEN__UART7_RTS 0x01F 0x1 0x000 0x0
#define TS9370_PAD_SEC_485_TXEN__UART3_RTS 0x021 0x1 0x000 0x0
#define TS9370_PAD_SEC_UART_TX__UART3_TXD 0x023 0x1 0x000 0x0
#define TS9370_PAD_EN_GREEN_LED___GPIO0_IO0 0x024 0x0 0x000 0x0
#define TS9370_PAD_EN_RED_LED___GPIO0_IO2 0x025 0x0 0x000 0x0
#define TS9370_PAD_CODEC_CLK__PLL_CLK_OUT 0x027 0x1 0x000 0x0
#define TS9370_PAD_NIM_RESET___GPIO0_IO4 0x028 0x0 0x000 0x0
#define TS9370_PAD_NIM_CTS___GPIO0_IO5 0x029 0x0 0x000 0x0
#define TS9370_PAD_NIM_PWR_ON___GPIO0_IO6 0x02A 0x0 0x000 0x0
#define TS9370_PAD_NIM_TXD__GPIO0_IO10 0x02C 0x0 0x000 0x0
#define TS9370_PAD_NIM_TXD__UART5_TXD 0x02C 0x1 0x000 0x0
#define TS9370_PAD_NIM_RXD__GPIO0_IO11 0x02D 0x0 0x000 0x0
#define TS9370_PAD_UART3_RXD__SECOND_PORT_RXD_3V 0x031 0x1 0x000 0x0
#define TS9370_PAD_UART5_RXD__NIM_RXD 0x033 0x1 0x02D 0x1
#define TS9370_PAD_UART6_RXD__BT_TXD 0x034 0x1 0x001 0x1
#define TS9370_PAD_UART6_CTS__BT_RTS 0x035 0x1 0x002 0x1
#define TS9370_PAD_UART7_RXD__PRIM_485_RXD_3V 0x036 0x1 0x000 0x0
#define TS9370_PAD_UART7_RXD__DC_3 0x036 0x2 0x011 0x1
#define TS9370_PAD_UART7_RXD__SECOND_PORT_RXD_3V 0x036 0x3 0x000 0x0
#define TS9370_PAD_UART7_CTS__DC_7 0x037 0x1 0x013 0x1
#define TS9370_PAD_UART8_RXD__MIKRO_RXD 0x038 0x1 0x007 0x1
#define TS9370_PAD_LPSPI4_MISO_MUX_1__MIKRO_SPI_MISO 0x039 0x1 0x00A 0x1
#define TS9370_PAD_LPSPI4_MISO_MUX_2__DC_3 0x03A 0x1 0x011 0x1
#define TS9370_PAD_EN_BLUE_LED__GPIO0_IO3 0x03B 0x0 0x000 0x0

#endif /* __DTS_TS9370_PINFUNC_H */
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