Elephel have created an open source simulation of the GTX / GTP primitives inside the Xilinx parts. You can find more information here -> https://blog.elphel.com/2015/07/gtx_gpl-free-software-verilog-module-to-simulate-a-proprietary-fpga-primitive/
They used it for testing / developing their open source SATA core.
It would be good to see if we could get the DisplayPort core running in simulation on this.
Elephel have created an open source simulation of the GTX / GTP primitives inside the Xilinx parts. You can find more information here -> https://blog.elphel.com/2015/07/gtx_gpl-free-software-verilog-module-to-simulate-a-proprietary-fpga-primitive/
They used it for testing / developing their open source SATA core.
It would be good to see if we could get the DisplayPort core running in simulation on this.