From 742570125444c3507cdbdd7e539c16e0d9643aa7 Mon Sep 17 00:00:00 2001 From: kako-jun <3541096+kako-jun@users.noreply.github.com> Date: Mon, 6 Apr 2026 16:16:24 +0900 Subject: [PATCH 1/3] =?UTF-8?q?feat:=20kako-jun/riscfetch#3=20ISA=E6=8B=A1?= =?UTF-8?q?=E5=BC=B5=E3=82=92=E6=9C=80=E6=96=B0spec=E3=81=AB=E6=9B=B4?= =?UTF-8?q?=E6=96=B0=EF=BC=88144=E2=86=92147=EF=BC=89?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Ratified済みの3拡張を追加: - Zalasr: Load-Acquire/Store-Release (atomic) - Zce: Compressed for Embedded (comp、zca+zcb+zcmp+zcmtの集約) - Svrsw60t59b: PTE Bits 60-59 for SW (vm) spec日付を2026-04に更新。全READMEとSPEC.mdの拡張数を反映。 --- README.ja.md | 6 +++--- README.md | 6 +++--- README.zh-CN.md | 4 ++-- crates/riscfetch-cli/SPEC.md | 2 +- crates/riscfetch-core/src/extensions.rs | 5 ++++- 5 files changed, 13 insertions(+), 10 deletions(-) diff --git a/README.ja.md b/README.ja.md index e06bd6c..e1683e6 100644 --- a/README.ja.md +++ b/README.ja.md @@ -15,7 +15,7 @@ RISC-V システム情報ツール。ISA 拡張、hart 数、ハードウェア ## 特徴 -- **144 拡張に対応**（Z 拡張 98 種 + S 拡張 46 種） +- **147 拡張に対応**（Z 拡張 100 種 + S 拡張 47 種） - **カテゴリ別表示**で見やすい出力 - **13 種類のベンダーロゴ**（Pine64、WCH 含む） - スクリプト向け JSON 出力 @@ -50,7 +50,7 @@ sudo mv riscfetch-linux-riscv64 /usr/local/bin/riscfetch ```bash riscfetch # 標準出力 -riscfetch -a # 全144拡張を ✓/✗ で表示 +riscfetch -a # 全147拡張を ✓/✗ で表示 riscfetch -a -e # 全拡張を説明付きで表示 riscfetch -r # RISC-V 固有情報のみ（OS、メモリ等を除外） riscfetch -e # 各 ISA 拡張の説明を表示 @@ -92,7 +92,7 @@ User: user@visionfive2 |--------|------| | `-r, --riscv-only` | RISC-V 固有情報のみ表示（OS、メモリ、稼働時間を除外） | | `-e, --explain` | 各拡張の意味を表示 | -| `-a, --all` | 全144拡張を ✓/✗ チェックマーク付きで表示 | +| `-a, --all` | 全147拡張を ✓/✗ チェックマーク付きで表示 | | `-j, --json` | 機械可読な JSON 出力 | | `-b, --benchmark` | ISA 固有のベンチマーク | | `-l, --logo ` | ベンダーロゴ（下記参照） | diff --git a/README.md b/README.md index b8f5ea6..fa54643 100644 --- a/README.md +++ b/README.md @@ -15,7 +15,7 @@ System information tool for RISC-V. Displays ISA extensions, hart count, hardwar ## Features -- **144 extensions supported** (98 Z-extensions + 46 S-extensions) +- **147 extensions supported** (100 Z-extensions + 47 S-extensions) - **Category-based display** for easy reading - **13 vendor logos** including Pine64 and WCH - JSON output for scripting @@ -50,7 +50,7 @@ sudo mv riscfetch-linux-riscv64 /usr/local/bin/riscfetch ```bash riscfetch # standard output -riscfetch -a # show all 144 extensions with ✓/✗ +riscfetch -a # show all 147 extensions with ✓/✗ riscfetch -a -e # all extensions with descriptions riscfetch -r # RISC-V info only (no OS, memory, etc.) riscfetch -e # explain each ISA extension @@ -92,7 +92,7 @@ User: user@visionfive2 |------|-------------| | `-r, --riscv-only` | Show only RISC-V specific info (exclude OS, memory, uptime) | | `-e, --explain` | Show meaning of each extension | -| `-a, --all` | Show all 144 extensions with ✓/✗ checkmarks | +| `-a, --all` | Show all 147 extensions with ✓/✗ checkmarks | | `-j, --json` | Machine-readable JSON output | | `-b, --benchmark` | ISA-specific benchmarks | | `-l, --logo ` | Vendor logo (see below) | diff --git a/README.zh-CN.md b/README.zh-CN.md index 260400c..3eb1d80 100644 --- a/README.zh-CN.md +++ b/README.zh-CN.md @@ -15,7 +15,7 @@ RISC-V 系统信息工具。显示 ISA 扩展、hart 数量、硬件 ID 等信 ## 特性 -- **支持 144 种扩展**（98 种 Z 扩展 + 46 种 S 扩展） +- **支持 147 种扩展**（100 种 Z 扩展 + 47 种 S 扩展） - **分类显示**便于阅读 - **13 种厂商 logo**（包括 Pine64 和 WCH） - 脚本友好的 JSON 输出 @@ -92,7 +92,7 @@ User: user@visionfive2 |------|------| | `-r, --riscv-only` | 仅显示 RISC-V 特定信息（排除 OS、内存、运行时间） | | `-e, --explain` | 显示每个扩展的含义 | -| `-a, --all` | 显示全部 144 种扩展，带 ✓/✗ 标记 | +| `-a, --all` | 显示全部 147 种扩展，带 ✓/✗ 标记 | | `-j, --json` | 机器可读的 JSON 输出 | | `-b, --benchmark` | ISA 特定基准测试 | | `-l, --logo ` | 厂商 logo（见下文） | diff --git a/crates/riscfetch-cli/SPEC.md b/crates/riscfetch-cli/SPEC.md index 4f506ec..64a11e1 100644 --- a/crates/riscfetch-cli/SPEC.md +++ b/crates/riscfetch-cli/SPEC.md @@ -445,4 +445,4 @@ Example: `riscfetch 0.2.0` - Spec version: 2.1 - Last updated: 2025-12 - Based on RISC-V ISA spec version: 2025-11-26 -- Supports 98 Z-extensions and 46 S-extensions (144 total) +- Supports 100 Z-extensions and 47 S-extensions (147 total) diff --git a/crates/riscfetch-core/src/extensions.rs b/crates/riscfetch-core/src/extensions.rs index f599024..9f23c16 100644 --- a/crates/riscfetch-core/src/extensions.rs +++ b/crates/riscfetch-core/src/extensions.rs @@ -1,7 +1,7 @@ //! RISC-V extension definitions //! //! This module contains the constant definitions for all supported RISC-V extensions. -//! Based on RISC-V ISA specification (2025-11-26) and LLVM 22.0 support. +//! Based on RISC-V ISA specification (2026-04) and LLVM mainline support. /// Standard extension definitions /// Format: (char, name, description) @@ -71,12 +71,14 @@ pub const Z_EXTENSIONS: &[(&str, &str, &str, &str)] = &[ ("zcf", "Zcf", "Compressed Single FP", "comp"), ("zcmp", "Zcmp", "Compressed Push/Pop", "comp"), ("zcmt", "Zcmt", "Compressed Table Jump", "comp"), + ("zce", "Zce", "Compressed for Embedded", "comp"), ("zcmop", "Zcmop", "Compressed May-Be-Ops", "comp"), ("zclsd", "Zclsd", "Compressed LD/SD Pair", "comp"), // Atomics ("zacas", "Zacas", "Atomic Compare-and-Swap", "atomic"), ("zabha", "Zabha", "Atomic Byte/Halfword", "atomic"), ("zaamo", "Zaamo", "Atomic AMO Subset", "atomic"), + ("zalasr", "Zalasr", "Load-Acquire/Store-Release", "atomic"), ("zalrsc", "Zalrsc", "Atomic LR/SC Subset", "atomic"), ("zawrs", "Zawrs", "Wait-on-Reservation-Set", "atomic"), // Memory Model @@ -146,6 +148,7 @@ pub const S_EXTENSIONS: &[(&str, &str, &str, &str)] = &[ ("svade", "Svade", "A/D Update on Fault", "vm"), ("svadu", "Svadu", "A/D Hardware Update", "vm"), ("svbare", "Svbare", "Bare Translation Mode", "vm"), + ("svrsw60t59b", "Svrsw60t59b", "PTE Bits 60-59 for SW", "vm"), ("svvptc", "Svvptc", "VPTC Invalidation", "vm"), // Supervisor (Ss*) ("ssaia", "Ssaia", "Adv Interrupt Arch", "sup"), From bbbc7cbc4c820aa36a4cece7a52e8c6fbc154b92 Mon Sep 17 00:00:00 2001 From: kako-jun <3541096+kako-jun@users.noreply.github.com> Date: Mon, 6 Apr 2026 16:20:11 +0900 Subject: [PATCH 2/3] =?UTF-8?q?fix:=20=E3=83=AC=E3=83=93=E3=83=A5=E3=83=BC?= =?UTF-8?q?=E6=8C=87=E6=91=98=E4=BF=AE=E6=AD=A3=EF=BC=88144=E6=AE=8B?= =?UTF-8?q?=E5=AD=98=E7=AE=87=E6=89=80=E6=9B=B4=E6=96=B0=E3=80=81compresse?= =?UTF-8?q?d=E6=8B=A1=E5=BC=B5=E3=82=A2=E3=83=AB=E3=83=95=E3=82=A1?= =?UTF-8?q?=E3=83=99=E3=83=83=E3=83=88=E9=A0=86=E6=95=B4=E5=88=97=EF=BC=89?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- README.zh-CN.md | 2 +- crates/riscfetch-cli/SPEC.md | 2 +- crates/riscfetch-core/src/extensions.rs | 6 +++--- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/README.zh-CN.md b/README.zh-CN.md index 3eb1d80..1b29d01 100644 --- a/README.zh-CN.md +++ b/README.zh-CN.md @@ -50,7 +50,7 @@ sudo mv riscfetch-linux-riscv64 /usr/local/bin/riscfetch ```bash riscfetch # 标准输出 -riscfetch -a # 显示全部144个扩展，带 ✓/✗ 标记 +riscfetch -a # 显示全部147个扩展，带 ✓/✗ 标记 riscfetch -a -e # 全部扩展带说明 riscfetch -r # 仅显示 RISC-V 特定信息（排除 OS、内存等） riscfetch -e # 解释每个 ISA 扩展 diff --git a/crates/riscfetch-cli/SPEC.md b/crates/riscfetch-cli/SPEC.md index 64a11e1..0f9e387 100644 --- a/crates/riscfetch-cli/SPEC.md +++ b/crates/riscfetch-cli/SPEC.md @@ -182,7 +182,7 @@ S-Extensions (Supervisor): ## Output Format (--all Mode) -Shows ALL defined extensions (144 total) with checkmarks indicating support status: +Shows ALL defined extensions (147 total) with checkmarks indicating support status: - `✓` (green, bold) = Supported by this CPU - `✗` (gray/dim) = Not supported diff --git a/crates/riscfetch-core/src/extensions.rs b/crates/riscfetch-core/src/extensions.rs index 9f23c16..712f3a7 100644 --- a/crates/riscfetch-core/src/extensions.rs +++ b/crates/riscfetch-core/src/extensions.rs @@ -68,12 +68,12 @@ pub const Z_EXTENSIONS: &[(&str, &str, &str, &str)] = &[ ("zca", "Zca", "Compressed Base", "comp"), ("zcb", "Zcb", "Compressed Basic Ops", "comp"), ("zcd", "Zcd", "Compressed Double FP", "comp"), + ("zce", "Zce", "Compressed for Embedded", "comp"), ("zcf", "Zcf", "Compressed Single FP", "comp"), + ("zclsd", "Zclsd", "Compressed LD/SD Pair", "comp"), + ("zcmop", "Zcmop", "Compressed May-Be-Ops", "comp"), ("zcmp", "Zcmp", "Compressed Push/Pop", "comp"), ("zcmt", "Zcmt", "Compressed Table Jump", "comp"), - ("zce", "Zce", "Compressed for Embedded", "comp"), - ("zcmop", "Zcmop", "Compressed May-Be-Ops", "comp"), - ("zclsd", "Zclsd", "Compressed LD/SD Pair", "comp"), // Atomics ("zacas", "Zacas", "Atomic Compare-and-Swap", "atomic"), ("zabha", "Zabha", "Atomic Byte/Halfword", "atomic"), From 9ec375e364ede18928b09f15f17695fdcdedce0d Mon Sep 17 00:00:00 2001 From: kako-jun <3541096+kako-jun@users.noreply.github.com> Date: Mon, 6 Apr 2026 16:27:48 +0900 Subject: [PATCH 3/3] =?UTF-8?q?fix:=20=E3=83=AC=E3=83=93=E3=83=A5=E3=83=BC?= =?UTF-8?q?=E6=8C=87=E6=91=98=E4=BF=AE=E6=AD=A3=EF=BC=88SPEC.md=20spec?= =?UTF-8?q?=E6=97=A5=E4=BB=98=E6=9B=B4=E6=96=B0=E3=80=81Atomics=E3=82=A2?= =?UTF-8?q?=E3=83=AB=E3=83=95=E3=82=A1=E3=83=99=E3=83=83=E3=83=88=E9=A0=86?= =?UTF-8?q?=E6=95=B4=E5=88=97=EF=BC=89?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- crates/riscfetch-cli/SPEC.md | 2 +- crates/riscfetch-core/SPEC.md | 4 ++-- crates/riscfetch-core/src/extensions.rs | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/crates/riscfetch-cli/SPEC.md b/crates/riscfetch-cli/SPEC.md index 0f9e387..63f531b 100644 --- a/crates/riscfetch-cli/SPEC.md +++ b/crates/riscfetch-cli/SPEC.md @@ -444,5 +444,5 @@ Example: `riscfetch 0.2.0` - Spec version: 2.1 - Last updated: 2025-12 -- Based on RISC-V ISA spec version: 2025-11-26 +- Based on RISC-V ISA spec version: 2026-04 - Supports 100 Z-extensions and 47 S-extensions (147 total) diff --git a/crates/riscfetch-core/SPEC.md b/crates/riscfetch-core/SPEC.md index b668487..d614cc2 100644 --- a/crates/riscfetch-core/SPEC.md +++ b/crates/riscfetch-core/SPEC.md @@ -318,5 +318,5 @@ parse_extensions_compact("rv64gc") → "I M A F D C" (not "G C") - Spec version: 2.0 - Last updated: 2025-12 -- Based on RISC-V ISA spec version: 2025-11-26 (Unprivileged/Privileged) -- Reference: LLVM 22.0 RISC-V extension support +- Based on RISC-V ISA spec version: 2026-04 (Unprivileged/Privileged) +- Reference: LLVM mainline RISC-V extension support diff --git a/crates/riscfetch-core/src/extensions.rs b/crates/riscfetch-core/src/extensions.rs index 712f3a7..3221b5f 100644 --- a/crates/riscfetch-core/src/extensions.rs +++ b/crates/riscfetch-core/src/extensions.rs @@ -75,9 +75,9 @@ pub const Z_EXTENSIONS: &[(&str, &str, &str, &str)] = &[ ("zcmp", "Zcmp", "Compressed Push/Pop", "comp"), ("zcmt", "Zcmt", "Compressed Table Jump", "comp"), // Atomics - ("zacas", "Zacas", "Atomic Compare-and-Swap", "atomic"), - ("zabha", "Zabha", "Atomic Byte/Halfword", "atomic"), ("zaamo", "Zaamo", "Atomic AMO Subset", "atomic"), + ("zabha", "Zabha", "Atomic Byte/Halfword", "atomic"), + ("zacas", "Zacas", "Atomic Compare-and-Swap", "atomic"), ("zalasr", "Zalasr", "Load-Acquire/Store-Release", "atomic"), ("zalrsc", "Zalrsc", "Atomic LR/SC Subset", "atomic"), ("zawrs", "Zawrs", "Wait-on-Reservation-Set", "atomic"),