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Support custom PCF command on delay chain and external module configuration

Status: Open.

#2233 In lnis-uofu/OpenFPGA;

· tangxifan opened on Nov 12, 2025

The bitstream overloading from eBLIF only support 1 parameter

Status: Open.

#2232 In lnis-uofu/OpenFPGA;

· tangxifan opened on Nov 12, 2025

N2_lut5 mode bitstream generation error when LUT6 is split into two LUT5s

Status: Open.

#2210 In lnis-uofu/OpenFPGA;

· Nakiana opened on Oct 26, 2025

Latest version of openfpga, t the column transfer point, cin and cout of clb are not connected

Status: Open.

#2206 In lnis-uofu/OpenFPGA;

· Nakiana opened on Oct 23, 2025

How to bind an LUT7 operating pb_type to an LUT6 physical pb_type in OpenFPGA

Status: Open.

#2150 In lnis-uofu/OpenFPGA;

· Nakiana opened on Sep 19, 2025

[WIP] MIF support

Status: Open.

#2136 In lnis-uofu/OpenFPGA;

· tangxifan opened on Sep 10, 2025

GSB Writer

Status: Open.

#2081 In lnis-uofu/OpenFPGA;

· amin1377 opened on Jul 31, 2025

Using global context

Status: Open.

#2080 In lnis-uofu/OpenFPGA;

· amin1377 opened on Jul 31, 2025

Create spice netlist

Status: Open.

#2069 In lnis-uofu/OpenFPGA;

· Alex555961 opened on Jul 22, 2025

LUT: is level restorer inside

Status: Open.

#2056 In lnis-uofu/OpenFPGA;

· alexandergrtechnion opened on Jul 9, 2025

Are clock network delays analyzed when using OpenFPGA Clock Network?

Status: Open.

#2053 In lnis-uofu/OpenFPGA;

· mustafaarslan0 opened on Jul 7, 2025

Documentation for segment list is_bent

Status: Open.

#2038 In lnis-uofu/OpenFPGA;

· amin1377 opened on Jun 18, 2025