[question] Passthrough address

[SzymonHitachi]

Is there any way to specify address range to be passthrough through the module? This way one could achieve a simple FIFO / work portal based on CSR interface, while still accessing the CSRs. It's a similar use case to Intel DSA API https://www.intel.com/content/www/us/en/content-details/759709/intel-data-streaming-accelerator-user-guide.html

[taichi-ishitani]

Hi @SzymonHitachi ,

I think that the external register type is suitable for this.

https://github.com/rggen/rggen-sample/blob/b0439abf7d5fa6086c4d0aef0ffcdc6836506f06/block_0.yml#L178
https://github.com/rggen/rggen-sample/blob/b0439abf7d5fa6086c4d0aef0ffcdc6836506f06/block_0.vhd#L144-L151
For this sample, address range 0x80 - 0xFF can be connected to an other module.

The bus protocol to connect this register is described below.
https://github.com/rggen/rggen/wiki/Specification-for-RgGen-Bus-Interface-Protocol

[SzymonHitachi]

Is it supported by .xlsx input format or yaml only?

[taichi-ishitani]

xlsx also supports this type.
See the sample xlsx file.
https://github.com/rggen/rggen-sample/blob/master/block_0.xlsx

[SzymonHitachi]

Thank you. Got a bit confused because of the two type fields in xlsx

[taichi-ishitani]

The 1st type is the register type.
https://github.com/rggen/rggen/wiki/Register-Map-Specifications#type

The 2nd type is the bit field type.
https://github.com/rggen/rggen/wiki/Register-Map-Specifications#type-1

[SzymonHitachi]

Works as expected after the fix :)