diff --git a/src/riscv64/instruction.rs b/src/riscv64/instruction.rs
index 6046c9c..0363583 100644
--- a/src/riscv64/instruction.rs
+++ b/src/riscv64/instruction.rs
@@ -318,19 +318,219 @@ pub mod m_funct7 {
 pub mod csr {
     use super::Csr;
     
-    // Machine-mode CSRs
+    // Machine Information Registers
+    pub const MVENDORID: Csr = Csr::new(0xf11);
+    pub const MARCHID: Csr = Csr::new(0xf12);
+    pub const MIMPID: Csr = Csr::new(0xf13);
+    pub const MHARTID: Csr = Csr::new(0xf14);
+    pub const MCONFIGPTR: Csr = Csr::new(0xf15);
+    
+    // Machine Trap Setup
     pub const MSTATUS: Csr = Csr::new(0x300);
     pub const MISA: Csr = Csr::new(0x301);
     pub const MEDELEG: Csr = Csr::new(0x302);
     pub const MIDELEG: Csr = Csr::new(0x303);
     pub const MIE: Csr = Csr::new(0x304);
     pub const MTVEC: Csr = Csr::new(0x305);
+    pub const MCOUNTEREN: Csr = Csr::new(0x306);
+    pub const MSTATUSH: Csr = Csr::new(0x310);
+    
+    // Machine Trap Handling
     pub const MSCRATCH: Csr = Csr::new(0x340);
     pub const MEPC: Csr = Csr::new(0x341);
     pub const MCAUSE: Csr = Csr::new(0x342);
     pub const MTVAL: Csr = Csr::new(0x343);
     pub const MIP: Csr = Csr::new(0x344);
-    pub const MHARTID: Csr = Csr::new(0xf14);
+    pub const MTINST: Csr = Csr::new(0x34a);
+    pub const MTVAL2: Csr = Csr::new(0x34b);
+    
+    // Machine Configuration
+    pub const MENVCFG: Csr = Csr::new(0x30a);
+    pub const MENVCFGH: Csr = Csr::new(0x31a);
+    pub const MSECCFG: Csr = Csr::new(0x747);
+    pub const MSECCFGH: Csr = Csr::new(0x757);
+    
+    // Machine Memory Protection - Configuration
+    pub const PMPCFG0: Csr = Csr::new(0x3a0);
+    pub const PMPCFG1: Csr = Csr::new(0x3a1);
+    pub const PMPCFG2: Csr = Csr::new(0x3a2);
+    pub const PMPCFG3: Csr = Csr::new(0x3a3);
+    pub const PMPCFG4: Csr = Csr::new(0x3a4);
+    pub const PMPCFG5: Csr = Csr::new(0x3a5);
+    pub const PMPCFG6: Csr = Csr::new(0x3a6);
+    pub const PMPCFG7: Csr = Csr::new(0x3a7);
+    pub const PMPCFG8: Csr = Csr::new(0x3a8);
+    pub const PMPCFG9: Csr = Csr::new(0x3a9);
+    pub const PMPCFG10: Csr = Csr::new(0x3aa);
+    pub const PMPCFG11: Csr = Csr::new(0x3ab);
+    pub const PMPCFG12: Csr = Csr::new(0x3ac);
+    pub const PMPCFG13: Csr = Csr::new(0x3ad);
+    pub const PMPCFG14: Csr = Csr::new(0x3ae);
+    pub const PMPCFG15: Csr = Csr::new(0x3af);
+    
+    // Machine Memory Protection - Address
+    pub const PMPADDR0: Csr = Csr::new(0x3b0);
+    pub const PMPADDR1: Csr = Csr::new(0x3b1);
+    pub const PMPADDR2: Csr = Csr::new(0x3b2);
+    pub const PMPADDR3: Csr = Csr::new(0x3b3);
+    pub const PMPADDR4: Csr = Csr::new(0x3b4);
+    pub const PMPADDR5: Csr = Csr::new(0x3b5);
+    pub const PMPADDR6: Csr = Csr::new(0x3b6);
+    pub const PMPADDR7: Csr = Csr::new(0x3b7);
+    pub const PMPADDR8: Csr = Csr::new(0x3b8);
+    pub const PMPADDR9: Csr = Csr::new(0x3b9);
+    pub const PMPADDR10: Csr = Csr::new(0x3ba);
+    pub const PMPADDR11: Csr = Csr::new(0x3bb);
+    pub const PMPADDR12: Csr = Csr::new(0x3bc);
+    pub const PMPADDR13: Csr = Csr::new(0x3bd);
+    pub const PMPADDR14: Csr = Csr::new(0x3be);
+    pub const PMPADDR15: Csr = Csr::new(0x3bf);
+    pub const PMPADDR16: Csr = Csr::new(0x3c0);
+    pub const PMPADDR17: Csr = Csr::new(0x3c1);
+    pub const PMPADDR18: Csr = Csr::new(0x3c2);
+    pub const PMPADDR19: Csr = Csr::new(0x3c3);
+    pub const PMPADDR20: Csr = Csr::new(0x3c4);
+    pub const PMPADDR21: Csr = Csr::new(0x3c5);
+    pub const PMPADDR22: Csr = Csr::new(0x3c6);
+    pub const PMPADDR23: Csr = Csr::new(0x3c7);
+    pub const PMPADDR24: Csr = Csr::new(0x3c8);
+    pub const PMPADDR25: Csr = Csr::new(0x3c9);
+    pub const PMPADDR26: Csr = Csr::new(0x3ca);
+    pub const PMPADDR27: Csr = Csr::new(0x3cb);
+    pub const PMPADDR28: Csr = Csr::new(0x3cc);
+    pub const PMPADDR29: Csr = Csr::new(0x3cd);
+    pub const PMPADDR30: Csr = Csr::new(0x3ce);
+    pub const PMPADDR31: Csr = Csr::new(0x3cf);
+    pub const PMPADDR32: Csr = Csr::new(0x3d0);
+    pub const PMPADDR33: Csr = Csr::new(0x3d1);
+    pub const PMPADDR34: Csr = Csr::new(0x3d2);
+    pub const PMPADDR35: Csr = Csr::new(0x3d3);
+    pub const PMPADDR36: Csr = Csr::new(0x3d4);
+    pub const PMPADDR37: Csr = Csr::new(0x3d5);
+    pub const PMPADDR38: Csr = Csr::new(0x3d6);
+    pub const PMPADDR39: Csr = Csr::new(0x3d7);
+    pub const PMPADDR40: Csr = Csr::new(0x3d8);
+    pub const PMPADDR41: Csr = Csr::new(0x3d9);
+    pub const PMPADDR42: Csr = Csr::new(0x3da);
+    pub const PMPADDR43: Csr = Csr::new(0x3db);
+    pub const PMPADDR44: Csr = Csr::new(0x3dc);
+    pub const PMPADDR45: Csr = Csr::new(0x3dd);
+    pub const PMPADDR46: Csr = Csr::new(0x3de);
+    pub const PMPADDR47: Csr = Csr::new(0x3df);
+    pub const PMPADDR48: Csr = Csr::new(0x3e0);
+    pub const PMPADDR49: Csr = Csr::new(0x3e1);
+    pub const PMPADDR50: Csr = Csr::new(0x3e2);
+    pub const PMPADDR51: Csr = Csr::new(0x3e3);
+    pub const PMPADDR52: Csr = Csr::new(0x3e4);
+    pub const PMPADDR53: Csr = Csr::new(0x3e5);
+    pub const PMPADDR54: Csr = Csr::new(0x3e6);
+    pub const PMPADDR55: Csr = Csr::new(0x3e7);
+    pub const PMPADDR56: Csr = Csr::new(0x3e8);
+    pub const PMPADDR57: Csr = Csr::new(0x3e9);
+    pub const PMPADDR58: Csr = Csr::new(0x3ea);
+    pub const PMPADDR59: Csr = Csr::new(0x3eb);
+    pub const PMPADDR60: Csr = Csr::new(0x3ec);
+    pub const PMPADDR61: Csr = Csr::new(0x3ed);
+    pub const PMPADDR62: Csr = Csr::new(0x3ee);
+    pub const PMPADDR63: Csr = Csr::new(0x3ef);
+    
+    // Machine Counter/Timers
+    pub const MCYCLE: Csr = Csr::new(0xb00);
+    pub const MINSTRET: Csr = Csr::new(0xb02);
+    pub const MHPMCOUNTER3: Csr = Csr::new(0xb03);
+    pub const MHPMCOUNTER4: Csr = Csr::new(0xb04);
+    pub const MHPMCOUNTER5: Csr = Csr::new(0xb05);
+    pub const MHPMCOUNTER6: Csr = Csr::new(0xb06);
+    pub const MHPMCOUNTER7: Csr = Csr::new(0xb07);
+    pub const MHPMCOUNTER8: Csr = Csr::new(0xb08);
+    pub const MHPMCOUNTER9: Csr = Csr::new(0xb09);
+    pub const MHPMCOUNTER10: Csr = Csr::new(0xb0a);
+    pub const MHPMCOUNTER11: Csr = Csr::new(0xb0b);
+    pub const MHPMCOUNTER12: Csr = Csr::new(0xb0c);
+    pub const MHPMCOUNTER13: Csr = Csr::new(0xb0d);
+    pub const MHPMCOUNTER14: Csr = Csr::new(0xb0e);
+    pub const MHPMCOUNTER15: Csr = Csr::new(0xb0f);
+    pub const MHPMCOUNTER16: Csr = Csr::new(0xb10);
+    pub const MHPMCOUNTER17: Csr = Csr::new(0xb11);
+    pub const MHPMCOUNTER18: Csr = Csr::new(0xb12);
+    pub const MHPMCOUNTER19: Csr = Csr::new(0xb13);
+    pub const MHPMCOUNTER20: Csr = Csr::new(0xb14);
+    pub const MHPMCOUNTER21: Csr = Csr::new(0xb15);
+    pub const MHPMCOUNTER22: Csr = Csr::new(0xb16);
+    pub const MHPMCOUNTER23: Csr = Csr::new(0xb17);
+    pub const MHPMCOUNTER24: Csr = Csr::new(0xb18);
+    pub const MHPMCOUNTER25: Csr = Csr::new(0xb19);
+    pub const MHPMCOUNTER26: Csr = Csr::new(0xb1a);
+    pub const MHPMCOUNTER27: Csr = Csr::new(0xb1b);
+    pub const MHPMCOUNTER28: Csr = Csr::new(0xb1c);
+    pub const MHPMCOUNTER29: Csr = Csr::new(0xb1d);
+    pub const MHPMCOUNTER30: Csr = Csr::new(0xb1e);
+    pub const MHPMCOUNTER31: Csr = Csr::new(0xb1f);
+    
+    // Machine Counter/Timers - High (for RV32)
+    pub const MCYCLEH: Csr = Csr::new(0xb80);
+    pub const MINSTRETH: Csr = Csr::new(0xb82);
+    pub const MHPMCOUNTER3H: Csr = Csr::new(0xb83);
+    pub const MHPMCOUNTER4H: Csr = Csr::new(0xb84);
+    pub const MHPMCOUNTER5H: Csr = Csr::new(0xb85);
+    pub const MHPMCOUNTER6H: Csr = Csr::new(0xb86);
+    pub const MHPMCOUNTER7H: Csr = Csr::new(0xb87);
+    pub const MHPMCOUNTER8H: Csr = Csr::new(0xb88);
+    pub const MHPMCOUNTER9H: Csr = Csr::new(0xb89);
+    pub const MHPMCOUNTER10H: Csr = Csr::new(0xb8a);
+    pub const MHPMCOUNTER11H: Csr = Csr::new(0xb8b);
+    pub const MHPMCOUNTER12H: Csr = Csr::new(0xb8c);
+    pub const MHPMCOUNTER13H: Csr = Csr::new(0xb8d);
+    pub const MHPMCOUNTER14H: Csr = Csr::new(0xb8e);
+    pub const MHPMCOUNTER15H: Csr = Csr::new(0xb8f);
+    pub const MHPMCOUNTER16H: Csr = Csr::new(0xb90);
+    pub const MHPMCOUNTER17H: Csr = Csr::new(0xb91);
+    pub const MHPMCOUNTER18H: Csr = Csr::new(0xb92);
+    pub const MHPMCOUNTER19H: Csr = Csr::new(0xb93);
+    pub const MHPMCOUNTER20H: Csr = Csr::new(0xb94);
+    pub const MHPMCOUNTER21H: Csr = Csr::new(0xb95);
+    pub const MHPMCOUNTER22H: Csr = Csr::new(0xb96);
+    pub const MHPMCOUNTER23H: Csr = Csr::new(0xb97);
+    pub const MHPMCOUNTER24H: Csr = Csr::new(0xb98);
+    pub const MHPMCOUNTER25H: Csr = Csr::new(0xb99);
+    pub const MHPMCOUNTER26H: Csr = Csr::new(0xb9a);
+    pub const MHPMCOUNTER27H: Csr = Csr::new(0xb9b);
+    pub const MHPMCOUNTER28H: Csr = Csr::new(0xb9c);
+    pub const MHPMCOUNTER29H: Csr = Csr::new(0xb9d);
+    pub const MHPMCOUNTER30H: Csr = Csr::new(0xb9e);
+    pub const MHPMCOUNTER31H: Csr = Csr::new(0xb9f);
+    
+    // Machine Counter Setup
+    pub const MCOUNTINHIBIT: Csr = Csr::new(0x320);
+    pub const MHPMEVENT3: Csr = Csr::new(0x323);
+    pub const MHPMEVENT4: Csr = Csr::new(0x324);
+    pub const MHPMEVENT5: Csr = Csr::new(0x325);
+    pub const MHPMEVENT6: Csr = Csr::new(0x326);
+    pub const MHPMEVENT7: Csr = Csr::new(0x327);
+    pub const MHPMEVENT8: Csr = Csr::new(0x328);
+    pub const MHPMEVENT9: Csr = Csr::new(0x329);
+    pub const MHPMEVENT10: Csr = Csr::new(0x32a);
+    pub const MHPMEVENT11: Csr = Csr::new(0x32b);
+    pub const MHPMEVENT12: Csr = Csr::new(0x32c);
+    pub const MHPMEVENT13: Csr = Csr::new(0x32d);
+    pub const MHPMEVENT14: Csr = Csr::new(0x32e);
+    pub const MHPMEVENT15: Csr = Csr::new(0x32f);
+    pub const MHPMEVENT16: Csr = Csr::new(0x330);
+    pub const MHPMEVENT17: Csr = Csr::new(0x331);
+    pub const MHPMEVENT18: Csr = Csr::new(0x332);
+    pub const MHPMEVENT19: Csr = Csr::new(0x333);
+    pub const MHPMEVENT20: Csr = Csr::new(0x334);
+    pub const MHPMEVENT21: Csr = Csr::new(0x335);
+    pub const MHPMEVENT22: Csr = Csr::new(0x336);
+    pub const MHPMEVENT23: Csr = Csr::new(0x337);
+    pub const MHPMEVENT24: Csr = Csr::new(0x338);
+    pub const MHPMEVENT25: Csr = Csr::new(0x339);
+    pub const MHPMEVENT26: Csr = Csr::new(0x33a);
+    pub const MHPMEVENT27: Csr = Csr::new(0x33b);
+    pub const MHPMEVENT28: Csr = Csr::new(0x33c);
+    pub const MHPMEVENT29: Csr = Csr::new(0x33d);
+    pub const MHPMEVENT30: Csr = Csr::new(0x33e);
+    pub const MHPMEVENT31: Csr = Csr::new(0x33f);
     
     // Supervisor-mode CSRs
     pub const SSTATUS: Csr = Csr::new(0x100);
diff --git a/src/riscv64/tests.rs b/src/riscv64/tests.rs
index 6f41482..81dad8b 100644
--- a/src/riscv64/tests.rs
+++ b/src/riscv64/tests.rs
@@ -1974,4 +1974,866 @@ mod register_tracking_tests {
         let t0_count = used.iter().filter(|&&r| r == reg::T0).count();
         assert_eq!(t0_count, 1);
     }
-}
\ No newline at end of file
+}
+
+#[test]
+fn test_all_m_mode_csr_addresses() {
+    // Machine Information Registers
+    assert_eq!(csr::MVENDORID.value(), 0xf11);
+    assert_eq!(csr::MARCHID.value(), 0xf12);
+    assert_eq!(csr::MIMPID.value(), 0xf13);
+    assert_eq!(csr::MHARTID.value(), 0xf14);
+    assert_eq!(csr::MCONFIGPTR.value(), 0xf15);
+    
+    // Machine Trap Setup
+    assert_eq!(csr::MSTATUS.value(), 0x300);
+    assert_eq!(csr::MISA.value(), 0x301);
+    assert_eq!(csr::MEDELEG.value(), 0x302);
+    assert_eq!(csr::MIDELEG.value(), 0x303);
+    assert_eq!(csr::MIE.value(), 0x304);
+    assert_eq!(csr::MTVEC.value(), 0x305);
+    assert_eq!(csr::MCOUNTEREN.value(), 0x306);
+    assert_eq!(csr::MSTATUSH.value(), 0x310);
+    
+    // Machine Trap Handling
+    assert_eq!(csr::MSCRATCH.value(), 0x340);
+    assert_eq!(csr::MEPC.value(), 0x341);
+    assert_eq!(csr::MCAUSE.value(), 0x342);
+    assert_eq!(csr::MTVAL.value(), 0x343);
+    assert_eq!(csr::MIP.value(), 0x344);
+    assert_eq!(csr::MTINST.value(), 0x34a);
+    assert_eq!(csr::MTVAL2.value(), 0x34b);
+    
+    // Machine Configuration
+    assert_eq!(csr::MENVCFG.value(), 0x30a);
+    assert_eq!(csr::MENVCFGH.value(), 0x31a);
+    assert_eq!(csr::MSECCFG.value(), 0x747);
+    assert_eq!(csr::MSECCFGH.value(), 0x757);
+    
+    // Machine Memory Protection - Configuration
+    assert_eq!(csr::PMPCFG0.value(), 0x3a0);
+    assert_eq!(csr::PMPCFG1.value(), 0x3a1);
+    assert_eq!(csr::PMPCFG2.value(), 0x3a2);
+    assert_eq!(csr::PMPCFG3.value(), 0x3a3);
+    assert_eq!(csr::PMPCFG4.value(), 0x3a4);
+    assert_eq!(csr::PMPCFG5.value(), 0x3a5);
+    assert_eq!(csr::PMPCFG6.value(), 0x3a6);
+    assert_eq!(csr::PMPCFG7.value(), 0x3a7);
+    assert_eq!(csr::PMPCFG8.value(), 0x3a8);
+    assert_eq!(csr::PMPCFG9.value(), 0x3a9);
+    assert_eq!(csr::PMPCFG10.value(), 0x3aa);
+    assert_eq!(csr::PMPCFG11.value(), 0x3ab);
+    assert_eq!(csr::PMPCFG12.value(), 0x3ac);
+    assert_eq!(csr::PMPCFG13.value(), 0x3ad);
+    assert_eq!(csr::PMPCFG14.value(), 0x3ae);
+    assert_eq!(csr::PMPCFG15.value(), 0x3af);
+    
+    // Machine Memory Protection - Address (sample checks)
+    assert_eq!(csr::PMPADDR0.value(), 0x3b0);
+    assert_eq!(csr::PMPADDR1.value(), 0x3b1);
+    assert_eq!(csr::PMPADDR15.value(), 0x3bf);
+    assert_eq!(csr::PMPADDR31.value(), 0x3cf);
+    assert_eq!(csr::PMPADDR63.value(), 0x3ef);
+    
+    // Machine Counter/Timers
+    assert_eq!(csr::MCYCLE.value(), 0xb00);
+    assert_eq!(csr::MINSTRET.value(), 0xb02);
+    assert_eq!(csr::MHPMCOUNTER3.value(), 0xb03);
+    assert_eq!(csr::MHPMCOUNTER4.value(), 0xb04);
+    assert_eq!(csr::MHPMCOUNTER31.value(), 0xb1f);
+    
+    // Machine Counter/Timers - High
+    assert_eq!(csr::MCYCLEH.value(), 0xb80);
+    assert_eq!(csr::MINSTRETH.value(), 0xb82);
+    assert_eq!(csr::MHPMCOUNTER3H.value(), 0xb83);
+    assert_eq!(csr::MHPMCOUNTER31H.value(), 0xb9f);
+    
+    // Machine Counter Setup
+    assert_eq!(csr::MCOUNTINHIBIT.value(), 0x320);
+    assert_eq!(csr::MHPMEVENT3.value(), 0x323);
+    assert_eq!(csr::MHPMEVENT4.value(), 0x324);
+    assert_eq!(csr::MHPMEVENT31.value(), 0x33f);
+}
+
+#[test]
+fn test_m_mode_csr_usage() {
+    let mut builder = Riscv64InstructionBuilder::new();
+    
+    // Test a selection of M-mode CSRs to verify they can be used
+    builder.csrr(reg::X1, csr::MVENDORID);
+    builder.csrr(reg::X2, csr::MARCHID);
+    builder.csrr(reg::X3, csr::MIMPID);
+    builder.csrr(reg::X4, csr::MCONFIGPTR);
+    builder.csrr(reg::X5, csr::MCOUNTEREN);
+    builder.csrr(reg::X6, csr::MTINST);
+    builder.csrr(reg::X7, csr::MTVAL2);
+    builder.csrr(reg::X8, csr::MENVCFG);
+    builder.csrr(reg::X9, csr::MSECCFG);
+    builder.csrr(reg::X10, csr::PMPCFG0);
+    builder.csrr(reg::X11, csr::PMPADDR0);
+    builder.csrr(reg::X12, csr::MCYCLE);
+    builder.csrr(reg::X13, csr::MINSTRET);
+    builder.csrr(reg::X14, csr::MHPMCOUNTER3);
+    builder.csrr(reg::X15, csr::MCOUNTINHIBIT);
+    builder.csrr(reg::X16, csr::MHPMEVENT3);
+    
+    let instructions = builder.instructions();
+    assert_eq!(instructions.len(), 16);
+    
+    // Verify all instructions are properly encoded
+    for (i, instr) in instructions.iter().enumerate() {
+        assert!(instr.value() != 0, "Instruction {} should be non-zero", i);
+    }
+}
+
+#[cfg(feature = "std")]
+#[test]
+fn test_binary_correctness_m_mode_csrs() {
+    // Test all M-mode CSRs with GNU assembler comparison
+    // Using CSRRW x0, csr, x0 pattern as requested
+    
+    // Machine Information Registers
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MVENDORID, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mvendorid, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MARCHID, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, marchid, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MIMPID, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mimpid, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MCONFIGPTR, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mconfigptr, x0\n");
+    
+    // Machine Trap Setup
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MCOUNTEREN, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mcounteren, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MSTATUSH, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mstatush, x0\n");
+    
+    // Machine Trap Handling
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MTINST, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mtinst, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MTVAL2, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mtval2, x0\n");
+    
+    // Machine Configuration
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MENVCFG, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, menvcfg, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MENVCFGH, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, menvcfgh, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MSECCFG, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mseccfg, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MSECCFGH, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mseccfgh, x0\n");
+    
+    // Physical Memory Protection - Configuration
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG0, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg0, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG1, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg1, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG2, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg2, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG3, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg3, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG4, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg4, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG5, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg5, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG6, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg6, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG7, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg7, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG8, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg8, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG9, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg9, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG10, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg10, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG11, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg11, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG12, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg12, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG13, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg13, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG14, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg14, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPCFG15, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpcfg15, x0\n");
+    
+    // Physical Memory Protection - Address (test all 64)
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR0, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr0, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR1, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr1, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR2, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr2, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR3, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr3, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR4, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr4, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR5, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr5, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR6, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr6, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR7, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr7, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR8, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr8, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR9, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr9, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR10, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr10, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR11, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr11, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR12, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr12, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR13, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr13, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR14, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr14, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR15, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr15, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR16, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr16, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR17, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr17, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR18, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr18, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR19, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr19, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR20, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr20, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR21, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr21, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR22, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr22, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR23, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr23, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR24, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr24, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR25, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr25, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR26, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr26, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR27, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr27, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR28, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr28, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR29, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr29, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR30, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr30, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR31, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr31, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR32, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr32, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR33, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr33, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR34, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr34, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR35, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr35, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR36, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr36, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR37, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr37, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR38, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr38, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR39, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr39, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR40, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr40, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR41, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr41, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR42, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr42, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR43, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr43, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR44, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr44, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR45, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr45, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR46, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr46, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR47, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr47, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR48, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr48, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR49, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr49, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR50, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr50, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR51, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr51, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR52, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr52, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR53, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr53, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR54, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr54, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR55, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr55, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR56, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr56, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR57, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr57, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR58, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr58, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR59, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr59, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR60, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr60, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR61, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr61, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR62, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr62, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::PMPADDR63, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, pmpaddr63, x0\n");
+    
+    // Machine Counter/Timers
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MCYCLE, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mcycle, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MINSTRET, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, minstret, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER3, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter3, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER4, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter4, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER5, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter5, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER6, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter6, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER7, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter7, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER8, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter8, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER9, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter9, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER10, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter10, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER11, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter11, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER12, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter12, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER13, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter13, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER14, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter14, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER15, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter15, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER16, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter16, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER17, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter17, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER18, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter18, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER19, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter19, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER20, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter20, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER21, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter21, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER22, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter22, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER23, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter23, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER24, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter24, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER25, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter25, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER26, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter26, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER27, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter27, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER28, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter28, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER29, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter29, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER30, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter30, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER31, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter31, x0\n");
+    
+    // Machine Counter/Timers - High (for RV32)
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MCYCLEH, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mcycleh, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MINSTRETH, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, minstreth, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER3H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter3h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER4H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter4h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER5H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter5h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER6H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter6h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER7H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter7h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER8H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter8h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER9H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter9h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER10H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter10h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER11H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter11h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER12H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter12h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER13H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter13h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER14H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter14h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER15H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter15h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER16H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter16h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER17H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter17h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER18H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter18h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER19H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter19h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER20H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter20h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER21H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter21h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER22H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter22h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER23H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter23h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER24H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter24h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER25H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter25h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER26H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter26h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER27H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter27h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER28H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter28h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER29H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter29h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER30H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter30h, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMCOUNTER31H, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmcounter31h, x0\n");
+    
+    // Machine Counter Setup
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MCOUNTINHIBIT, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mcountinhibit, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT3, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent3, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT4, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent4, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT5, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent5, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT6, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent6, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT7, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent7, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT8, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent8, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT9, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent9, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT10, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent10, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT11, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent11, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT12, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent12, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT13, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent13, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT14, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent14, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT15, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent15, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT16, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent16, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT17, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent17, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT18, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent18, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT19, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent19, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT20, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent20, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT21, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent21, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT22, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent22, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT23, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent23, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT24, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent24, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT25, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent25, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT26, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent26, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT27, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent27, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT28, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent28, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT29, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent29, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT30, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent30, x0\n");
+    
+    let mut builder = Riscv64InstructionBuilder::new();
+    builder.csrrw(reg::X0, csr::MHPMEVENT31, reg::X0);
+    compare_instruction(builder.instructions()[0], "csrrw x0, mhpmevent31, x0\n");
+}