diff --git a/arm64/asm/_ASIMD_.S b/arm64/asm/_ASIMD_.S index 6d43fc8..6e2b63b 100644 --- a/arm64/asm/_ASIMD_.S +++ b/arm64/asm/_ASIMD_.S @@ -49,31 +49,31 @@ asimd_fmla_vs_f32f32f32: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.fmla.vs.f32f32f32.L1: - fmla v8.4s, v0.4s, v1.s[0] - fmla v9.4s, v0.4s, v1.s[0] - fmla v10.4s, v0.4s, v1.s[0] - fmla v11.4s, v0.4s, v1.s[0] - fmla v12.4s, v0.4s, v1.s[0] - fmla v13.4s, v0.4s, v1.s[0] - fmla v14.4s, v0.4s, v1.s[0] - fmla v15.4s, v0.4s, v1.s[0] - fmla v16.4s, v0.4s, v1.s[0] - fmla v17.4s, v0.4s, v1.s[0] - fmla v18.4s, v0.4s, v1.s[0] - fmla v19.4s, v0.4s, v1.s[0] + fmla v8.4s, v8.4s, v8.s[0] + fmla v9.4s, v9.4s, v9.s[0] + fmla v10.4s, v10.4s, v10.s[0] + fmla v11.4s, v11.4s, v11.s[0] + fmla v12.4s, v12.4s, v12.s[0] + fmla v13.4s, v13.4s, v13.s[0] + fmla v14.4s, v14.4s, v14.s[0] + fmla v15.4s, v15.4s, v15.s[0] + fmla v16.4s, v16.4s, v16.s[0] + fmla v17.4s, v17.4s, v17.s[0] + fmla v18.4s, v18.4s, v18.s[0] + fmla v19.4s, v19.4s, v19.s[0] subs x0, x0, #1 - fmla v20.4s, v0.4s, v1.s[0] - fmla v21.4s, v0.4s, v1.s[0] - fmla v22.4s, v0.4s, v1.s[0] - fmla v23.4s, v0.4s, v1.s[0] - fmla v24.4s, v0.4s, v1.s[0] - fmla v25.4s, v0.4s, v1.s[0] - fmla v26.4s, v0.4s, v1.s[0] - fmla v27.4s, v0.4s, v1.s[0] - fmla v28.4s, v0.4s, v1.s[0] - fmla v29.4s, v0.4s, v1.s[0] - fmla v30.4s, v0.4s, v1.s[0] - fmla v31.4s, v0.4s, v1.s[0] + fmla v20.4s, v20.4s, v20.s[0] + fmla v21.4s, v21.4s, v21.s[0] + fmla v22.4s, v22.4s, v22.s[0] + fmla v23.4s, v23.4s, v23.s[0] + fmla v24.4s, v24.4s, v24.s[0] + fmla v25.4s, v25.4s, v25.s[0] + fmla v26.4s, v26.4s, v26.s[0] + fmla v27.4s, v27.4s, v27.s[0] + fmla v28.4s, v28.4s, v28.s[0] + fmla v29.4s, v29.4s, v29.s[0] + fmla v30.4s, v30.4s, v30.s[0] + fmla v31.4s, v31.4s, v31.s[0] bne .asimd.fmla.vs.f32f32f32.L1 restore_caller_vec ret @@ -113,31 +113,31 @@ asimd_fmla_vv_f32f32f32: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.fmla.vv.f32f32f32.L1: - fmla v8.4s, v0.4s, v1.4s - fmla v9.4s, v0.4s, v1.4s - fmla v10.4s, v0.4s, v1.4s - fmla v11.4s, v0.4s, v1.4s - fmla v12.4s, v0.4s, v1.4s - fmla v13.4s, v0.4s, v1.4s - fmla v14.4s, v0.4s, v1.4s - fmla v15.4s, v0.4s, v1.4s - fmla v16.4s, v0.4s, v1.4s - fmla v17.4s, v0.4s, v1.4s - fmla v18.4s, v0.4s, v1.4s - fmla v19.4s, v0.4s, v1.4s + fmla v8.4s, v8.4s, v8.4s + fmla v9.4s, v9.4s, v9.4s + fmla v10.4s, v10.4s, v10.4s + fmla v11.4s, v11.4s, v11.4s + fmla v12.4s, v12.4s, v12.4s + fmla v13.4s, v13.4s, v13.4s + fmla v14.4s, v14.4s, v14.4s + fmla v15.4s, v15.4s, v15.4s + fmla v16.4s, v16.4s, v16.4s + fmla v17.4s, v17.4s, v17.4s + fmla v18.4s, v18.4s, v18.4s + fmla v19.4s, v19.4s, v19.4s subs x0, x0, #1 - fmla v20.4s, v0.4s, v1.4s - fmla v21.4s, v0.4s, v1.4s - fmla v22.4s, v0.4s, v1.4s - fmla v23.4s, v0.4s, v1.4s - fmla v24.4s, v0.4s, v1.4s - fmla v25.4s, v0.4s, v1.4s - fmla v26.4s, v0.4s, v1.4s - fmla v27.4s, v0.4s, v1.4s - fmla v28.4s, v0.4s, v1.4s - fmla v29.4s, v0.4s, v1.4s - fmla v30.4s, v0.4s, v1.4s - fmla v31.4s, v0.4s, v1.4s + fmla v20.4s, v20.4s, v20.4s + fmla v21.4s, v21.4s, v21.4s + fmla v22.4s, v22.4s, v22.4s + fmla v23.4s, v23.4s, v23.4s + fmla v24.4s, v24.4s, v24.4s + fmla v25.4s, v25.4s, v25.4s + fmla v26.4s, v26.4s, v26.4s + fmla v27.4s, v27.4s, v27.4s + fmla v28.4s, v28.4s, v28.4s + fmla v29.4s, v29.4s, v29.4s + fmla v30.4s, v30.4s, v30.4s + fmla v31.4s, v31.4s, v31.4s bne .asimd.fmla.vv.f32f32f32.L1 restore_caller_vec ret @@ -177,31 +177,31 @@ asimd_fmla_vs_f64f64f64: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.fmla.vs.f64f64f64.L1: - fmla v8.2d, v0.2d, v1.d[0] - fmla v9.2d, v0.2d, v1.d[0] - fmla v10.2d, v0.2d, v1.d[0] - fmla v11.2d, v0.2d, v1.d[0] - fmla v12.2d, v0.2d, v1.d[0] - fmla v13.2d, v0.2d, v1.d[0] - fmla v14.2d, v0.2d, v1.d[0] - fmla v15.2d, v0.2d, v1.d[0] - fmla v16.2d, v0.2d, v1.d[0] - fmla v17.2d, v0.2d, v1.d[0] - fmla v18.2d, v0.2d, v1.d[0] - fmla v19.2d, v0.2d, v1.d[0] + fmla v8.2d, v8.2d, v8.d[0] + fmla v9.2d, v9.2d, v9.d[0] + fmla v10.2d, v10.2d, v10.d[0] + fmla v11.2d, v11.2d, v11.d[0] + fmla v12.2d, v12.2d, v12.d[0] + fmla v13.2d, v13.2d, v13.d[0] + fmla v14.2d, v14.2d, v14.d[0] + fmla v15.2d, v15.2d, v15.d[0] + fmla v16.2d, v16.2d, v16.d[0] + fmla v17.2d, v17.2d, v17.d[0] + fmla v18.2d, v18.2d, v18.d[0] + fmla v19.2d, v19.2d, v19.d[0] subs x0, x0, #1 - fmla v20.2d, v0.2d, v1.d[0] - fmla v21.2d, v0.2d, v1.d[0] - fmla v22.2d, v0.2d, v1.d[0] - fmla v23.2d, v0.2d, v1.d[0] - fmla v24.2d, v0.2d, v1.d[0] - fmla v25.2d, v0.2d, v1.d[0] - fmla v26.2d, v0.2d, v1.d[0] - fmla v27.2d, v0.2d, v1.d[0] - fmla v28.2d, v0.2d, v1.d[0] - fmla v29.2d, v0.2d, v1.d[0] - fmla v30.2d, v0.2d, v1.d[0] - fmla v31.2d, v0.2d, v1.d[0] + fmla v20.2d, v20.2d, v20.d[0] + fmla v21.2d, v21.2d, v21.d[0] + fmla v22.2d, v22.2d, v22.d[0] + fmla v23.2d, v23.2d, v23.d[0] + fmla v24.2d, v24.2d, v24.d[0] + fmla v25.2d, v25.2d, v25.d[0] + fmla v26.2d, v26.2d, v26.d[0] + fmla v27.2d, v27.2d, v27.d[0] + fmla v28.2d, v28.2d, v28.d[0] + fmla v29.2d, v29.2d, v29.d[0] + fmla v30.2d, v30.2d, v30.d[0] + fmla v31.2d, v31.2d, v31.d[0] bne .asimd.fmla.vs.f64f64f64.L1 restore_caller_vec ret @@ -241,31 +241,31 @@ asimd_fmla_vv_f64f64f64: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.fmla.vv.f64f64f64.L1: - fmla v8.2d, v0.2d, v1.2d - fmla v9.2d, v0.2d, v1.2d - fmla v10.2d, v0.2d, v1.2d - fmla v11.2d, v0.2d, v1.2d - fmla v12.2d, v0.2d, v1.2d - fmla v13.2d, v0.2d, v1.2d - fmla v14.2d, v0.2d, v1.2d - fmla v15.2d, v0.2d, v1.2d - fmla v16.2d, v0.2d, v1.2d - fmla v17.2d, v0.2d, v1.2d - fmla v18.2d, v0.2d, v1.2d - fmla v19.2d, v0.2d, v1.2d + fmla v8.2d, v8.2d, v8.2d + fmla v9.2d, v9.2d, v9.2d + fmla v10.2d, v10.2d, v10.2d + fmla v11.2d, v11.2d, v11.2d + fmla v12.2d, v12.2d, v12.2d + fmla v13.2d, v13.2d, v13.2d + fmla v14.2d, v14.2d, v14.2d + fmla v15.2d, v15.2d, v15.2d + fmla v16.2d, v16.2d, v16.2d + fmla v17.2d, v17.2d, v17.2d + fmla v18.2d, v18.2d, v18.2d + fmla v19.2d, v19.2d, v19.2d subs x0, x0, #1 - fmla v20.2d, v0.2d, v1.2d - fmla v21.2d, v0.2d, v1.2d - fmla v22.2d, v0.2d, v1.2d - fmla v23.2d, v0.2d, v1.2d - fmla v24.2d, v0.2d, v1.2d - fmla v25.2d, v0.2d, v1.2d - fmla v26.2d, v0.2d, v1.2d - fmla v27.2d, v0.2d, v1.2d - fmla v28.2d, v0.2d, v1.2d - fmla v29.2d, v0.2d, v1.2d - fmla v30.2d, v0.2d, v1.2d - fmla v31.2d, v0.2d, v1.2d + fmla v20.2d, v20.2d, v20.2d + fmla v21.2d, v21.2d, v21.2d + fmla v22.2d, v22.2d, v22.2d + fmla v23.2d, v23.2d, v23.2d + fmla v24.2d, v24.2d, v24.2d + fmla v25.2d, v25.2d, v25.2d + fmla v26.2d, v26.2d, v26.2d + fmla v27.2d, v27.2d, v27.2d + fmla v28.2d, v28.2d, v28.2d + fmla v29.2d, v29.2d, v29.2d + fmla v30.2d, v30.2d, v30.2d + fmla v31.2d, v31.2d, v31.2d bne .asimd.fmla.vv.f64f64f64.L1 restore_caller_vec ret diff --git a/arm64/asm/_ASIMD_DP_.S b/arm64/asm/_ASIMD_DP_.S index 23aa038..d866552 100644 --- a/arm64/asm/_ASIMD_DP_.S +++ b/arm64/asm/_ASIMD_DP_.S @@ -49,31 +49,31 @@ asimd_dp4a_vs_s32s8s8: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.dp4a.vs.s32s8s8.L1: - sdot v8.4s, v0.16b, v1.4b[0] - sdot v9.4s, v0.16b, v1.4b[0] - sdot v10.4s, v0.16b, v1.4b[0] - sdot v11.4s, v0.16b, v1.4b[0] - sdot v12.4s, v0.16b, v1.4b[0] - sdot v13.4s, v0.16b, v1.4b[0] - sdot v14.4s, v0.16b, v1.4b[0] - sdot v15.4s, v0.16b, v1.4b[0] - sdot v16.4s, v0.16b, v1.4b[0] - sdot v17.4s, v0.16b, v1.4b[0] - sdot v18.4s, v0.16b, v1.4b[0] - sdot v19.4s, v0.16b, v1.4b[0] + sdot v8.4s, v8.16b, v8.4b[0] + sdot v9.4s, v9.16b, v9.4b[0] + sdot v10.4s, v10.16b, v10.4b[0] + sdot v11.4s, v11.16b, v11.4b[0] + sdot v12.4s, v12.16b, v12.4b[0] + sdot v13.4s, v13.16b, v13.4b[0] + sdot v14.4s, v14.16b, v14.4b[0] + sdot v15.4s, v15.16b, v15.4b[0] + sdot v16.4s, v16.16b, v16.4b[0] + sdot v17.4s, v17.16b, v17.4b[0] + sdot v18.4s, v18.16b, v18.4b[0] + sdot v19.4s, v19.16b, v19.4b[0] subs x0, x0, #1 - sdot v20.4s, v0.16b, v1.4b[0] - sdot v21.4s, v0.16b, v1.4b[0] - sdot v22.4s, v0.16b, v1.4b[0] - sdot v23.4s, v0.16b, v1.4b[0] - sdot v24.4s, v0.16b, v1.4b[0] - sdot v25.4s, v0.16b, v1.4b[0] - sdot v26.4s, v0.16b, v1.4b[0] - sdot v27.4s, v0.16b, v1.4b[0] - sdot v28.4s, v0.16b, v1.4b[0] - sdot v29.4s, v0.16b, v1.4b[0] - sdot v30.4s, v0.16b, v1.4b[0] - sdot v31.4s, v0.16b, v1.4b[0] + sdot v20.4s, v20.16b, v20.4b[0] + sdot v21.4s, v21.16b, v21.4b[0] + sdot v22.4s, v22.16b, v22.4b[0] + sdot v23.4s, v23.16b, v23.4b[0] + sdot v24.4s, v24.16b, v24.4b[0] + sdot v25.4s, v25.16b, v25.4b[0] + sdot v26.4s, v26.16b, v26.4b[0] + sdot v27.4s, v27.16b, v27.4b[0] + sdot v28.4s, v28.16b, v28.4b[0] + sdot v29.4s, v29.16b, v29.4b[0] + sdot v30.4s, v30.16b, v30.4b[0] + sdot v31.4s, v31.16b, v31.4b[0] bne .asimd.dp4a.vs.s32s8s8.L1 restore_caller_vec ret @@ -113,31 +113,31 @@ asimd_dp4a_vv_s32s8s8: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.dp4a.vv.s32s8s8.L1: - sdot v8.4s, v0.16b, v1.16b - sdot v9.4s, v0.16b, v1.16b - sdot v10.4s, v0.16b, v1.16b - sdot v11.4s, v0.16b, v1.16b - sdot v12.4s, v0.16b, v1.16b - sdot v13.4s, v0.16b, v1.16b - sdot v14.4s, v0.16b, v1.16b - sdot v15.4s, v0.16b, v1.16b - sdot v16.4s, v0.16b, v1.16b - sdot v17.4s, v0.16b, v1.16b - sdot v18.4s, v0.16b, v1.16b - sdot v19.4s, v0.16b, v1.16b + sdot v8.4s, v8.16b, v8.16b + sdot v9.4s, v9.16b, v9.16b + sdot v10.4s, v10.16b, v10.16b + sdot v11.4s, v11.16b, v11.16b + sdot v12.4s, v12.16b, v12.16b + sdot v13.4s, v13.16b, v13.16b + sdot v14.4s, v14.16b, v14.16b + sdot v15.4s, v15.16b, v15.16b + sdot v16.4s, v16.16b, v16.16b + sdot v17.4s, v17.16b, v17.16b + sdot v18.4s, v18.16b, v18.16b + sdot v19.4s, v19.16b, v19.16b subs x0, x0, #1 - sdot v20.4s, v0.16b, v1.16b - sdot v21.4s, v0.16b, v1.16b - sdot v22.4s, v0.16b, v1.16b - sdot v23.4s, v0.16b, v1.16b - sdot v24.4s, v0.16b, v1.16b - sdot v25.4s, v0.16b, v1.16b - sdot v26.4s, v0.16b, v1.16b - sdot v27.4s, v0.16b, v1.16b - sdot v28.4s, v0.16b, v1.16b - sdot v29.4s, v0.16b, v1.16b - sdot v30.4s, v0.16b, v1.16b - sdot v31.4s, v0.16b, v1.16b + sdot v20.4s, v20.16b, v20.16b + sdot v21.4s, v21.16b, v21.16b + sdot v22.4s, v22.16b, v22.16b + sdot v23.4s, v23.16b, v23.16b + sdot v24.4s, v24.16b, v24.16b + sdot v25.4s, v25.16b, v25.16b + sdot v26.4s, v26.16b, v26.16b + sdot v27.4s, v27.16b, v27.16b + sdot v28.4s, v28.16b, v28.16b + sdot v29.4s, v29.16b, v29.16b + sdot v30.4s, v30.16b, v30.16b + sdot v31.4s, v31.16b, v31.16b bne .asimd.dp4a.vv.s32s8s8.L1 restore_caller_vec ret @@ -177,31 +177,31 @@ asimd_dp4a_vs_u32u8u8: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.dp4a.vs.u32u8u8.L1: - udot v8.4s, v0.16b, v1.4b[0] - udot v9.4s, v0.16b, v1.4b[0] - udot v10.4s, v0.16b, v1.4b[0] - udot v11.4s, v0.16b, v1.4b[0] - udot v12.4s, v0.16b, v1.4b[0] - udot v13.4s, v0.16b, v1.4b[0] - udot v14.4s, v0.16b, v1.4b[0] - udot v15.4s, v0.16b, v1.4b[0] - udot v16.4s, v0.16b, v1.4b[0] - udot v17.4s, v0.16b, v1.4b[0] - udot v18.4s, v0.16b, v1.4b[0] - udot v19.4s, v0.16b, v1.4b[0] + udot v8.4s, v8.16b, v8.4b[0] + udot v9.4s, v9.16b, v9.4b[0] + udot v10.4s, v10.16b, v10.4b[0] + udot v11.4s, v11.16b, v11.4b[0] + udot v12.4s, v12.16b, v12.4b[0] + udot v13.4s, v13.16b, v13.4b[0] + udot v14.4s, v14.16b, v14.4b[0] + udot v15.4s, v15.16b, v15.4b[0] + udot v16.4s, v16.16b, v16.4b[0] + udot v17.4s, v17.16b, v17.4b[0] + udot v18.4s, v18.16b, v18.4b[0] + udot v19.4s, v19.16b, v19.4b[0] subs x0, x0, #1 - udot v20.4s, v0.16b, v1.4b[0] - udot v21.4s, v0.16b, v1.4b[0] - udot v22.4s, v0.16b, v1.4b[0] - udot v23.4s, v0.16b, v1.4b[0] - udot v24.4s, v0.16b, v1.4b[0] - udot v25.4s, v0.16b, v1.4b[0] - udot v26.4s, v0.16b, v1.4b[0] - udot v27.4s, v0.16b, v1.4b[0] - udot v28.4s, v0.16b, v1.4b[0] - udot v29.4s, v0.16b, v1.4b[0] - udot v30.4s, v0.16b, v1.4b[0] - udot v31.4s, v0.16b, v1.4b[0] + udot v20.4s, v20.16b, v20.4b[0] + udot v21.4s, v21.16b, v21.4b[0] + udot v22.4s, v22.16b, v22.4b[0] + udot v23.4s, v23.16b, v23.4b[0] + udot v24.4s, v24.16b, v24.4b[0] + udot v25.4s, v25.16b, v25.4b[0] + udot v26.4s, v26.16b, v26.4b[0] + udot v27.4s, v27.16b, v27.4b[0] + udot v28.4s, v28.16b, v28.4b[0] + udot v29.4s, v29.16b, v29.4b[0] + udot v30.4s, v30.16b, v30.4b[0] + udot v31.4s, v31.16b, v31.4b[0] bne .asimd.dp4a.vs.u32u8u8.L1 restore_caller_vec ret @@ -241,31 +241,31 @@ asimd_dp4a_vv_u32u8u8: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.dp4a.vv.u32u8u8.L1: - udot v8.4s, v0.16b, v1.16b - udot v9.4s, v0.16b, v1.16b - udot v10.4s, v0.16b, v1.16b - udot v11.4s, v0.16b, v1.16b - udot v12.4s, v0.16b, v1.16b - udot v13.4s, v0.16b, v1.16b - udot v14.4s, v0.16b, v1.16b - udot v15.4s, v0.16b, v1.16b - udot v16.4s, v0.16b, v1.16b - udot v17.4s, v0.16b, v1.16b - udot v18.4s, v0.16b, v1.16b - udot v19.4s, v0.16b, v1.16b + udot v8.4s, v8.16b, v8.16b + udot v9.4s, v9.16b, v9.16b + udot v10.4s, v10.16b, v10.16b + udot v11.4s, v11.16b, v11.16b + udot v12.4s, v12.16b, v12.16b + udot v13.4s, v13.16b, v13.16b + udot v14.4s, v14.16b, v14.16b + udot v15.4s, v15.16b, v15.16b + udot v16.4s, v16.16b, v16.16b + udot v17.4s, v17.16b, v17.16b + udot v18.4s, v18.16b, v18.16b + udot v19.4s, v19.16b, v19.16b subs x0, x0, #1 - udot v20.4s, v0.16b, v1.16b - udot v21.4s, v0.16b, v1.16b - udot v22.4s, v0.16b, v1.16b - udot v23.4s, v0.16b, v1.16b - udot v24.4s, v0.16b, v1.16b - udot v25.4s, v0.16b, v1.16b - udot v26.4s, v0.16b, v1.16b - udot v27.4s, v0.16b, v1.16b - udot v28.4s, v0.16b, v1.16b - udot v29.4s, v0.16b, v1.16b - udot v30.4s, v0.16b, v1.16b - udot v31.4s, v0.16b, v1.16b + udot v20.4s, v20.16b, v20.16b + udot v21.4s, v21.16b, v21.16b + udot v22.4s, v22.16b, v22.16b + udot v23.4s, v23.16b, v23.16b + udot v24.4s, v24.16b, v24.16b + udot v25.4s, v25.16b, v25.16b + udot v26.4s, v26.16b, v26.16b + udot v27.4s, v27.16b, v27.16b + udot v28.4s, v28.16b, v28.16b + udot v29.4s, v29.16b, v29.16b + udot v30.4s, v30.16b, v30.16b + udot v31.4s, v31.16b, v31.16b bne .asimd.dp4a.vv.u32u8u8.L1 restore_caller_vec ret diff --git a/arm64/asm/_ASIMD_HP_.S b/arm64/asm/_ASIMD_HP_.S index 2f0e526..85098d5 100644 --- a/arm64/asm/_ASIMD_HP_.S +++ b/arm64/asm/_ASIMD_HP_.S @@ -49,31 +49,31 @@ asimd_fmla_vs_fp16fp16fp16: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.fmla.vs.fp16fp16fp16.L1: - fmla v8.8h, v0.8h, v1.h[0] - fmla v9.8h, v0.8h, v1.h[0] - fmla v10.8h, v0.8h, v1.h[0] - fmla v11.8h, v0.8h, v1.h[0] - fmla v12.8h, v0.8h, v1.h[0] - fmla v13.8h, v0.8h, v1.h[0] - fmla v14.8h, v0.8h, v1.h[0] - fmla v15.8h, v0.8h, v1.h[0] - fmla v16.8h, v0.8h, v1.h[0] - fmla v17.8h, v0.8h, v1.h[0] - fmla v18.8h, v0.8h, v1.h[0] - fmla v19.8h, v0.8h, v1.h[0] + fmla v8.8h, v8.8h, v0.h[0] + fmla v9.8h, v9.8h, v1.h[0] + fmla v10.8h, v10.8h, v2.h[0] + fmla v11.8h, v11.8h, v3.h[0] + fmla v12.8h, v12.8h, v4.h[0] + fmla v13.8h, v13.8h, v5.h[0] + fmla v14.8h, v14.8h, v6.h[0] + fmla v15.8h, v15.8h, v7.h[0] + fmla v16.8h, v16.8h, v0.h[0] + fmla v17.8h, v17.8h, v1.h[0] + fmla v18.8h, v18.8h, v2.h[0] + fmla v19.8h, v19.8h, v3.h[0] subs x0, x0, #1 - fmla v20.8h, v0.8h, v1.h[0] - fmla v21.8h, v0.8h, v1.h[0] - fmla v22.8h, v0.8h, v1.h[0] - fmla v23.8h, v0.8h, v1.h[0] - fmla v24.8h, v0.8h, v1.h[0] - fmla v25.8h, v0.8h, v1.h[0] - fmla v26.8h, v0.8h, v1.h[0] - fmla v27.8h, v0.8h, v1.h[0] - fmla v28.8h, v0.8h, v1.h[0] - fmla v29.8h, v0.8h, v1.h[0] - fmla v30.8h, v0.8h, v1.h[0] - fmla v31.8h, v0.8h, v1.h[0] + fmla v20.8h, v20.8h, v4.h[0] + fmla v21.8h, v21.8h, v5.h[0] + fmla v22.8h, v22.8h, v6.h[0] + fmla v23.8h, v23.8h, v7.h[0] + fmla v24.8h, v24.8h, v0.h[0] + fmla v25.8h, v25.8h, v1.h[0] + fmla v26.8h, v26.8h, v2.h[0] + fmla v27.8h, v27.8h, v3.h[0] + fmla v28.8h, v28.8h, v4.h[0] + fmla v29.8h, v29.8h, v5.h[0] + fmla v30.8h, v30.8h, v6.h[0] + fmla v31.8h, v31.8h, v7.h[0] bne .asimd.fmla.vs.fp16fp16fp16.L1 restore_caller_vec ret @@ -113,31 +113,31 @@ asimd_fmla_vv_fp16fp16fp16: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.fmla.vv.fp16fp16fp16.L1: - fmla v8.8h, v0.8h, v1.8h - fmla v9.8h, v0.8h, v1.8h - fmla v10.8h, v0.8h, v1.8h - fmla v11.8h, v0.8h, v1.8h - fmla v12.8h, v0.8h, v1.8h - fmla v13.8h, v0.8h, v1.8h - fmla v14.8h, v0.8h, v1.8h - fmla v15.8h, v0.8h, v1.8h - fmla v16.8h, v0.8h, v1.8h - fmla v17.8h, v0.8h, v1.8h - fmla v18.8h, v0.8h, v1.8h - fmla v19.8h, v0.8h, v1.8h + fmla v8.8h, v8.8h, v8.8h + fmla v9.8h, v9.8h, v9.8h + fmla v10.8h, v10.8h, v10.8h + fmla v11.8h, v11.8h, v11.8h + fmla v12.8h, v12.8h, v12.8h + fmla v13.8h, v13.8h, v13.8h + fmla v14.8h, v14.8h, v14.8h + fmla v15.8h, v15.8h, v15.8h + fmla v16.8h, v16.8h, v16.8h + fmla v17.8h, v17.8h, v17.8h + fmla v18.8h, v18.8h, v18.8h + fmla v19.8h, v19.8h, v19.8h subs x0, x0, #1 - fmla v20.8h, v0.8h, v1.8h - fmla v21.8h, v0.8h, v1.8h - fmla v22.8h, v0.8h, v1.8h - fmla v23.8h, v0.8h, v1.8h - fmla v24.8h, v0.8h, v1.8h - fmla v25.8h, v0.8h, v1.8h - fmla v26.8h, v0.8h, v1.8h - fmla v27.8h, v0.8h, v1.8h - fmla v28.8h, v0.8h, v1.8h - fmla v29.8h, v0.8h, v1.8h - fmla v30.8h, v0.8h, v1.8h - fmla v31.8h, v0.8h, v1.8h + fmla v20.8h, v20.8h, v20.8h + fmla v21.8h, v21.8h, v21.8h + fmla v22.8h, v22.8h, v22.8h + fmla v23.8h, v23.8h, v23.8h + fmla v24.8h, v24.8h, v24.8h + fmla v25.8h, v25.8h, v25.8h + fmla v26.8h, v26.8h, v26.8h + fmla v27.8h, v27.8h, v27.8h + fmla v28.8h, v28.8h, v28.8h + fmla v29.8h, v29.8h, v29.8h + fmla v30.8h, v30.8h, v30.8h + fmla v31.8h, v31.8h, v31.8h bne .asimd.fmla.vv.fp16fp16fp16.L1 restore_caller_vec ret diff --git a/arm64/asm/_BF16_.S b/arm64/asm/_BF16_.S index 5a167d4..a636e03 100644 --- a/arm64/asm/_BF16_.S +++ b/arm64/asm/_BF16_.S @@ -49,31 +49,31 @@ asimd_mmla_fp32bf16bf16: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.mmla.fp32bf16bf16.L1: - bfmmla v8.4s, v0.8h, v1.8h - bfmmla v9.4s, v0.8h, v1.8h - bfmmla v10.4s, v0.8h, v1.8h - bfmmla v11.4s, v0.8h, v1.8h - bfmmla v12.4s, v0.8h, v1.8h - bfmmla v13.4s, v0.8h, v1.8h - bfmmla v14.4s, v0.8h, v1.8h - bfmmla v15.4s, v0.8h, v1.8h - bfmmla v16.4s, v0.8h, v1.8h - bfmmla v17.4s, v0.8h, v1.8h - bfmmla v18.4s, v0.8h, v1.8h - bfmmla v19.4s, v0.8h, v1.8h + bfmmla v8.4s, v8.8h, v8.8h + bfmmla v9.4s, v9.8h, v9.8h + bfmmla v10.4s, v10.8h, v10.8h + bfmmla v11.4s, v11.8h, v11.8h + bfmmla v12.4s, v12.8h, v12.8h + bfmmla v13.4s, v13.8h, v13.8h + bfmmla v14.4s, v14.8h, v14.8h + bfmmla v15.4s, v15.8h, v15.8h + bfmmla v16.4s, v16.8h, v16.8h + bfmmla v17.4s, v17.8h, v17.8h + bfmmla v18.4s, v18.8h, v18.8h + bfmmla v19.4s, v19.8h, v19.8h subs x0, x0, #1 - bfmmla v20.4s, v0.8h, v1.8h - bfmmla v21.4s, v0.8h, v1.8h - bfmmla v22.4s, v0.8h, v1.8h - bfmmla v23.4s, v0.8h, v1.8h - bfmmla v24.4s, v0.8h, v1.8h - bfmmla v25.4s, v0.8h, v1.8h - bfmmla v26.4s, v0.8h, v1.8h - bfmmla v27.4s, v0.8h, v1.8h - bfmmla v28.4s, v0.8h, v1.8h - bfmmla v29.4s, v0.8h, v1.8h - bfmmla v30.4s, v0.8h, v1.8h - bfmmla v31.4s, v0.8h, v1.8h + bfmmla v20.4s, v20.8h, v20.8h + bfmmla v21.4s, v21.8h, v21.8h + bfmmla v22.4s, v22.8h, v22.8h + bfmmla v23.4s, v23.8h, v23.8h + bfmmla v24.4s, v24.8h, v24.8h + bfmmla v25.4s, v25.8h, v25.8h + bfmmla v26.4s, v26.8h, v26.8h + bfmmla v27.4s, v27.8h, v27.8h + bfmmla v28.4s, v28.8h, v28.8h + bfmmla v29.4s, v29.8h, v29.8h + bfmmla v30.4s, v30.8h, v30.8h + bfmmla v31.4s, v31.8h, v31.8h bne .asimd.mmla.fp32bf16bf16.L1 restore_caller_vec ret @@ -113,31 +113,31 @@ asimd_dp2a_vs_fp32bf16bf16: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.dp2a.vs.fp32bf16bf16.L1: - bfdot v8.4s, v0.8h, v1.2h[0] - bfdot v9.4s, v0.8h, v1.2h[0] - bfdot v10.4s, v0.8h, v1.2h[0] - bfdot v11.4s, v0.8h, v1.2h[0] - bfdot v12.4s, v0.8h, v1.2h[0] - bfdot v13.4s, v0.8h, v1.2h[0] - bfdot v14.4s, v0.8h, v1.2h[0] - bfdot v15.4s, v0.8h, v1.2h[0] - bfdot v16.4s, v0.8h, v1.2h[0] - bfdot v17.4s, v0.8h, v1.2h[0] - bfdot v18.4s, v0.8h, v1.2h[0] - bfdot v19.4s, v0.8h, v1.2h[0] + bfdot v8.4s, v8.8h, v8.2h[0] + bfdot v9.4s, v9.8h, v9.2h[0] + bfdot v10.4s, v10.8h, v10.2h[0] + bfdot v11.4s, v11.8h, v11.2h[0] + bfdot v12.4s, v12.8h, v12.2h[0] + bfdot v13.4s, v13.8h, v13.2h[0] + bfdot v14.4s, v14.8h, v14.2h[0] + bfdot v15.4s, v15.8h, v15.2h[0] + bfdot v16.4s, v16.8h, v16.2h[0] + bfdot v17.4s, v17.8h, v17.2h[0] + bfdot v18.4s, v18.8h, v18.2h[0] + bfdot v19.4s, v19.8h, v19.2h[0] subs x0, x0, #1 - bfdot v20.4s, v0.8h, v1.2h[0] - bfdot v21.4s, v0.8h, v1.2h[0] - bfdot v22.4s, v0.8h, v1.2h[0] - bfdot v23.4s, v0.8h, v1.2h[0] - bfdot v24.4s, v0.8h, v1.2h[0] - bfdot v25.4s, v0.8h, v1.2h[0] - bfdot v26.4s, v0.8h, v1.2h[0] - bfdot v27.4s, v0.8h, v1.2h[0] - bfdot v28.4s, v0.8h, v1.2h[0] - bfdot v29.4s, v0.8h, v1.2h[0] - bfdot v30.4s, v0.8h, v1.2h[0] - bfdot v31.4s, v0.8h, v1.2h[0] + bfdot v20.4s, v20.8h, v20.2h[0] + bfdot v21.4s, v21.8h, v21.2h[0] + bfdot v22.4s, v22.8h, v22.2h[0] + bfdot v23.4s, v23.8h, v23.2h[0] + bfdot v24.4s, v24.8h, v24.2h[0] + bfdot v25.4s, v25.8h, v25.2h[0] + bfdot v26.4s, v26.8h, v26.2h[0] + bfdot v27.4s, v27.8h, v27.2h[0] + bfdot v28.4s, v28.8h, v28.2h[0] + bfdot v29.4s, v29.8h, v29.2h[0] + bfdot v30.4s, v30.8h, v30.2h[0] + bfdot v31.4s, v31.8h, v31.2h[0] bne .asimd.dp2a.vs.fp32bf16bf16.L1 restore_caller_vec ret @@ -177,31 +177,31 @@ asimd_dp2a_vv_fp32bf16bf16: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.dp2a.vv.fp32bf16bf16.L1: - bfdot v8.4s, v0.8h, v1.8h - bfdot v9.4s, v0.8h, v1.8h - bfdot v10.4s, v0.8h, v1.8h - bfdot v11.4s, v0.8h, v1.8h - bfdot v12.4s, v0.8h, v1.8h - bfdot v13.4s, v0.8h, v1.8h - bfdot v14.4s, v0.8h, v1.8h - bfdot v15.4s, v0.8h, v1.8h - bfdot v16.4s, v0.8h, v1.8h - bfdot v17.4s, v0.8h, v1.8h - bfdot v18.4s, v0.8h, v1.8h - bfdot v19.4s, v0.8h, v1.8h + bfdot v8.4s, v8.8h, v8.8h + bfdot v9.4s, v9.8h, v9.8h + bfdot v10.4s, v10.8h, v10.8h + bfdot v11.4s, v11.8h, v11.8h + bfdot v12.4s, v12.8h, v12.8h + bfdot v13.4s, v13.8h, v13.8h + bfdot v14.4s, v14.8h, v14.8h + bfdot v15.4s, v15.8h, v15.8h + bfdot v16.4s, v16.8h, v16.8h + bfdot v17.4s, v17.8h, v17.8h + bfdot v18.4s, v18.8h, v18.8h + bfdot v19.4s, v19.8h, v19.8h subs x0, x0, #1 - bfdot v20.4s, v0.8h, v1.8h - bfdot v21.4s, v0.8h, v1.8h - bfdot v22.4s, v0.8h, v1.8h - bfdot v23.4s, v0.8h, v1.8h - bfdot v24.4s, v0.8h, v1.8h - bfdot v25.4s, v0.8h, v1.8h - bfdot v26.4s, v0.8h, v1.8h - bfdot v27.4s, v0.8h, v1.8h - bfdot v28.4s, v0.8h, v1.8h - bfdot v29.4s, v0.8h, v1.8h - bfdot v30.4s, v0.8h, v1.8h - bfdot v31.4s, v0.8h, v1.8h + bfdot v20.4s, v20.8h, v20.8h + bfdot v21.4s, v21.8h, v21.8h + bfdot v22.4s, v22.8h, v22.8h + bfdot v23.4s, v23.8h, v23.8h + bfdot v24.4s, v24.8h, v24.8h + bfdot v25.4s, v25.8h, v25.8h + bfdot v26.4s, v26.8h, v26.8h + bfdot v27.4s, v27.8h, v27.8h + bfdot v28.4s, v28.8h, v28.8h + bfdot v29.4s, v29.8h, v29.8h + bfdot v30.4s, v30.8h, v30.8h + bfdot v31.4s, v31.8h, v31.8h bne .asimd.dp2a.vv.fp32bf16bf16.L1 restore_caller_vec ret diff --git a/arm64/asm/_I8MM_.S b/arm64/asm/_I8MM_.S index 8330335..b2a511c 100644 --- a/arm64/asm/_I8MM_.S +++ b/arm64/asm/_I8MM_.S @@ -49,31 +49,31 @@ asimd_mmla_s32s8s8: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.mmla.s32s8s8.L1: - smmla v8.4s, v0.16b, v1.16b - smmla v9.4s, v0.16b, v1.16b - smmla v10.4s, v0.16b, v1.16b - smmla v11.4s, v0.16b, v1.16b - smmla v12.4s, v0.16b, v1.16b - smmla v13.4s, v0.16b, v1.16b - smmla v14.4s, v0.16b, v1.16b - smmla v15.4s, v0.16b, v1.16b - smmla v16.4s, v0.16b, v1.16b - smmla v17.4s, v0.16b, v1.16b - smmla v18.4s, v0.16b, v1.16b - smmla v19.4s, v0.16b, v1.16b + smmla v8.4s, v8.16b, v8.16b + smmla v9.4s, v9.16b, v9.16b + smmla v10.4s, v10.16b, v10.16b + smmla v11.4s, v11.16b, v11.16b + smmla v12.4s, v12.16b, v12.16b + smmla v13.4s, v13.16b, v13.16b + smmla v14.4s, v14.16b, v14.16b + smmla v15.4s, v15.16b, v15.16b + smmla v16.4s, v16.16b, v16.16b + smmla v17.4s, v17.16b, v17.16b + smmla v18.4s, v18.16b, v18.16b + smmla v19.4s, v19.16b, v19.16b subs x0, x0, #1 - smmla v20.4s, v0.16b, v1.16b - smmla v21.4s, v0.16b, v1.16b - smmla v22.4s, v0.16b, v1.16b - smmla v23.4s, v0.16b, v1.16b - smmla v24.4s, v0.16b, v1.16b - smmla v25.4s, v0.16b, v1.16b - smmla v26.4s, v0.16b, v1.16b - smmla v27.4s, v0.16b, v1.16b - smmla v28.4s, v0.16b, v1.16b - smmla v29.4s, v0.16b, v1.16b - smmla v30.4s, v0.16b, v1.16b - smmla v31.4s, v0.16b, v1.16b + smmla v20.4s, v20.16b, v20.16b + smmla v21.4s, v21.16b, v21.16b + smmla v22.4s, v22.16b, v22.16b + smmla v23.4s, v23.16b, v23.16b + smmla v24.4s, v24.16b, v24.16b + smmla v25.4s, v25.16b, v25.16b + smmla v26.4s, v26.16b, v26.16b + smmla v27.4s, v27.16b, v27.16b + smmla v28.4s, v28.16b, v28.16b + smmla v29.4s, v29.16b, v29.16b + smmla v30.4s, v30.16b, v30.16b + smmla v31.4s, v31.16b, v31.16b bne .asimd.mmla.s32s8s8.L1 restore_caller_vec ret @@ -113,31 +113,31 @@ asimd_mmla_u32u8u8: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.mmla.u32u8u8.L1: - ummla v8.4s, v0.16b, v1.16b - ummla v9.4s, v0.16b, v1.16b - ummla v10.4s, v0.16b, v1.16b - ummla v11.4s, v0.16b, v1.16b - ummla v12.4s, v0.16b, v1.16b - ummla v13.4s, v0.16b, v1.16b - ummla v14.4s, v0.16b, v1.16b - ummla v15.4s, v0.16b, v1.16b - ummla v16.4s, v0.16b, v1.16b - ummla v17.4s, v0.16b, v1.16b - ummla v18.4s, v0.16b, v1.16b - ummla v19.4s, v0.16b, v1.16b + ummla v8.4s, v8.16b, v8.16b + ummla v9.4s, v9.16b, v9.16b + ummla v10.4s, v10.16b, v10.16b + ummla v11.4s, v11.16b, v11.16b + ummla v12.4s, v12.16b, v12.16b + ummla v13.4s, v13.16b, v13.16b + ummla v14.4s, v14.16b, v14.16b + ummla v15.4s, v15.16b, v15.16b + ummla v16.4s, v16.16b, v16.16b + ummla v17.4s, v17.16b, v17.16b + ummla v18.4s, v18.16b, v18.16b + ummla v19.4s, v19.16b, v19.16b subs x0, x0, #1 - ummla v20.4s, v0.16b, v1.16b - ummla v21.4s, v0.16b, v1.16b - ummla v22.4s, v0.16b, v1.16b - ummla v23.4s, v0.16b, v1.16b - ummla v24.4s, v0.16b, v1.16b - ummla v25.4s, v0.16b, v1.16b - ummla v26.4s, v0.16b, v1.16b - ummla v27.4s, v0.16b, v1.16b - ummla v28.4s, v0.16b, v1.16b - ummla v29.4s, v0.16b, v1.16b - ummla v30.4s, v0.16b, v1.16b - ummla v31.4s, v0.16b, v1.16b + ummla v20.4s, v20.16b, v20.16b + ummla v21.4s, v21.16b, v21.16b + ummla v22.4s, v22.16b, v22.16b + ummla v23.4s, v23.16b, v23.16b + ummla v24.4s, v24.16b, v24.16b + ummla v25.4s, v25.16b, v25.16b + ummla v26.4s, v26.16b, v26.16b + ummla v27.4s, v27.16b, v27.16b + ummla v28.4s, v28.16b, v28.16b + ummla v29.4s, v29.16b, v29.16b + ummla v30.4s, v30.16b, v30.16b + ummla v31.4s, v31.16b, v31.16b bne .asimd.mmla.u32u8u8.L1 restore_caller_vec ret @@ -177,31 +177,31 @@ asimd_mmla_s32u8s8: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.mmla.s32u8s8.L1: - usmmla v8.4s, v0.16b, v1.16b - usmmla v9.4s, v0.16b, v1.16b - usmmla v10.4s, v0.16b, v1.16b - usmmla v11.4s, v0.16b, v1.16b - usmmla v12.4s, v0.16b, v1.16b - usmmla v13.4s, v0.16b, v1.16b - usmmla v14.4s, v0.16b, v1.16b - usmmla v15.4s, v0.16b, v1.16b - usmmla v16.4s, v0.16b, v1.16b - usmmla v17.4s, v0.16b, v1.16b - usmmla v18.4s, v0.16b, v1.16b - usmmla v19.4s, v0.16b, v1.16b + usmmla v8.4s, v8.16b, v8.16b + usmmla v9.4s, v9.16b, v9.16b + usmmla v10.4s, v10.16b, v10.16b + usmmla v11.4s, v11.16b, v11.16b + usmmla v12.4s, v12.16b, v12.16b + usmmla v13.4s, v13.16b, v13.16b + usmmla v14.4s, v14.16b, v14.16b + usmmla v15.4s, v15.16b, v15.16b + usmmla v16.4s, v16.16b, v16.16b + usmmla v17.4s, v17.16b, v17.16b + usmmla v18.4s, v18.16b, v18.16b + usmmla v19.4s, v19.16b, v19.16b subs x0, x0, #1 - usmmla v20.4s, v0.16b, v1.16b - usmmla v21.4s, v0.16b, v1.16b - usmmla v22.4s, v0.16b, v1.16b - usmmla v23.4s, v0.16b, v1.16b - usmmla v24.4s, v0.16b, v1.16b - usmmla v25.4s, v0.16b, v1.16b - usmmla v26.4s, v0.16b, v1.16b - usmmla v27.4s, v0.16b, v1.16b - usmmla v28.4s, v0.16b, v1.16b - usmmla v29.4s, v0.16b, v1.16b - usmmla v30.4s, v0.16b, v1.16b - usmmla v31.4s, v0.16b, v1.16b + usmmla v20.4s, v20.16b, v20.16b + usmmla v21.4s, v21.16b, v21.16b + usmmla v22.4s, v22.16b, v22.16b + usmmla v23.4s, v23.16b, v23.16b + usmmla v24.4s, v24.16b, v24.16b + usmmla v25.4s, v25.16b, v25.16b + usmmla v26.4s, v26.16b, v26.16b + usmmla v27.4s, v27.16b, v27.16b + usmmla v28.4s, v28.16b, v28.16b + usmmla v29.4s, v29.16b, v29.16b + usmmla v30.4s, v30.16b, v30.16b + usmmla v31.4s, v31.16b, v31.16b bne .asimd.mmla.s32u8s8.L1 restore_caller_vec ret @@ -241,31 +241,31 @@ asimd_dp4a_vs_s32s8u8: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.dp4a.vs.s32s8u8.L1: - sudot v8.4s, v0.16b, v1.4b[0] - sudot v9.4s, v0.16b, v1.4b[0] - sudot v10.4s, v0.16b, v1.4b[0] - sudot v11.4s, v0.16b, v1.4b[0] - sudot v12.4s, v0.16b, v1.4b[0] - sudot v13.4s, v0.16b, v1.4b[0] - sudot v14.4s, v0.16b, v1.4b[0] - sudot v15.4s, v0.16b, v1.4b[0] - sudot v16.4s, v0.16b, v1.4b[0] - sudot v17.4s, v0.16b, v1.4b[0] - sudot v18.4s, v0.16b, v1.4b[0] - sudot v19.4s, v0.16b, v1.4b[0] + sudot v8.4s, v8.16b, v8.4b[0] + sudot v9.4s, v9.16b, v9.4b[0] + sudot v10.4s, v10.16b, v10.4b[0] + sudot v11.4s, v11.16b, v11.4b[0] + sudot v12.4s, v12.16b, v12.4b[0] + sudot v13.4s, v13.16b, v13.4b[0] + sudot v14.4s, v14.16b, v14.4b[0] + sudot v15.4s, v15.16b, v15.4b[0] + sudot v16.4s, v16.16b, v16.4b[0] + sudot v17.4s, v17.16b, v17.4b[0] + sudot v18.4s, v18.16b, v18.4b[0] + sudot v19.4s, v19.16b, v19.4b[0] subs x0, x0, #1 - sudot v20.4s, v0.16b, v1.4b[0] - sudot v21.4s, v0.16b, v1.4b[0] - sudot v22.4s, v0.16b, v1.4b[0] - sudot v23.4s, v0.16b, v1.4b[0] - sudot v24.4s, v0.16b, v1.4b[0] - sudot v25.4s, v0.16b, v1.4b[0] - sudot v26.4s, v0.16b, v1.4b[0] - sudot v27.4s, v0.16b, v1.4b[0] - sudot v28.4s, v0.16b, v1.4b[0] - sudot v29.4s, v0.16b, v1.4b[0] - sudot v30.4s, v0.16b, v1.4b[0] - sudot v31.4s, v0.16b, v1.4b[0] + sudot v20.4s, v20.16b, v20.4b[0] + sudot v21.4s, v21.16b, v21.4b[0] + sudot v22.4s, v22.16b, v22.4b[0] + sudot v23.4s, v23.16b, v23.4b[0] + sudot v24.4s, v24.16b, v24.4b[0] + sudot v25.4s, v25.16b, v25.4b[0] + sudot v26.4s, v26.16b, v26.4b[0] + sudot v27.4s, v27.16b, v27.4b[0] + sudot v28.4s, v28.16b, v28.4b[0] + sudot v29.4s, v29.16b, v29.4b[0] + sudot v30.4s, v30.16b, v30.4b[0] + sudot v31.4s, v31.16b, v31.4b[0] bne .asimd.dp4a.vs.s32s8u8.L1 restore_caller_vec ret @@ -305,31 +305,31 @@ asimd_dp4a_vs_s32u8s8: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.dp4a.vs.s32u8s8.L1: - usdot v8.4s, v0.16b, v1.4b[0] - usdot v9.4s, v0.16b, v1.4b[0] - usdot v10.4s, v0.16b, v1.4b[0] - usdot v11.4s, v0.16b, v1.4b[0] - usdot v12.4s, v0.16b, v1.4b[0] - usdot v13.4s, v0.16b, v1.4b[0] - usdot v14.4s, v0.16b, v1.4b[0] - usdot v15.4s, v0.16b, v1.4b[0] - usdot v16.4s, v0.16b, v1.4b[0] - usdot v17.4s, v0.16b, v1.4b[0] - usdot v18.4s, v0.16b, v1.4b[0] - usdot v19.4s, v0.16b, v1.4b[0] + usdot v8.4s, v8.16b, v8.4b[0] + usdot v9.4s, v9.16b, v9.4b[0] + usdot v10.4s, v10.16b, v10.4b[0] + usdot v11.4s, v11.16b, v11.4b[0] + usdot v12.4s, v12.16b, v12.4b[0] + usdot v13.4s, v13.16b, v13.4b[0] + usdot v14.4s, v14.16b, v14.4b[0] + usdot v15.4s, v15.16b, v15.4b[0] + usdot v16.4s, v16.16b, v16.4b[0] + usdot v17.4s, v17.16b, v17.4b[0] + usdot v18.4s, v18.16b, v18.4b[0] + usdot v19.4s, v19.16b, v19.4b[0] subs x0, x0, #1 - usdot v20.4s, v0.16b, v1.4b[0] - usdot v21.4s, v0.16b, v1.4b[0] - usdot v22.4s, v0.16b, v1.4b[0] - usdot v23.4s, v0.16b, v1.4b[0] - usdot v24.4s, v0.16b, v1.4b[0] - usdot v25.4s, v0.16b, v1.4b[0] - usdot v26.4s, v0.16b, v1.4b[0] - usdot v27.4s, v0.16b, v1.4b[0] - usdot v28.4s, v0.16b, v1.4b[0] - usdot v29.4s, v0.16b, v1.4b[0] - usdot v30.4s, v0.16b, v1.4b[0] - usdot v31.4s, v0.16b, v1.4b[0] + usdot v20.4s, v20.16b, v20.4b[0] + usdot v21.4s, v21.16b, v21.4b[0] + usdot v22.4s, v22.16b, v22.4b[0] + usdot v23.4s, v23.16b, v23.4b[0] + usdot v24.4s, v24.16b, v24.4b[0] + usdot v25.4s, v25.16b, v25.4b[0] + usdot v26.4s, v26.16b, v26.4b[0] + usdot v27.4s, v27.16b, v27.4b[0] + usdot v28.4s, v28.16b, v28.4b[0] + usdot v29.4s, v29.16b, v29.4b[0] + usdot v30.4s, v30.16b, v30.4b[0] + usdot v31.4s, v31.16b, v31.4b[0] bne .asimd.dp4a.vs.s32u8s8.L1 restore_caller_vec ret @@ -369,31 +369,31 @@ asimd_dp4a_vv_s32u8s8: eor v30.16b, v30.16b, v30.16b eor v31.16b, v31.16b, v31.16b .asimd.dp4a.vv.s32u8s8.L1: - usdot v8.4s, v0.16b, v1.16b - usdot v9.4s, v0.16b, v1.16b - usdot v10.4s, v0.16b, v1.16b - usdot v11.4s, v0.16b, v1.16b - usdot v12.4s, v0.16b, v1.16b - usdot v13.4s, v0.16b, v1.16b - usdot v14.4s, v0.16b, v1.16b - usdot v15.4s, v0.16b, v1.16b - usdot v16.4s, v0.16b, v1.16b - usdot v17.4s, v0.16b, v1.16b - usdot v18.4s, v0.16b, v1.16b - usdot v19.4s, v0.16b, v1.16b + usdot v8.4s, v8.16b, v8.16b + usdot v9.4s, v9.16b, v9.16b + usdot v10.4s, v10.16b, v10.16b + usdot v11.4s, v11.16b, v11.16b + usdot v12.4s, v12.16b, v12.16b + usdot v13.4s, v13.16b, v13.16b + usdot v14.4s, v14.16b, v14.16b + usdot v15.4s, v15.16b, v15.16b + usdot v16.4s, v16.16b, v16.16b + usdot v17.4s, v17.16b, v17.16b + usdot v18.4s, v18.16b, v18.16b + usdot v19.4s, v19.16b, v19.16b subs x0, x0, #1 - usdot v20.4s, v0.16b, v1.16b - usdot v21.4s, v0.16b, v1.16b - usdot v22.4s, v0.16b, v1.16b - usdot v23.4s, v0.16b, v1.16b - usdot v24.4s, v0.16b, v1.16b - usdot v25.4s, v0.16b, v1.16b - usdot v26.4s, v0.16b, v1.16b - usdot v27.4s, v0.16b, v1.16b - usdot v28.4s, v0.16b, v1.16b - usdot v29.4s, v0.16b, v1.16b - usdot v30.4s, v0.16b, v1.16b - usdot v31.4s, v0.16b, v1.16b + usdot v20.4s, v20.16b, v20.16b + usdot v21.4s, v21.16b, v21.16b + usdot v22.4s, v22.16b, v22.16b + usdot v23.4s, v23.16b, v23.16b + usdot v24.4s, v24.16b, v24.16b + usdot v25.4s, v25.16b, v25.16b + usdot v26.4s, v26.16b, v26.16b + usdot v27.4s, v27.16b, v27.16b + usdot v28.4s, v28.16b, v28.16b + usdot v29.4s, v29.16b, v29.16b + usdot v30.4s, v30.16b, v30.16b + usdot v31.4s, v31.16b, v31.16b bne .asimd.dp4a.vv.s32u8s8.L1 restore_caller_vec ret diff --git a/arm64/cpufp.cpp b/arm64/cpufp.cpp index 1c3cf77..5bc4ac8 100644 --- a/arm64/cpufp.cpp +++ b/arm64/cpufp.cpp @@ -111,18 +111,15 @@ static void cpubm_arm64_one(smtl_handle sh, smtl_begin_tasks(sh); smtl_wait_tasks_finished(sh); - clock_gettime(CLOCK_MONOTONIC_RAW, &start); for (i = 0; i < num_threads; i++) { smtl_add_task(sh, thread_func, (void*)&item); } smtl_begin_tasks(sh); - smtl_wait_tasks_finished(sh); - clock_gettime(CLOCK_MONOTONIC_RAW, &end); + double inv_tm = smtl_wait_tasks_finished(sh); time_used = get_time(&start, &end); - perf = item.loop_time * item.comp_pl * num_threads / - time_used; + perf = item.loop_time * item.comp_pl * inv_tm; if (perf > 1e12) { perfUnit = 'T'; diff --git a/common/smtl.cpp b/common/smtl.cpp index 20cc29a..2c9a9bb 100644 --- a/common/smtl.cpp +++ b/common/smtl.cpp @@ -1,5 +1,6 @@ #include "smtl.hpp" +#include #include #include #include @@ -13,6 +14,10 @@ #define SMTL_MAX_THREADS 512 +std::chrono::steady_clock Clock; +std::chrono::steady_clock::time_point tp; +double sumofinvTm; + enum smtl_status { SMTL_WORK, @@ -150,6 +155,8 @@ static void *smtl_thread_func(void *params) } sh->status[tid] = SMTL_IDLE; sh->thread_holds--; + auto x = std::chrono::duration_cast(Clock.now() - tp).count(); + sumofinvTm += 1000000.0 / x; if (sh->thread_holds == 0) { err = pthread_cond_signal(pt_cv); @@ -352,6 +359,8 @@ void smtl_add_task(smtl_handle sh, void smtl_begin_tasks(smtl_handle sh) { + tp = Clock.now(); + sumofinvTm = 0; int i, err = 0; sh->thread_holds = sh->num_threads; for (i = 0; i < sh->num_threads; i++) @@ -378,7 +387,7 @@ void smtl_begin_tasks(smtl_handle sh) } } -void smtl_wait_tasks_finished(smtl_handle sh) +double smtl_wait_tasks_finished(smtl_handle sh) { int err = 0; @@ -404,5 +413,6 @@ void smtl_wait_tasks_finished(smtl_handle sh) fprintf(stderr, "ERROR: pt_mtx unlock failed.\n"); exit(0); } + return sumofinvTm; } diff --git a/common/smtl.hpp b/common/smtl.hpp index 2b5ef2a..ead1a1d 100644 --- a/common/smtl.hpp +++ b/common/smtl.hpp @@ -19,7 +19,7 @@ void smtl_add_task(smtl_handle sh, void smtl_begin_tasks(smtl_handle sh); -void smtl_wait_tasks_finished(smtl_handle sh); +double smtl_wait_tasks_finished(smtl_handle sh); #endif diff --git a/e2k/cpufp.cpp b/e2k/cpufp.cpp index b6e49d5..2bd5728 100644 --- a/e2k/cpufp.cpp +++ b/e2k/cpufp.cpp @@ -100,18 +100,15 @@ static void cpubm_e2k_one(smtl_handle sh, smtl_begin_tasks(sh); smtl_wait_tasks_finished(sh); - clock_gettime(CLOCK_MONOTONIC_RAW, &start); for (i = 0; i < num_threads; i++) { smtl_add_task(sh, thread_func, (void*)&item); } smtl_begin_tasks(sh); - smtl_wait_tasks_finished(sh); - clock_gettime(CLOCK_MONOTONIC_RAW, &end); + double inv_tm = smtl_wait_tasks_finished(sh); time_used = get_time(&start, &end); - perf = item.loop_time * item.comp_pl * num_threads / - time_used; + perf = item.loop_time * item.comp_pl * inv_tm; if (perf > 1e12) { perfUnit = 'T'; diff --git a/loongarch64/cpufp.cpp b/loongarch64/cpufp.cpp index bcabc7f..3f5e6fa 100644 --- a/loongarch64/cpufp.cpp +++ b/loongarch64/cpufp.cpp @@ -106,18 +106,15 @@ static void cpubm_x64_one(smtl_handle sh, smtl_begin_tasks(sh); smtl_wait_tasks_finished(sh); - clock_gettime(CLOCK_MONOTONIC_RAW, &start); for (i = 0; i < num_threads; i++) { smtl_add_task(sh, thread_func, (void*)&item); } smtl_begin_tasks(sh); - smtl_wait_tasks_finished(sh); - clock_gettime(CLOCK_MONOTONIC_RAW, &end); + double inv_tm = smtl_wait_tasks_finished(sh); time_used = get_time(&start, &end); - perf = item.loop_time * item.comp_pl * num_threads / - time_used; + perf = item.loop_time * item.comp_pl * inv_tm; if (perf > 1e12) { perfUnit = 'T'; diff --git a/riscv64/cpufp.cpp b/riscv64/cpufp.cpp index 6e5f94a..29fdad0 100644 --- a/riscv64/cpufp.cpp +++ b/riscv64/cpufp.cpp @@ -93,18 +93,15 @@ static void cpubm_riscv64_one(smtl_handle sh, smtl_begin_tasks(sh); smtl_wait_tasks_finished(sh); - clock_gettime(CLOCK_MONOTONIC_RAW, &start); for (i = 0; i < num_threads; i++) { smtl_add_task(sh, thread_func, (void*)&item); } smtl_begin_tasks(sh); - smtl_wait_tasks_finished(sh); - clock_gettime(CLOCK_MONOTONIC_RAW, &end); + double inv_tm = smtl_wait_tasks_finished(sh); time_used = get_time(&start, &end); - perf = item.loop_time * item.comp_pl * num_threads / - time_used; + perf = item.loop_time * item.comp_pl * inv_tm; if (perf > 1e12) { perfUnit = 'T'; diff --git a/x64/cpufp.cpp b/x64/cpufp.cpp index d225881..e66fa37 100644 --- a/x64/cpufp.cpp +++ b/x64/cpufp.cpp @@ -216,18 +216,15 @@ static void cpubm_x64_one(smtl_handle sh, smtl_begin_tasks(sh); smtl_wait_tasks_finished(sh); - clock_gettime(CLOCK_MONOTONIC_RAW, &start); for (i = 0; i < num_threads; i++) { smtl_add_task(sh, thread_func, (void*)&item); } smtl_begin_tasks(sh); - smtl_wait_tasks_finished(sh); - clock_gettime(CLOCK_MONOTONIC_RAW, &end); + double inv_tm = smtl_wait_tasks_finished(sh); time_used = get_time(&start, &end); - perf = item.loop_time * item.comp_pl * num_threads / - time_used; + perf = item.loop_time * item.comp_pl * inv_tm; if (perf > 1e12) { perfUnit = 'T';