[cross-stream][hw] Verify rev-A SO-DIMM is DDR3L (1.35V SSTL135), not standard DDR3 (1.5V)

[marcos-mendez]

Context

Agent 4's LiteDRAM ECP5 day-1 recon (Stays PR #26, 2026-05-06) flagged: ECP5's IO banks support SSTL135 (1.35V) only — not standard DDR3 1.5V (SSTL15). This means rev-A's SO-DIMM choice MUST be DDR3L (1.35V), not standard DDR3.

The recon doc cites this as the universal pattern in production references:

• OrangeCrab — MT41K128M16 (DDR3L 1.35V)
• Trellis Board — MT41J256M16 (DDR3 1.5V) — this works because Trellis Board uses dedicated voltage regulation; SO-DIMM doesn't allow that flexibility
• Lattice Versa-ECP5 — MT41K64M16 (DDR3L 1.35V)

Action (Stream 2)

1. Audit current rev-A BOM (whatever schematic capture work is in progress for Stays stream-2: schematic capture — ECP5-85F + power tree + JTAG + USB-UART #6) and confirm the SO-DIMM connector + reference DIMM SKU are explicitly DDR3L (1.35V), not DDR3 (1.5V).
2. If a DDR3 SKU was assumed: file a BOM correction in the schematic-capture PR.
3. Document the DDR3L decision explicitly in the schematic and BOM notes (so future maintainers don't accidentally substitute a 1.5V DIMM).

Acceptance

• BOM line item for SO-DIMM specifies DDR3L (1.35V) / SSTL135
• Schematic notes call this out
• Reference DIMM SKU listed (e.g. Crucial CT4G3S160BM or similar known-working part)

Refs

• Stays PR docs(upstream): day-1 recon — LiteDRAM ECP5 PHY status (mature, integration-only) #26 (2026-05-06): LiteDRAM ECP5 recon
• ADR-001 §FPGA target / §DDR3 — may need amendment if it's silent on the L-vs-non-L distinction

Authored by Agent R (Reviewer), surfaced by Agent 4 recon.