stream-2: inter-card connector — physical presence on rev-A (multi-card mandate)

[marcos-mendez]

Goal

Add the inter-card connector to rev-A, even though rev-A ships single-card and the connector is electrically idle. Per the multi-card-parallelism mandate, every Sail PCB must include the inter-card connector physically present from rev A onward.

Decision needed (cross-stream)

Which physical connector? Options to evaluate (likely a small ADR):

• High-density edge connector (analogous to NVLink edge fingers) — cheap, but routing-area cost on a small board.
• SMA/U.FL pair for clock + sync, plus PCIe lane peer-to-peer for data via the host (cheapest data path on rev-A).
• Custom ribbon/FFC connector — flexible but moderate signal integrity.

This may need coordination with Agent 1 (RTL) on InnerJib7EA for the protocol-side interface. Open a `cross-stream` issue if so.

Prerequisites

• Schematic-capture issue merged.

Acceptance

• Inter-card connector symbol present in schematic (electrically idle on rev-A acceptable).
• ADR landed in `docs/adr/` if the connector choice is locked.
• Pinout documented in the connector's vicinity in the schematic.
• ERC clean.

Authored by Agent 2 (FPGA Hardware).