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add regression test for _mm_mulhi_epu16 issue
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tests/assembly-llvm/x86-vendor-intrinsics.rs

Lines changed: 40 additions & 0 deletions
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@@ -82,3 +82,43 @@ extern "C" fn test_sllv_srlv(win: __m512i, x: __m512i, v: __m512i) -> __m512i {
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let w = _mm512_or_si512(win, _mm512_sllv_epi16(x, v));
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_mm512_srlv_epi16(w, _mm512_and_si512(w, _mm512_set1_epi16(7)))
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}
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// See <https://github.com/rust-lang/rust/issues/159474> for context.
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// CHECK-LABEL: test_mulhi_loop:
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#[no_mangle]
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#[target_feature(enable = "sse2")]
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extern "C" fn test_mulhi_loop(buf: &mut [__m128i], factor: i16) {
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// CHECK: .cfi_startproc
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let factor = _mm_set1_epi16(factor);
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// CHECK-NOT: pmuludq
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// CHECK: pmulhuw
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// CHECK-NOT: pmuludq
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for i in 0..buf.len() {
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buf[i] = _mm_mulhi_epu16(buf[i], factor);
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}
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// CHECK: ret
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}
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// CHECK-LABEL: mul_and_shift:
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#[no_mangle]
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#[target_feature(enable = "sse2")]
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extern "C" fn mul_and_shift(a: __m128i, b: __m128i) -> __m128i {
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// CHECK: .cfi_startproc
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// CHECK-NEXT: pmulhuw
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// CHECK-NEXT: psrlw
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// CHECK-NEXT: ret
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unsafe { _mm_srli_epi16(_mm_mulhi_epu16(a, b), 1) }
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}
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// See <https://github.com/rust-lang/rust/issues/130782> for context.
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// CHECK-LABEL: test_mulhi:
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#[no_mangle]
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#[target_feature(enable = "avx2")]
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extern "C" fn test_mulhi(a: __m256i) -> __m256i {
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// CHECK: .cfi_startproc
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// CHECK-NEXT: vpand
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// CHECK-NEXT: vpmulhw
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// CHECK-NEXT: ret
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let a = _mm256_and_si256(a, _mm256_set1_epi16(0x7FFF));
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_mm256_mulhi_epi16(a, _mm256_set1_epi16(1000))
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}

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