latency?

[SoniEx2]

what is the latency of the system?

[steve-m]

That indeed is a very good question. So far I did not bother measuring it because the delay was not noticeable and 'good enough' for my purposes, but now I tested it, here you go:

Assumptions

• The main factor will be the input framerate, the higher the framerate, the lower the delay.

• Due to the double buffering of entire frames inside the MS2130 there will be quite a large amount of jitter, depending on where exactly during collecting of a frame the event happens.

• I've also seen a video on Youtube that did input lag measurements with the MS2130, and the result was < 100ms. I cannot find the video right now, however.

Test setup

• Orange Pi 5 Plus SBC (RK3588) strobing a GPIO from inside the hsdaoh_test application
• The GPIO is connected to both a RPi Pico2 and a Tang nano 20K to measure both hsdaoh-rp2350 and hsdaoh-fpga
• hsdaoh_test measures the delay with clock_gettime(CLOCK_MONOTONIC)

Results

The results are printed in milliseconds:

hsdaoh-fpga

Tang Nano 20K with maximum pixel clock it is capable of:
worst case: 62 ms

cycle: 169, time: 37.49, best: 22.28, worst: 62.07, avg: 41.70
cycle: 170, time: 37.79, best: 22.28, worst: 62.07, avg: 41.67
cycle: 171, time: 55.15, best: 22.28, worst: 62.07, avg: 41.75
cycle: 172, time: 37.02, best: 22.28, worst: 62.07, avg: 41.72
cycle: 173, time: 37.33, best: 22.28, worst: 62.07, avg: 41.70
cycle: 174, time: 53.12, best: 22.28, worst: 62.07, avg: 41.76
cycle: 175, time: 36.64, best: 22.28, worst: 62.07, avg: 41.74
cycle: 176, time: 36.78, best: 22.28, worst: 62.07, avg: 41.71
cycle: 177, time: 52.40, best: 22.28, worst: 62.07, avg: 41.77
cycle: 178, time: 36.09, best: 22.28, worst: 62.07, avg: 41.74
cycle: 179, time: 36.27, best: 22.28, worst: 62.07, avg: 41.71
cycle: 180, time: 51.86, best: 22.28, worst: 62.07, avg: 41.76
cycle: 181, time: 35.50, best: 22.28, worst: 62.07, avg: 41.73
cycle: 182, time: 35.65, best: 22.28, worst: 62.07, avg: 41.69
cycle: 183, time: 51.28, best: 22.28, worst: 62.07, avg: 41.75

hsdaoh-rp2350

Pico2 with 320 MHz clk_sys (also the HSTX clock) and 80MHz PIO sampling:
worst case: 82 ms

cycle: 207, time: 74.19, best: 38.29, worst: 82.11, avg: 61.11
cycle: 208, time: 73.93, best: 38.29, worst: 82.11, avg: 61.18
cycle: 209, time: 73.71, best: 38.29, worst: 82.11, avg: 61.24
cycle: 210, time: 73.46, best: 38.29, worst: 82.11, avg: 61.29
cycle: 211, time: 73.29, best: 38.29, worst: 82.11, avg: 61.35
cycle: 212, time: 73.08, best: 38.29, worst: 82.11, avg: 61.41
cycle: 213, time: 72.89, best: 38.29, worst: 82.11, avg: 61.46
cycle: 214, time: 41.65, best: 38.29, worst: 82.11, avg: 61.37
cycle: 215, time: 41.39, best: 38.29, worst: 82.11, avg: 61.27
cycle: 216, time: 41.18, best: 38.29, worst: 82.11, avg: 61.18
cycle: 217, time: 40.76, best: 38.29, worst: 82.11, avg: 61.09
cycle: 218, time: 57.26, best: 38.29, worst: 82.11, avg: 61.07
cycle: 219, time: 56.98, best: 38.29, worst: 82.11, avg: 61.05
cycle: 220, time: 56.70, best: 38.29, worst: 82.11, avg: 61.03

I hope this answers your question.

[SoniEx2]

ooof.

yeah, we mean we're trying to build a weird HID/input device/game controller (look for "meatmatglove" under our repos) and that would definitely be too much input lag :<

thanks tho!