Waveform.vwf

/*<simulation_settings>
<ftestbench_cmd>quartus_eda --gen_testbench --tool=modelsim_oem --format=vhdl --write_settings_files=off SimpleProcessor -c SimpleProcessor --vector_source="D:/QuartusProject/SimpleProcessor/Waveform.vwf" --testbench_file="D:/QuartusProject/SimpleProcessor/simulation/qsim/Waveform.vwf.vht"</ftestbench_cmd>
<ttestbench_cmd>quartus_eda --gen_testbench --tool=modelsim_oem --format=vhdl --write_settings_files=off SimpleProcessor -c SimpleProcessor --vector_source="D:/QuartusProject/SimpleProcessor/Waveform.vwf" --testbench_file="D:/QuartusProject/SimpleProcessor/simulation/qsim/Waveform.vwf.vht"</ttestbench_cmd>
<fnetlist_cmd>quartus_eda --write_settings_files=off --simulation --functional=on --flatten_buses=off --tool=modelsim_oem --format=vhdl --output_directory="D:/QuartusProject/SimpleProcessor/simulation/qsim/" SimpleProcessor -c SimpleProcessor</fnetlist_cmd>
<tnetlist_cmd>quartus_eda --write_settings_files=off --simulation --functional=off --flatten_buses=off --timescale=1ps --tool=modelsim_oem --format=vhdl --output_directory="D:/QuartusProject/SimpleProcessor/simulation/qsim/" SimpleProcessor -c SimpleProcessor</tnetlist_cmd>
<modelsim_script>onerror {exit -code 1}
vlib work
vcom -work work SimpleProcessor.vho
vcom -work work Waveform.vwf.vht
vsim -novopt -c -t 1ps -L cyclone10lp -L altera -L altera_mf -L 220model -L sgate -L altera_lnsim work.SimpleProcessor_vhd_vec_tst
vcd file -direction SimpleProcessor.msim.vcd
vcd add -internal SimpleProcessor_vhd_vec_tst/*
vcd add -internal SimpleProcessor_vhd_vec_tst/i1/*
proc simTimestamp {} {
    echo "Simulation time: $::now ps"
    if { [string equal running [runStatus]] } {
        after 2500 simTimestamp
    }
}
after 2500 simTimestamp
run -all
quit -f











</modelsim_script>
<modelsim_script_timing>onerror {exit -code 1}
vlib work
vcom -work work SimpleProcessor.vho
vcom -work work Waveform.vwf.vht
vsim -novopt -c -t 1ps -sdfmax SimpleProcessor_vhd_vec_tst/i1=SimpleProcessor_vhd.sdo -L cyclone10lp -L altera -L altera_mf -L 220model -L sgate -L altera_lnsim work.SimpleProcessor_vhd_vec_tst
vcd file -direction SimpleProcessor.msim.vcd
vcd add -internal SimpleProcessor_vhd_vec_tst/*
vcd add -internal SimpleProcessor_vhd_vec_tst/i1/*
proc simTimestamp {} {
    echo "Simulation time: $::now ps"
    if { [string equal running [runStatus]] } {
        after 2500 simTimestamp
    }
}
after 2500 simTimestamp
run -all
quit -f











</modelsim_script_timing>
<hdl_lang>vhdl</hdl_lang>
</simulation_settings>*/
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/

/*
Copyright (C) 2018  Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Intel Program License 
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors.  Please
refer to the applicable agreement for further details.
*/

HEADER
{
	VERSION = 1;
	TIME_UNIT = ns;
	DATA_OFFSET = 0.0;
	DATA_DURATION = 1000.0;
	SIMULATION_TIME = 0.0;
	GRID_PHASE = 0.0;
	GRID_PERIOD = 10.0;
	GRID_DUTY_CYCLE = 50;
}

SIGNAL("BUS_DATA")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 4;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("BUS_DATA[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "BUS_DATA";
}

SIGNAL("BUS_DATA[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "BUS_DATA";
}

SIGNAL("BUS_DATA[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "BUS_DATA";
}

SIGNAL("BUS_DATA[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "BUS_DATA";
}

SIGNAL("CLOCK")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("DIN")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 14;
	LSB_INDEX = 0;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("DIN[13]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "DIN";
}

SIGNAL("DIN[12]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "DIN";
}

SIGNAL("DIN[11]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "DIN";
}

SIGNAL("DIN[10]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "DIN";
}

SIGNAL("DIN[9]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "DIN";
}

SIGNAL("DIN[8]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "DIN";
}

SIGNAL("DIN[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "DIN";
}

SIGNAL("DIN[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "DIN";
}

SIGNAL("DIN[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "DIN";
}

SIGNAL("DIN[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "DIN";
}

SIGNAL("DIN[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "DIN";
}

SIGNAL("DIN[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "DIN";
}

SIGNAL("DIN[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "DIN";
}

SIGNAL("DIN[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "DIN";
}

SIGNAL("DONE")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("ENABLE")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("OVER_FLOW")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("REG0")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 4;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("REG0[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG0";
}

SIGNAL("REG0[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG0";
}

SIGNAL("REG0[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG0";
}

SIGNAL("REG0[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG0";
}

SIGNAL("REG1")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 4;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("REG1[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG1";
}

SIGNAL("REG1[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG1";
}

SIGNAL("REG1[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG1";
}

SIGNAL("REG1[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG1";
}

SIGNAL("REG2")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 4;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("REG2[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG2";
}

SIGNAL("REG2[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG2";
}

SIGNAL("REG2[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG2";
}

SIGNAL("REG2[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG2";
}

SIGNAL("REG3")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 4;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("REG3[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG3";
}

SIGNAL("REG3[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG3";
}

SIGNAL("REG3[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG3";
}

SIGNAL("REG3[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG3";
}

SIGNAL("REG4")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 4;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("REG4[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG4";
}

SIGNAL("REG4[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG4";
}

SIGNAL("REG4[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG4";
}

SIGNAL("REG4[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG4";
}

SIGNAL("REG5")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 4;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("REG5[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG5";
}

SIGNAL("REG5[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG5";
}

SIGNAL("REG5[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG5";
}

SIGNAL("REG5[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG5";
}

SIGNAL("REG6")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 4;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("REG6[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG6";
}

SIGNAL("REG6[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG6";
}

SIGNAL("REG6[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG6";
}

SIGNAL("REG6[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG6";
}

SIGNAL("REG7")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 4;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("REG7[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG7";
}

SIGNAL("REG7[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG7";
}

SIGNAL("REG7[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG7";
}

SIGNAL("REG7[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "REG7";
}

SIGNAL("RESET")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("STEP")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 2;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("STEP[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "STEP";
}

SIGNAL("STEP[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "STEP";
}

TRANSITION_LIST("BUS_DATA[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("BUS_DATA[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("BUS_DATA[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("BUS_DATA[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("CLOCK")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DIN[13]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DIN[12]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DIN[11]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DIN[10]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DIN[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DIN[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DIN[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DIN[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DIN[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DIN[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DIN[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DIN[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DIN[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DIN[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("DONE")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("ENABLE")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("OVER_FLOW")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG0[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG0[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG0[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG0[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG1[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG1[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG1[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG1[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG2[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG2[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG2[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG2[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG3[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG3[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG3[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG3[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG4[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG4[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG4[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG4[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG5[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG5[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG5[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG5[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG6[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG6[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG6[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG6[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG7[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG7[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG7[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("REG7[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("RESET")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("STEP[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

TRANSITION_LIST("STEP[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 1000.0;
	}
}

DISPLAY_LINE
{
	CHANNEL = "BUS_DATA";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 0;
	TREE_LEVEL = 0;
	CHILDREN = 1, 2, 3, 4;
}

DISPLAY_LINE
{
	CHANNEL = "BUS_DATA[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 1;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "BUS_DATA[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 2;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "BUS_DATA[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 3;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "BUS_DATA[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 4;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "CLOCK";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 5;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "DIN";
	EXPAND_STATUS = EXPANDED;
	RADIX = Binary;
	TREE_INDEX = 6;
	TREE_LEVEL = 0;
	CHILDREN = 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20;
}

DISPLAY_LINE
{
	CHANNEL = "DIN[13]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 7;
	TREE_LEVEL = 1;
	PARENT = 6;
}

DISPLAY_LINE
{
	CHANNEL = "DIN[12]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 8;
	TREE_LEVEL = 1;
	PARENT = 6;
}

DISPLAY_LINE
{
	CHANNEL = "DIN[11]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 9;
	TREE_LEVEL = 1;
	PARENT = 6;
}

DISPLAY_LINE
{
	CHANNEL = "DIN[10]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 10;
	TREE_LEVEL = 1;
	PARENT = 6;
}

DISPLAY_LINE
{
	CHANNEL = "DIN[9]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 11;
	TREE_LEVEL = 1;
	PARENT = 6;
}

DISPLAY_LINE
{
	CHANNEL = "DIN[8]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 12;
	TREE_LEVEL = 1;
	PARENT = 6;
}

DISPLAY_LINE
{
	CHANNEL = "DIN[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 13;
	TREE_LEVEL = 1;
	PARENT = 6;
}

DISPLAY_LINE
{
	CHANNEL = "DIN[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 14;
	TREE_LEVEL = 1;
	PARENT = 6;
}

DISPLAY_LINE
{
	CHANNEL = "DIN[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 15;
	TREE_LEVEL = 1;
	PARENT = 6;
}

DISPLAY_LINE
{
	CHANNEL = "DIN[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 16;
	TREE_LEVEL = 1;
	PARENT = 6;
}

DISPLAY_LINE
{
	CHANNEL = "DIN[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 17;
	TREE_LEVEL = 1;
	PARENT = 6;
}

DISPLAY_LINE
{
	CHANNEL = "DIN[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 18;
	TREE_LEVEL = 1;
	PARENT = 6;
}

DISPLAY_LINE
{
	CHANNEL = "DIN[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 19;
	TREE_LEVEL = 1;
	PARENT = 6;
}

DISPLAY_LINE
{
	CHANNEL = "DIN[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 20;
	TREE_LEVEL = 1;
	PARENT = 6;
}

DISPLAY_LINE
{
	CHANNEL = "DONE";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 21;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "ENABLE";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 22;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "OVER_FLOW";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 23;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "REG0";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 24;
	TREE_LEVEL = 0;
	CHILDREN = 25, 26, 27, 28;
}

DISPLAY_LINE
{
	CHANNEL = "REG0[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 25;
	TREE_LEVEL = 1;
	PARENT = 24;
}

DISPLAY_LINE
{
	CHANNEL = "REG0[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 26;
	TREE_LEVEL = 1;
	PARENT = 24;
}

DISPLAY_LINE
{
	CHANNEL = "REG0[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 27;
	TREE_LEVEL = 1;
	PARENT = 24;
}

DISPLAY_LINE
{
	CHANNEL = "REG0[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 28;
	TREE_LEVEL = 1;
	PARENT = 24;
}

DISPLAY_LINE
{
	CHANNEL = "REG1";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 29;
	TREE_LEVEL = 0;
	CHILDREN = 30, 31, 32, 33;
}

DISPLAY_LINE
{
	CHANNEL = "REG1[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 30;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "REG1[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 31;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "REG1[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 32;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "REG1[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 33;
	TREE_LEVEL = 1;
	PARENT = 29;
}

DISPLAY_LINE
{
	CHANNEL = "REG2";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 34;
	TREE_LEVEL = 0;
	CHILDREN = 35, 36, 37, 38;
}

DISPLAY_LINE
{
	CHANNEL = "REG2[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 35;
	TREE_LEVEL = 1;
	PARENT = 34;
}

DISPLAY_LINE
{
	CHANNEL = "REG2[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 36;
	TREE_LEVEL = 1;
	PARENT = 34;
}

DISPLAY_LINE
{
	CHANNEL = "REG2[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 37;
	TREE_LEVEL = 1;
	PARENT = 34;
}

DISPLAY_LINE
{
	CHANNEL = "REG2[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 38;
	TREE_LEVEL = 1;
	PARENT = 34;
}

DISPLAY_LINE
{
	CHANNEL = "REG3";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 39;
	TREE_LEVEL = 0;
	CHILDREN = 40, 41, 42, 43;
}

DISPLAY_LINE
{
	CHANNEL = "REG3[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 40;
	TREE_LEVEL = 1;
	PARENT = 39;
}

DISPLAY_LINE
{
	CHANNEL = "REG3[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 41;
	TREE_LEVEL = 1;
	PARENT = 39;
}

DISPLAY_LINE
{
	CHANNEL = "REG3[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 42;
	TREE_LEVEL = 1;
	PARENT = 39;
}

DISPLAY_LINE
{
	CHANNEL = "REG3[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 43;
	TREE_LEVEL = 1;
	PARENT = 39;
}

DISPLAY_LINE
{
	CHANNEL = "REG4";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 44;
	TREE_LEVEL = 0;
	CHILDREN = 45, 46, 47, 48;
}

DISPLAY_LINE
{
	CHANNEL = "REG4[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 45;
	TREE_LEVEL = 1;
	PARENT = 44;
}

DISPLAY_LINE
{
	CHANNEL = "REG4[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 46;
	TREE_LEVEL = 1;
	PARENT = 44;
}

DISPLAY_LINE
{
	CHANNEL = "REG4[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 47;
	TREE_LEVEL = 1;
	PARENT = 44;
}

DISPLAY_LINE
{
	CHANNEL = "REG4[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 48;
	TREE_LEVEL = 1;
	PARENT = 44;
}

DISPLAY_LINE
{
	CHANNEL = "REG5";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 49;
	TREE_LEVEL = 0;
	CHILDREN = 50, 51, 52, 53;
}

DISPLAY_LINE
{
	CHANNEL = "REG5[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 50;
	TREE_LEVEL = 1;
	PARENT = 49;
}

DISPLAY_LINE
{
	CHANNEL = "REG5[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 51;
	TREE_LEVEL = 1;
	PARENT = 49;
}

DISPLAY_LINE
{
	CHANNEL = "REG5[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 52;
	TREE_LEVEL = 1;
	PARENT = 49;
}

DISPLAY_LINE
{
	CHANNEL = "REG5[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 53;
	TREE_LEVEL = 1;
	PARENT = 49;
}

DISPLAY_LINE
{
	CHANNEL = "REG6";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 54;
	TREE_LEVEL = 0;
	CHILDREN = 55, 56, 57, 58;
}

DISPLAY_LINE
{
	CHANNEL = "REG6[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 55;
	TREE_LEVEL = 1;
	PARENT = 54;
}

DISPLAY_LINE
{
	CHANNEL = "REG6[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 56;
	TREE_LEVEL = 1;
	PARENT = 54;
}

DISPLAY_LINE
{
	CHANNEL = "REG6[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 57;
	TREE_LEVEL = 1;
	PARENT = 54;
}

DISPLAY_LINE
{
	CHANNEL = "REG6[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 58;
	TREE_LEVEL = 1;
	PARENT = 54;
}

DISPLAY_LINE
{
	CHANNEL = "REG7";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 59;
	TREE_LEVEL = 0;
	CHILDREN = 60, 61, 62, 63;
}

DISPLAY_LINE
{
	CHANNEL = "REG7[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 60;
	TREE_LEVEL = 1;
	PARENT = 59;
}

DISPLAY_LINE
{
	CHANNEL = "REG7[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 61;
	TREE_LEVEL = 1;
	PARENT = 59;
}

DISPLAY_LINE
{
	CHANNEL = "REG7[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 62;
	TREE_LEVEL = 1;
	PARENT = 59;
}

DISPLAY_LINE
{
	CHANNEL = "REG7[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 63;
	TREE_LEVEL = 1;
	PARENT = 59;
}

DISPLAY_LINE
{
	CHANNEL = "RESET";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 64;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "STEP";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 65;
	TREE_LEVEL = 0;
	CHILDREN = 66, 67;
}

DISPLAY_LINE
{
	CHANNEL = "STEP[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 66;
	TREE_LEVEL = 1;
	PARENT = 65;
}

DISPLAY_LINE
{
	CHANNEL = "STEP[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 67;
	TREE_LEVEL = 1;
	PARENT = 65;
}

TIME_BAR
{
	TIME = 0;
	MASTER = TRUE;
}
;