In addition to the ports, the sdram server API is currently passed:
- const static unsigned cas_latency,
- const static unsigned row_words,
- const static unsigned col_bits,
- const static unsigned col_address_bits,
- const static unsigned row_address_bits,
- const static unsigned bank_address_bits,
- const static unsigned refresh_ms,
- const static unsigned refresh_cycles,
- const static unsigned clock_divider);
- col_bits is unused by the server so should be removed
- row_words is misleading because it's actually the 32b row words (not the SDRAM row words) and can actually be calculated from col_address_bits (2 ^ (col - 1)) since API width is fixed at 32b and SDRAM width is fixed at 16b
- refresh_cycles in every SDRAM I have seen is (2 ^ row_address_bits) so could be removed
Finally, it makes sense to wrap up both of the port list (5 ports) and SDRAM config arguments into typedef-ed structures.
In addition to the ports, the sdram server API is currently passed:
Finally, it makes sense to wrap up both of the port list (5 ports) and SDRAM config arguments into typedef-ed structures.