Incorrect register for Hypervisor Bit testing

[KokerZhou]

VMDetect/src/cpuid.asm

Lines 36 to 43 in 80e62af

	is_vm_running:
	; Check if the hypervisor present bit (bit 31) is set after executing CPUID
	mov eax, 1
	cpuid
	test edx, 1 << 31 ; Test the 31st bit in the EDX register (hypervisor present bit)
	jnz vm_detected ; If the bit is set, jump to vm_detected
	mov eax, 0 ; If the bit is not set, return 0
	ret

Should be ECX. Have you tested the code? Can be interesting if it worked.

For EDX in your code:

Bit #	Mnemonic	Description
31	PBE	Pending Break Enable. The processor supports the use of the FERR#/PBE# pin when the processor is in the stop-clock state (STPCLK# is asserted) to signal the processor that an interrupt is pending and that the processor should return to normal operation to handle the interrupt.