From e44329a9c8ef7be8b8c5f3fc9118b521b3f74d1f Mon Sep 17 00:00:00 2001 From: George Adams Date: Fri, 27 Feb 2026 15:45:55 +0000 Subject: [PATCH 01/19] runtime/cgo: add abi_riscv64.h for callee-saved register macros Add abi_riscv64.h with SAVE_GPR/SAVE_FPR macros for saving and restoring the RISC-V callee-saved registers, following the pattern established by the other abi_*.h headers. Refactor asm_riscv64.s (cgo crosscall2), asm_riscv64.s (runtime _rt0_riscv64_lib), and race_riscv64.s (racecallbackthunk) to use the new macros, replacing inline register save/restore sequences. Change-Id: I83cef17a35c57fc8b5e045e7181460283ae5b423 Reviewed-on: https://go-review.googlesource.com/c/go/+/749900 Reviewed-by: David Chase LUCI-TryBot-Result: Go LUCI Reviewed-by: Quim Muntal Reviewed-by: Russ Cox --- src/runtime/asm_riscv64.s | 53 +++----------------------- src/runtime/cgo/abi_riscv64.h | 72 +++++++++++++++++++++++++++++++++++ src/runtime/cgo/asm_riscv64.s | 55 ++++---------------------- src/runtime/race_riscv64.s | 53 +++----------------------- 4 files changed, 89 insertions(+), 144 deletions(-) create mode 100644 src/runtime/cgo/abi_riscv64.h diff --git a/src/runtime/asm_riscv64.s b/src/runtime/asm_riscv64.s index 35140a9e106e06..3bc33427798dc5 100644 --- a/src/runtime/asm_riscv64.s +++ b/src/runtime/asm_riscv64.s @@ -5,6 +5,7 @@ #include "go_asm.h" #include "funcdata.h" #include "textflag.h" +#include "cgo/abi_riscv64.h" // When building with -buildmode=c-shared, this symbol is called when the shared @@ -12,30 +13,8 @@ TEXT _rt0_riscv64_lib(SB),NOSPLIT,$224 // Preserve callee-save registers, along with X1 (LR). MOV X1, (8*3)(X2) - MOV X8, (8*4)(X2) - MOV X9, (8*5)(X2) - MOV X18, (8*6)(X2) - MOV X19, (8*7)(X2) - MOV X20, (8*8)(X2) - MOV X21, (8*9)(X2) - MOV X22, (8*10)(X2) - MOV X23, (8*11)(X2) - MOV X24, (8*12)(X2) - MOV X25, (8*13)(X2) - MOV X26, (8*14)(X2) - MOV g, (8*15)(X2) - MOVD F8, (8*16)(X2) - MOVD F9, (8*17)(X2) - MOVD F18, (8*18)(X2) - MOVD F19, (8*19)(X2) - MOVD F20, (8*20)(X2) - MOVD F21, (8*21)(X2) - MOVD F22, (8*22)(X2) - MOVD F23, (8*23)(X2) - MOVD F24, (8*24)(X2) - MOVD F25, (8*25)(X2) - MOVD F26, (8*26)(X2) - MOVD F27, (8*27)(X2) + SAVE_GPR((8*4)) + SAVE_FPR((8*16)) // Initialize g as nil in case of using g later e.g. sigaction in cgo_sigaction.go MOV X0, g @@ -66,30 +45,8 @@ nocgo: restore: // Restore callee-save registers, along with X1 (LR). MOV (8*3)(X2), X1 - MOV (8*4)(X2), X8 - MOV (8*5)(X2), X9 - MOV (8*6)(X2), X18 - MOV (8*7)(X2), X19 - MOV (8*8)(X2), X20 - MOV (8*9)(X2), X21 - MOV (8*10)(X2), X22 - MOV (8*11)(X2), X23 - MOV (8*12)(X2), X24 - MOV (8*13)(X2), X25 - MOV (8*14)(X2), X26 - MOV (8*15)(X2), g - MOVD (8*16)(X2), F8 - MOVD (8*17)(X2), F9 - MOVD (8*18)(X2), F18 - MOVD (8*19)(X2), F19 - MOVD (8*20)(X2), F20 - MOVD (8*21)(X2), F21 - MOVD (8*22)(X2), F22 - MOVD (8*23)(X2), F23 - MOVD (8*24)(X2), F24 - MOVD (8*25)(X2), F25 - MOVD (8*26)(X2), F26 - MOVD (8*27)(X2), F27 + RESTORE_GPR((8*4)) + RESTORE_FPR((8*16)) RET diff --git a/src/runtime/cgo/abi_riscv64.h b/src/runtime/cgo/abi_riscv64.h new file mode 100644 index 00000000000000..b9322e0c53e2ac --- /dev/null +++ b/src/runtime/cgo/abi_riscv64.h @@ -0,0 +1,72 @@ +// Copyright 2026 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +// Macros for transitioning from the host ABI to Go ABI0. +// +// These macros save and restore the callee-saved registers +// from the stack, but they don't adjust stack pointer, so +// the user should prepare stack space in advance. +// SAVE_GPR(offset) saves X8, X9, X18-X27 to the stack space +// of ((offset)+0*8)(X2) ~ ((offset)+11*8)(X2). +// +// SAVE_FPR(offset) saves F8, F9, F18-F27 to the stack space +// of ((offset)+0*8)(X2) ~ ((offset)+11*8)(X2). +// +// Note: g is X27 + +#define SAVE_GPR(offset) \ + MOV X8, ((offset)+0*8)(X2) \ + MOV X9, ((offset)+1*8)(X2) \ + MOV X18, ((offset)+2*8)(X2) \ + MOV X19, ((offset)+3*8)(X2) \ + MOV X20, ((offset)+4*8)(X2) \ + MOV X21, ((offset)+5*8)(X2) \ + MOV X22, ((offset)+6*8)(X2) \ + MOV X23, ((offset)+7*8)(X2) \ + MOV X24, ((offset)+8*8)(X2) \ + MOV X25, ((offset)+9*8)(X2) \ + MOV X26, ((offset)+10*8)(X2) \ + MOV g, ((offset)+11*8)(X2) + +#define RESTORE_GPR(offset) \ + MOV ((offset)+0*8)(X2), X8 \ + MOV ((offset)+1*8)(X2), X9 \ + MOV ((offset)+2*8)(X2), X18 \ + MOV ((offset)+3*8)(X2), X19 \ + MOV ((offset)+4*8)(X2), X20 \ + MOV ((offset)+5*8)(X2), X21 \ + MOV ((offset)+6*8)(X2), X22 \ + MOV ((offset)+7*8)(X2), X23 \ + MOV ((offset)+8*8)(X2), X24 \ + MOV ((offset)+9*8)(X2), X25 \ + MOV ((offset)+10*8)(X2), X26 \ + MOV ((offset)+11*8)(X2), g + +#define SAVE_FPR(offset) \ + MOVD F8, ((offset)+0*8)(X2) \ + MOVD F9, ((offset)+1*8)(X2) \ + MOVD F18, ((offset)+2*8)(X2) \ + MOVD F19, ((offset)+3*8)(X2) \ + MOVD F20, ((offset)+4*8)(X2) \ + MOVD F21, ((offset)+5*8)(X2) \ + MOVD F22, ((offset)+6*8)(X2) \ + MOVD F23, ((offset)+7*8)(X2) \ + MOVD F24, ((offset)+8*8)(X2) \ + MOVD F25, ((offset)+9*8)(X2) \ + MOVD F26, ((offset)+10*8)(X2) \ + MOVD F27, ((offset)+11*8)(X2) + +#define RESTORE_FPR(offset) \ + MOVD ((offset)+0*8)(X2), F8 \ + MOVD ((offset)+1*8)(X2), F9 \ + MOVD ((offset)+2*8)(X2), F18 \ + MOVD ((offset)+3*8)(X2), F19 \ + MOVD ((offset)+4*8)(X2), F20 \ + MOVD ((offset)+5*8)(X2), F21 \ + MOVD ((offset)+6*8)(X2), F22 \ + MOVD ((offset)+7*8)(X2), F23 \ + MOVD ((offset)+8*8)(X2), F24 \ + MOVD ((offset)+9*8)(X2), F25 \ + MOVD ((offset)+10*8)(X2), F26 \ + MOVD ((offset)+11*8)(X2), F27 diff --git a/src/runtime/cgo/asm_riscv64.s b/src/runtime/cgo/asm_riscv64.s index d75a5438429e9d..d8be554977feb7 100644 --- a/src/runtime/cgo/asm_riscv64.s +++ b/src/runtime/cgo/asm_riscv64.s @@ -3,6 +3,7 @@ // license that can be found in the LICENSE file. #include "textflag.h" +#include "abi_riscv64.h" // Set the x_crosscall2_ptr C function pointer variable point to crosscall2. // It's such a pointer chain: _crosscall2_ptr -> x_crosscall2_ptr -> crosscall2 @@ -31,61 +32,19 @@ TEXT crosscall2(SB),NOSPLIT|NOFRAME,$0 MOV X10, (8*1)(X2) // fn unsafe.Pointer MOV X11, (8*2)(X2) // a unsafe.Pointer MOV X13, (8*3)(X2) // ctxt uintptr - MOV X8, (8*4)(X2) - MOV X9, (8*5)(X2) - MOV X18, (8*6)(X2) - MOV X19, (8*7)(X2) - MOV X20, (8*8)(X2) - MOV X21, (8*9)(X2) - MOV X22, (8*10)(X2) - MOV X23, (8*11)(X2) - MOV X24, (8*12)(X2) - MOV X25, (8*13)(X2) - MOV X26, (8*14)(X2) - MOV g, (8*15)(X2) + + SAVE_GPR((8*4)) MOV X1, (8*16)(X2) - MOVD F8, (8*17)(X2) - MOVD F9, (8*18)(X2) - MOVD F18, (8*19)(X2) - MOVD F19, (8*20)(X2) - MOVD F20, (8*21)(X2) - MOVD F21, (8*22)(X2) - MOVD F22, (8*23)(X2) - MOVD F23, (8*24)(X2) - MOVD F24, (8*25)(X2) - MOVD F25, (8*26)(X2) - MOVD F26, (8*27)(X2) - MOVD F27, (8*28)(X2) + SAVE_FPR((8*17)) // Initialize Go ABI environment CALL runtime·load_g(SB) CALL runtime·cgocallback(SB) - MOV (8*4)(X2), X8 - MOV (8*5)(X2), X9 - MOV (8*6)(X2), X18 - MOV (8*7)(X2), X19 - MOV (8*8)(X2), X20 - MOV (8*9)(X2), X21 - MOV (8*10)(X2), X22 - MOV (8*11)(X2), X23 - MOV (8*12)(X2), X24 - MOV (8*13)(X2), X25 - MOV (8*14)(X2), X26 - MOV (8*15)(X2), g + RESTORE_GPR((8*4)) MOV (8*16)(X2), X1 - MOVD (8*17)(X2), F8 - MOVD (8*18)(X2), F9 - MOVD (8*19)(X2), F18 - MOVD (8*20)(X2), F19 - MOVD (8*21)(X2), F20 - MOVD (8*22)(X2), F21 - MOVD (8*23)(X2), F22 - MOVD (8*24)(X2), F23 - MOVD (8*25)(X2), F24 - MOVD (8*26)(X2), F25 - MOVD (8*27)(X2), F26 - MOVD (8*28)(X2), F27 + RESTORE_FPR((8*17)) + ADD $(8*29), X2 RET diff --git a/src/runtime/race_riscv64.s b/src/runtime/race_riscv64.s index a455c9e496175c..26ea43420c1630 100644 --- a/src/runtime/race_riscv64.s +++ b/src/runtime/race_riscv64.s @@ -7,6 +7,7 @@ #include "go_asm.h" #include "funcdata.h" #include "textflag.h" +#include "cgo/abi_riscv64.h" // The following thunks allow calling the gcc-compiled race runtime directly // from Go code without going all the way through cgo. @@ -473,30 +474,8 @@ rest: // 8(X2) and 16(X2) are for args passed to racecallback SUB $(27*8), X2 MOV X1, (0*8)(X2) - MOV X8, (3*8)(X2) - MOV X9, (4*8)(X2) - MOV X18, (5*8)(X2) - MOV X19, (6*8)(X2) - MOV X20, (7*8)(X2) - MOV X21, (8*8)(X2) - MOV X22, (9*8)(X2) - MOV X23, (10*8)(X2) - MOV X24, (11*8)(X2) - MOV X25, (12*8)(X2) - MOV X26, (13*8)(X2) - MOV g, (14*8)(X2) - MOVD F8, (15*8)(X2) - MOVD F9, (16*8)(X2) - MOVD F18, (17*8)(X2) - MOVD F19, (18*8)(X2) - MOVD F20, (19*8)(X2) - MOVD F21, (20*8)(X2) - MOVD F22, (21*8)(X2) - MOVD F23, (22*8)(X2) - MOVD F24, (23*8)(X2) - MOVD F25, (24*8)(X2) - MOVD F26, (25*8)(X2) - MOVD F27, (26*8)(X2) + SAVE_GPR((3*8)) + SAVE_FPR((15*8)) // Set g = g0. CALL runtime·load_g(SB) @@ -515,30 +494,8 @@ rest: ret: // Restore callee-save registers. MOV (0*8)(X2), X1 - MOV (3*8)(X2), X8 - MOV (4*8)(X2), X9 - MOV (5*8)(X2), X18 - MOV (6*8)(X2), X19 - MOV (7*8)(X2), X20 - MOV (8*8)(X2), X21 - MOV (9*8)(X2), X22 - MOV (10*8)(X2), X23 - MOV (11*8)(X2), X24 - MOV (12*8)(X2), X25 - MOV (13*8)(X2), X26 - MOV (14*8)(X2), g - MOVD (15*8)(X2), F8 - MOVD (16*8)(X2), F9 - MOVD (17*8)(X2), F18 - MOVD (18*8)(X2), F19 - MOVD (19*8)(X2), F20 - MOVD (20*8)(X2), F21 - MOVD (21*8)(X2), F22 - MOVD (22*8)(X2), F23 - MOVD (23*8)(X2), F24 - MOVD (24*8)(X2), F25 - MOVD (25*8)(X2), F26 - MOVD (26*8)(X2), F27 + RESTORE_GPR((3*8)) + RESTORE_FPR((15*8)) ADD $(27*8), X2 JMP (X1) From 2f87a8eec89aed3b23d58357590e6ef26dae3b41 Mon Sep 17 00:00:00 2001 From: wangboyao Date: Mon, 9 Mar 2026 20:12:59 +0800 Subject: [PATCH 02/19] runtime, cmd/internal/obj/riscv: enable framepointer on riscv64 This CL implements hardware frame pointer support for riscv64. The stack layout is similar to arm64, but with the following specifics: - The FP register points to SP+8. - The return address (LR) is stored at SP. - The caller's FP is stored at SP-8. Change-Id: I3bc7af2abb024ea0b0e3432ed517641c6707f7a2 --- .../compile/internal/ssa/_gen/RISCV64Ops.go | 9 +- src/cmd/compile/internal/ssa/opGen.go | 720 +++++++++--------- src/cmd/internal/obj/riscv/obj.go | 107 ++- .../internal/fips140/bigmod/nat_riscv64.s | 10 +- .../fips140/sha256/sha256block_riscv64.s | 32 +- .../fips140/sha512/sha512block_riscv64.s | 38 +- .../internal/fips140/subtle/xor_riscv64.s | 10 +- src/crypto/md5/md5block_riscv64.s | 20 +- src/crypto/sha1/sha1block_riscv64.s | 18 +- src/internal/abi/abi_riscv64.go | 4 +- src/internal/buildcfg/exp.go | 2 +- src/internal/bytealg/compare_riscv64.s | 38 +- src/math/big/arith_riscv64.s | 488 ++++++------ src/math/big/internal/asmgen/riscv64.go | 3 +- src/runtime/asan_riscv64.s | 4 +- src/runtime/asm_riscv64.s | 152 ++-- src/runtime/cgo/asm_riscv64.s | 4 +- src/runtime/mkpreempt.go | 10 +- src/runtime/mprof.go | 13 +- src/runtime/panic.go | 4 + src/runtime/preempt_riscv64.s | 220 +++--- src/runtime/proc.go | 2 +- src/runtime/race_riscv64.s | 14 +- src/runtime/runtime2.go | 14 +- src/runtime/signal_riscv64.go | 15 +- src/runtime/stack.go | 15 +- src/runtime/stubs_riscv64.go | 4 +- src/runtime/traceback.go | 6 +- src/runtime/tracestack.go | 18 +- test/nosplit.go | 8 +- 30 files changed, 1077 insertions(+), 925 deletions(-) diff --git a/src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go b/src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go index 48723862e1813e..cf8df6c51b5b19 100644 --- a/src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go +++ b/src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go @@ -28,6 +28,7 @@ const ( riscv64REG_SP = 2 riscv64REG_GP = 3 riscv64REG_TP = 4 + riscv64REG_FP = 8 riscv64REG_TMP = 31 riscv64REG_ZERO = 0 ) @@ -79,7 +80,7 @@ func init() { // Add general purpose registers to gpMask. switch r { // ZERO, GP, TP and TMP are not in any gp mask. - case riscv64REG_ZERO, riscv64REG_GP, riscv64REG_TP, riscv64REG_TMP: + case riscv64REG_ZERO, riscv64REG_GP, riscv64REG_TP, riscv64REG_TMP, riscv64REG_FP: case riscv64REG_G: gpgMask |= mask gpspsbgMask |= mask @@ -590,9 +591,9 @@ func init() { regnames: regNamesRISCV64, gpregmask: gpMask, fpregmask: fpMask, - framepointerreg: -1, // not used - // Integer parameters passed in register X10-X17, X8-X9, X18-X23 - ParamIntRegNames: "X10 X11 X12 X13 X14 X15 X16 X17 X8 X9 X18 X19 X20 X21 X22 X23", + framepointerreg: 7, // Frame Pointer of RISCV is X8 + // Integer parameters passed in register X10-X17, X9, X18-X23 + ParamIntRegNames: "X10 X11 X12 X13 X14 X15 X16 X17 X9 X18 X19 X20 X21 X22 X23", // Float parameters passed in register F10-F17, F8-F9, F18-F23 ParamFloatRegNames: "F10 F11 F12 F13 F14 F15 F16 F17 F8 F9 F18 F19 F20 F21 F22 F23", }) diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go index eab93429c8b676..23bd42f5635028 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go @@ -78924,11 +78924,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AADD, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -78939,10 +78939,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AADDI, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -78953,10 +78953,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AADDIW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -78966,10 +78966,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ANEG, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -78979,10 +78979,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ANEGW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -78992,11 +78992,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASUB, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79006,11 +79006,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASUBW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79021,11 +79021,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMUL, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79036,11 +79036,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMULW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79051,11 +79051,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMULH, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79066,11 +79066,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMULHU, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79080,12 +79080,12 @@ var opcodeTable = [...]opInfo{ resultNotInArgs: true, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79095,12 +79095,12 @@ var opcodeTable = [...]opInfo{ resultNotInArgs: true, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79110,11 +79110,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ADIV, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79124,11 +79124,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ADIVU, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79138,11 +79138,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ADIVW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79152,11 +79152,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ADIVUW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79166,11 +79166,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AREM, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79180,11 +79180,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AREMU, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79194,11 +79194,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AREMW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79208,11 +79208,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AREMUW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79225,10 +79225,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOV, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79240,7 +79240,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOV, reg: regInfo{ outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79277,10 +79277,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVB, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79293,10 +79293,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVH, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79309,10 +79309,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVW, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79325,10 +79325,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOV, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79341,10 +79341,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVBU, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79357,10 +79357,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVHU, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79373,10 +79373,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVWU, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79389,8 +79389,8 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVB, reg: regInfo{ inputs: []inputInfo{ - {1, 1006632946}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {1, 1006632818}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, }, }, @@ -79403,8 +79403,8 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVH, reg: regInfo{ inputs: []inputInfo{ - {1, 1006632946}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {1, 1006632818}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, }, }, @@ -79417,8 +79417,8 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVW, reg: regInfo{ inputs: []inputInfo{ - {1, 1006632946}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {1, 1006632818}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, }, }, @@ -79431,8 +79431,8 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOV, reg: regInfo{ inputs: []inputInfo{ - {1, 1006632946}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {1, 1006632818}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, }, }, @@ -79445,7 +79445,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVB, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, }, }, @@ -79458,7 +79458,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVH, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, }, }, @@ -79471,7 +79471,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVW, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, }, }, @@ -79484,7 +79484,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOV, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, }, }, @@ -79494,10 +79494,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVB, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79507,10 +79507,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVH, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79520,10 +79520,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79533,10 +79533,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOV, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79546,10 +79546,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVBU, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79559,10 +79559,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVHU, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79572,10 +79572,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVWU, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79585,10 +79585,10 @@ var opcodeTable = [...]opInfo{ resultInArg0: true, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79598,11 +79598,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASLL, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79612,11 +79612,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASLLW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79626,11 +79626,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASRA, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79640,11 +79640,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASRAW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79654,11 +79654,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASRL, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79668,11 +79668,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASRLW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79683,10 +79683,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASLLI, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79697,10 +79697,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASLLIW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79711,10 +79711,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASRAI, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79725,10 +79725,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASRAIW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79739,10 +79739,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASRLI, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79753,10 +79753,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASRLIW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79766,11 +79766,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASH1ADD, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79780,11 +79780,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASH2ADD, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79794,11 +79794,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASH3ADD, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79808,11 +79808,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AADDUW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79822,11 +79822,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASH1ADDUW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79836,11 +79836,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASH2ADDUW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79850,11 +79850,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASH3ADDUW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79865,10 +79865,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASLLIUW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79879,11 +79879,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AAND, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79893,11 +79893,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AANDN, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79908,10 +79908,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AANDI, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79921,10 +79921,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ACLZ, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79934,10 +79934,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ACLZW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79947,10 +79947,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ACPOP, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79960,10 +79960,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ACPOPW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79973,10 +79973,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ACTZ, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79986,10 +79986,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ACTZW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -79999,10 +79999,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ANOT, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80013,11 +80013,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AOR, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80027,11 +80027,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AORN, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80042,10 +80042,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AORI, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80055,10 +80055,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AREV8, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80068,11 +80068,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AROL, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80082,11 +80082,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AROLW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80096,11 +80096,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AROR, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80111,10 +80111,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ARORI, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80125,10 +80125,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ARORIW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80138,11 +80138,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ARORW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80153,11 +80153,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AXNOR, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80168,11 +80168,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AXOR, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80183,10 +80183,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.AXORI, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80197,11 +80197,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMIN, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80212,11 +80212,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMAX, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80227,11 +80227,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMINU, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80242,11 +80242,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMAXU, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80256,10 +80256,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASEQZ, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80269,10 +80269,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASNEZ, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80282,11 +80282,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASLT, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80297,10 +80297,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASLTI, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80310,11 +80310,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASLTU, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80325,10 +80325,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ASLTIU, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80364,7 +80364,7 @@ var opcodeTable = [...]opInfo{ argLen: -1, call: true, reg: regInfo{ - clobbers: 9223372035781033968, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + clobbers: 9223372035781033840, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, }, { @@ -80374,7 +80374,7 @@ var opcodeTable = [...]opInfo{ call: true, tailCall: true, reg: regInfo{ - clobbers: 9223372035781033968, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + clobbers: 9223372035781033840, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, }, { @@ -80385,9 +80385,9 @@ var opcodeTable = [...]opInfo{ reg: regInfo{ inputs: []inputInfo{ {1, 33554432}, // X26 - {0, 1006632930}, // SP X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632802}, // SP X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, - clobbers: 9223372035781033968, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + clobbers: 9223372035781033840, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, }, { @@ -80397,9 +80397,9 @@ var opcodeTable = [...]opInfo{ call: true, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632928}, // X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632800}, // X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, - clobbers: 9223372035781033968, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 + clobbers: 9223372035781033840, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, }, { @@ -80410,7 +80410,7 @@ var opcodeTable = [...]opInfo{ symEffect: SymWrite, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80423,7 +80423,7 @@ var opcodeTable = [...]opInfo{ symEffect: SymWrite, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, clobbersArg0: true, }, @@ -80437,8 +80437,8 @@ var opcodeTable = [...]opInfo{ symEffect: SymWrite, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632928}, // X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632928}, // X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632800}, // X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632800}, // X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, clobbers: 16, // X5 }, @@ -80452,8 +80452,8 @@ var opcodeTable = [...]opInfo{ symEffect: SymWrite, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632896}, // X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632896}, // X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632768}, // X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632768}, // X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, clobbers: 48, // X5 X6 clobbersArg0: true, @@ -80466,10 +80466,10 @@ var opcodeTable = [...]opInfo{ faultOnNilArg0: true, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80479,10 +80479,10 @@ var opcodeTable = [...]opInfo{ faultOnNilArg0: true, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80492,10 +80492,10 @@ var opcodeTable = [...]opInfo{ faultOnNilArg0: true, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80506,8 +80506,8 @@ var opcodeTable = [...]opInfo{ hasSideEffects: true, reg: regInfo{ inputs: []inputInfo{ - {1, 1006632946}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {1, 1006632818}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, }, }, @@ -80518,8 +80518,8 @@ var opcodeTable = [...]opInfo{ hasSideEffects: true, reg: regInfo{ inputs: []inputInfo{ - {1, 1006632946}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {1, 1006632818}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, }, }, @@ -80530,8 +80530,8 @@ var opcodeTable = [...]opInfo{ hasSideEffects: true, reg: regInfo{ inputs: []inputInfo{ - {1, 1006632946}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {1, 1006632818}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, }, }, @@ -80543,11 +80543,11 @@ var opcodeTable = [...]opInfo{ hasSideEffects: true, reg: regInfo{ inputs: []inputInfo{ - {1, 1073741808}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 - {0, 9223372037928517618}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB + {1, 1073741680}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 + {0, 9223372037928517490}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80559,11 +80559,11 @@ var opcodeTable = [...]opInfo{ hasSideEffects: true, reg: regInfo{ inputs: []inputInfo{ - {1, 1073741808}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 - {0, 9223372037928517618}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB + {1, 1073741680}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 + {0, 9223372037928517490}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80575,11 +80575,11 @@ var opcodeTable = [...]opInfo{ hasSideEffects: true, reg: regInfo{ inputs: []inputInfo{ - {1, 1073741808}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 - {0, 9223372037928517618}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB + {1, 1073741680}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 + {0, 9223372037928517490}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80592,11 +80592,11 @@ var opcodeTable = [...]opInfo{ unsafePoint: true, reg: regInfo{ inputs: []inputInfo{ - {1, 1073741808}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 - {0, 9223372037928517618}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB + {1, 1073741680}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 + {0, 9223372037928517490}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80609,11 +80609,11 @@ var opcodeTable = [...]opInfo{ unsafePoint: true, reg: regInfo{ inputs: []inputInfo{ - {1, 1073741808}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 - {0, 9223372037928517618}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB + {1, 1073741680}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 + {0, 9223372037928517490}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80626,12 +80626,12 @@ var opcodeTable = [...]opInfo{ unsafePoint: true, reg: regInfo{ inputs: []inputInfo{ - {1, 1073741808}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 - {2, 1073741808}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 - {0, 9223372037928517618}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB + {1, 1073741680}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 + {2, 1073741680}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 + {0, 9223372037928517490}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80644,12 +80644,12 @@ var opcodeTable = [...]opInfo{ unsafePoint: true, reg: regInfo{ inputs: []inputInfo{ - {1, 1073741808}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 - {2, 1073741808}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 - {0, 9223372037928517618}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB + {1, 1073741680}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 + {2, 1073741680}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 + {0, 9223372037928517490}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80661,8 +80661,8 @@ var opcodeTable = [...]opInfo{ asm: riscv.AAMOANDB, reg: regInfo{ inputs: []inputInfo{ - {1, 1073741808}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 - {0, 9223372037928517618}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB + {1, 1073741680}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 + {0, 9223372037928517490}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB }, }, }, @@ -80674,8 +80674,8 @@ var opcodeTable = [...]opInfo{ asm: riscv.AAMOORB, reg: regInfo{ inputs: []inputInfo{ - {1, 1073741808}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 - {0, 9223372037928517618}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB + {1, 1073741680}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 + {0, 9223372037928517490}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB }, }, }, @@ -80687,8 +80687,8 @@ var opcodeTable = [...]opInfo{ asm: riscv.AAMOANDW, reg: regInfo{ inputs: []inputInfo{ - {1, 1073741808}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 - {0, 9223372037928517618}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB + {1, 1073741680}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 + {0, 9223372037928517490}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB }, }, }, @@ -80700,8 +80700,8 @@ var opcodeTable = [...]opInfo{ asm: riscv.AAMOORW, reg: regInfo{ inputs: []inputInfo{ - {1, 1073741808}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 - {0, 9223372037928517618}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB + {1, 1073741680}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 + {0, 9223372037928517490}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 g X28 X29 X30 SB }, }, }, @@ -80712,7 +80712,7 @@ var opcodeTable = [...]opInfo{ faultOnNilArg0: true, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632946}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632818}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80731,7 +80731,7 @@ var opcodeTable = [...]opInfo{ rematerializeable: true, reg: regInfo{ outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80741,7 +80741,7 @@ var opcodeTable = [...]opInfo{ rematerializeable: true, reg: regInfo{ outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80771,8 +80771,8 @@ var opcodeTable = [...]opInfo{ call: true, reg: regInfo{ inputs: []inputInfo{ - {0, 1048560}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 - {1, 1048560}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 + {0, 1048432}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 + {1, 1048432}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 }, }, }, @@ -80783,7 +80783,7 @@ var opcodeTable = [...]opInfo{ call: true, reg: regInfo{ inputs: []inputInfo{ - {0, 1048560}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 + {0, 1048432}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 }, }, }, @@ -80794,7 +80794,7 @@ var opcodeTable = [...]opInfo{ call: true, reg: regInfo{ inputs: []inputInfo{ - {0, 1048560}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 + {0, 1048432}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 }, }, }, @@ -80959,7 +80959,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AFMVSX, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 @@ -80975,7 +80975,7 @@ var opcodeTable = [...]opInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -80985,7 +80985,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AFCVTSW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 @@ -80998,7 +80998,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AFCVTSL, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 @@ -81014,7 +81014,7 @@ var opcodeTable = [...]opInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81027,7 +81027,7 @@ var opcodeTable = [...]opInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81040,7 +81040,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVF, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, outputs: []outputInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 @@ -81056,7 +81056,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVF, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, }, @@ -81072,7 +81072,7 @@ var opcodeTable = [...]opInfo{ {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81087,7 +81087,7 @@ var opcodeTable = [...]opInfo{ {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81101,7 +81101,7 @@ var opcodeTable = [...]opInfo{ {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81115,7 +81115,7 @@ var opcodeTable = [...]opInfo{ {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81332,7 +81332,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AFMVDX, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 @@ -81348,7 +81348,7 @@ var opcodeTable = [...]opInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81358,7 +81358,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AFCVTDW, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 @@ -81371,7 +81371,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AFCVTDL, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 @@ -81387,7 +81387,7 @@ var opcodeTable = [...]opInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81400,7 +81400,7 @@ var opcodeTable = [...]opInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81439,7 +81439,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVD, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, outputs: []outputInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 @@ -81455,7 +81455,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.AMOVD, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, }, @@ -81471,7 +81471,7 @@ var opcodeTable = [...]opInfo{ {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81486,7 +81486,7 @@ var opcodeTable = [...]opInfo{ {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81500,7 +81500,7 @@ var opcodeTable = [...]opInfo{ {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81514,7 +81514,7 @@ var opcodeTable = [...]opInfo{ {1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81559,7 +81559,7 @@ var opcodeTable = [...]opInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81572,7 +81572,7 @@ var opcodeTable = [...]opInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81582,11 +81582,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ABCLR, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81597,10 +81597,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ABCLRI, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81610,11 +81610,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ABEXT, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81625,10 +81625,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ABEXTI, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81638,11 +81638,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ABINV, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81653,10 +81653,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ABINVI, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81666,11 +81666,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ABSET, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81681,10 +81681,10 @@ var opcodeTable = [...]opInfo{ asm: riscv.ABSETI, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81694,11 +81694,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ACZEROEQZ, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81708,11 +81708,11 @@ var opcodeTable = [...]opInfo{ asm: riscv.ACZERONEZ, reg: regInfo{ inputs: []inputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 - {1, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {1, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, outputs: []outputInfo{ - {0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 + {0, 1006632816}, // X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 }, }, }, @@ -81723,7 +81723,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.APREFETCHR, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, }, }, @@ -81734,7 +81734,7 @@ var opcodeTable = [...]opInfo{ asm: riscv.APREFETCHR, reg: regInfo{ inputs: []inputInfo{ - {0, 9223372037861408754}, // SP X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB + {0, 9223372037861408626}, // SP X5 X6 X7 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30 SB }, }, }, @@ -96872,12 +96872,12 @@ var registersRISCV64 = [...]Register{ {62, riscv.REG_F31, "F31"}, {63, 0, "SB"}, } -var paramIntRegRISCV64 = []int8{9, 10, 11, 12, 13, 14, 15, 16, 7, 8, 17, 18, 19, 20, 21, 22} +var paramIntRegRISCV64 = []int8{9, 10, 11, 12, 13, 14, 15, 16, 8, 17, 18, 19, 20, 21, 22} var paramFloatRegRISCV64 = []int8{41, 42, 43, 44, 45, 46, 47, 48, 39, 40, 49, 50, 51, 52, 53, 54} -var gpRegMaskRISCV64 = regMask(1006632944) +var gpRegMaskRISCV64 = regMask(1006632816) var fpRegMaskRISCV64 = regMask(9223372034707292160) var specialRegMaskRISCV64 = regMask(0) -var framepointerRegRISCV64 = int8(-1) +var framepointerRegRISCV64 = int8(7) var linkRegRISCV64 = int8(0) var registersS390X = [...]Register{ {0, s390x.REG_R0, "R0"}, diff --git a/src/cmd/internal/obj/riscv/obj.go b/src/cmd/internal/obj/riscv/obj.go index c2ca97305b4033..dba6ba776178c5 100644 --- a/src/cmd/internal/obj/riscv/obj.go +++ b/src/cmd/internal/obj/riscv/obj.go @@ -544,14 +544,14 @@ func setPCs(p *obj.Prog, pc int64, compress bool) int64 { // // A nicer version of this diagram can be found on slide 21 of the presentation // attached to https://golang.org/issue/16922#issuecomment-243748180. -func stackOffset(a *obj.Addr, stacksize int64) { +func stackOffset(a *obj.Addr, stacksize int64, framesize int64) { switch a.Name { case obj.NAME_AUTO: // Adjust to the top of AUTOs. a.Offset += stacksize case obj.NAME_PARAM: // Adjust to the bottom of PARAMs. - a.Offset += stacksize + 8 + a.Offset += framesize + 8 } } @@ -603,18 +603,30 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { stacksize += ctxt.Arch.FixedFrameSize } + // If the function has a frame, build an frame record. + // + // After the frame is created, FP points to 8(SP), SP points to the saved + // return address (RA/LR) at 0(SP), and the saved frame pointer (caller S0) + // is placed just below it at -PtrSize(SP). + useFP := buildcfg.FramePointerEnabled && stacksize != 0 + framesize := stacksize + if useFP { + framesize += int64(ctxt.Arch.PtrSize) + } cursym.Func().Args = text.To.Val.(int32) cursym.Func().Locals = int32(stacksize) prologue := text if !cursym.Func().Text.From.Sym.NoSplit() { - prologue = stacksplit(ctxt, prologue, cursym, newprog, stacksize) // emit split check + prologue = stacksplit(ctxt, prologue, cursym, newprog, framesize) // emit split check } q := prologue if stacksize != 0 { + var prologueEnd *obj.Prog + prologue = ctxt.StartUnsafePoint(prologue, newprog) // Actually save LR. @@ -622,35 +634,62 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { prologue.As = AMOV prologue.Pos = q.Pos prologue.From = obj.Addr{Type: obj.TYPE_REG, Reg: REG_LR} - prologue.To = obj.Addr{Type: obj.TYPE_MEM, Reg: REG_SP, Offset: -stacksize} + prologue.To = obj.Addr{Type: obj.TYPE_MEM, Reg: REG_SP, Offset: -framesize} + + if useFP { + // Save caller's frame pointer (S0) in the caller frame slot, + // one word below the stack pointer. + prologue = obj.Appendp(prologue, newprog) + prologue.As = AMOV + prologue.Pos = q.Pos + prologue.From = obj.Addr{Type: obj.TYPE_REG, Reg: REG_S0} + prologue.To = obj.Addr{Type: obj.TYPE_MEM, Reg: REG_SP, Offset: -framesize - int64(ctxt.Arch.PtrSize)} + } // Insert stack adjustment. prologue = obj.Appendp(prologue, newprog) prologue.As = AADDI prologue.Pos = q.Pos - prologue.Pos = prologue.Pos.WithXlogue(src.PosPrologueEnd) - prologue.From = obj.Addr{Type: obj.TYPE_CONST, Offset: -stacksize} + prologue.From = obj.Addr{Type: obj.TYPE_CONST, Offset: -framesize} prologue.Reg = REG_SP prologue.To = obj.Addr{Type: obj.TYPE_REG, Reg: REG_SP} - prologue.Spadj = int32(stacksize) - - prologue = ctxt.EndUnsafePoint(prologue, newprog, -1) + prologue.Spadj = int32(framesize) // On Linux, in a cgo binary we may get a SIGSETXID signal early on // before the signal stack is set, as glibc doesn't allow us to block // SIGSETXID. So a signal may land on the current stack and clobber - // the content below the SP. We store the LR again after the SP is - // decremented. + // the content below the SP. Store the LR and FP again after the SP + // is decremented. prologue = obj.Appendp(prologue, newprog) prologue.As = AMOV prologue.From = obj.Addr{Type: obj.TYPE_REG, Reg: REG_LR} prologue.To = obj.Addr{Type: obj.TYPE_MEM, Reg: REG_SP, Offset: 0} + prologueEnd = prologue + + if useFP { + prologue = obj.Appendp(prologue, newprog) + prologue.As = AMOV + prologue.From = obj.Addr{Type: obj.TYPE_REG, Reg: REG_S0} + prologue.To = obj.Addr{Type: obj.TYPE_MEM, Reg: REG_SP, Offset: -int64(ctxt.Arch.PtrSize)} + + prologue = obj.Appendp(prologue, newprog) + prologue.As = AADDI + prologue.Pos = q.Pos + prologue.From = obj.Addr{Type: obj.TYPE_CONST, Offset: int64(ctxt.Arch.PtrSize)} + prologue.Reg = REG_SP + prologue.To = obj.Addr{Type: obj.TYPE_REG, Reg: REG_S0} + prologueEnd = prologue + } + + // End the async-unsafe region only once the frame record is complete. + ctxt.EndUnsafePoint(prologueEnd, newprog, -1) + prologueEnd.Pos = prologueEnd.Pos.WithXlogue(src.PosPrologueEnd) } // Update stack-based offsets. for p := cursym.Func().Text; p != nil; p = p.Link { - stackOffset(&p.From, stacksize) - stackOffset(&p.To, stacksize) + stackOffset(&p.From, stacksize, framesize) + stackOffset(&p.To, stacksize, framesize) } // Additional instruction rewriting. @@ -689,6 +728,14 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { retJMP := p.To.Sym if stacksize != 0 { + if useFP { + // Restore S0. + p.As = AMOV + p.From = obj.Addr{Type: obj.TYPE_MEM, Reg: REG_SP, Offset: -int64(ctxt.Arch.PtrSize)} + p.To = obj.Addr{Type: obj.TYPE_REG, Reg: REG_S0} + p = obj.Appendp(p, newprog) + } + // Restore LR. p.As = AMOV p.From = obj.Addr{Type: obj.TYPE_MEM, Reg: REG_SP, Offset: 0} @@ -696,10 +743,10 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { p = obj.Appendp(p, newprog) p.As = AADDI - p.From = obj.Addr{Type: obj.TYPE_CONST, Offset: stacksize} + p.From = obj.Addr{Type: obj.TYPE_CONST, Offset: framesize} p.Reg = REG_SP p.To = obj.Addr{Type: obj.TYPE_REG, Reg: REG_SP} - p.Spadj = int32(-stacksize) + p.Spadj = int32(-framesize) p = obj.Appendp(p, newprog) } @@ -720,7 +767,7 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) { // Spadj from function entry to each PC, and shouldn't // count adjustments from earlier epilogues, since they // won't affect later PCs. - p.Spadj = int32(stacksize) + p.Spadj = int32(framesize) case AADDI: // Refine Spadjs account for adjustment via ADDI instruction. @@ -908,26 +955,37 @@ func stacksplit(ctxt *obj.Link, p *obj.Prog, cursym *obj.LSym, newprog obj.ProgA } if ctxt.Flag_maymorestack != "" { - // Save LR and REGCTXT - const frameSize = 16 + // Save LR FP and REGCTXT + const frameSize = 32 p = ctxt.StartUnsafePoint(p, newprog) // Spill Arguments. This has to happen before we open // any more frame space. p = cursym.Func().SpillRegisterArgs(p, newprog) - // MOV LR, -16(SP) + // MOV LR, -32(SP) p = obj.Appendp(p, newprog) p.As = AMOV p.From = obj.Addr{Type: obj.TYPE_REG, Reg: REG_LR} p.To = obj.Addr{Type: obj.TYPE_MEM, Reg: REG_SP, Offset: -frameSize} - // ADDI $-16, SP + // ADDI $-32, SP p = obj.Appendp(p, newprog) p.As = AADDI p.From = obj.Addr{Type: obj.TYPE_CONST, Offset: -frameSize} p.Reg = REG_SP p.To = obj.Addr{Type: obj.TYPE_REG, Reg: REG_SP} p.Spadj = frameSize + // MOV S0, -8(SP) + p = obj.Appendp(p, newprog) + p.As = AMOV + p.From = obj.Addr{Type: obj.TYPE_REG, Reg: REG_S0} + p.To = obj.Addr{Type: obj.TYPE_MEM, Reg: REG_SP, Offset: -int64(ctxt.Arch.PtrSize)} + // ADDI $8, SP, S0 + p = obj.Appendp(p, newprog) + p.As = AADDI + p.From = obj.Addr{Type: obj.TYPE_CONST, Offset: int64(ctxt.Arch.PtrSize)} + p.Reg = REG_SP + p.To = obj.Addr{Type: obj.TYPE_REG, Reg: REG_S0} // MOV REGCTXT, 8(SP) p = obj.Appendp(p, newprog) p.As = AMOV @@ -942,19 +1000,24 @@ func stacksplit(ctxt *obj.Link, p *obj.Prog, cursym *obj.LSym, newprog obj.ProgA p.To.Sym = ctxt.LookupABI(ctxt.Flag_maymorestack, cursym.ABI()) jalToSym(ctxt, p, REG_X5) - // Restore LR and REGCTXT + // Restore LR FP and REGCTXT // MOV 8(SP), REGCTXT p = obj.Appendp(p, newprog) p.As = AMOV p.From = obj.Addr{Type: obj.TYPE_MEM, Reg: REG_SP, Offset: 8} p.To = obj.Addr{Type: obj.TYPE_REG, Reg: REG_CTXT} + // MOV -8(SP), S0 + p = obj.Appendp(p, newprog) + p.As = AMOV + p.From = obj.Addr{Type: obj.TYPE_MEM, Reg: REG_SP, Offset: -int64(ctxt.Arch.PtrSize)} + p.To = obj.Addr{Type: obj.TYPE_REG, Reg: REG_S0} // MOV (SP), LR p = obj.Appendp(p, newprog) p.As = AMOV p.From = obj.Addr{Type: obj.TYPE_MEM, Reg: REG_SP, Offset: 0} p.To = obj.Addr{Type: obj.TYPE_REG, Reg: REG_LR} - // ADDI $16, SP + // ADDI $32, SP p = obj.Appendp(p, newprog) p.As = AADDI p.From = obj.Addr{Type: obj.TYPE_CONST, Offset: frameSize} diff --git a/src/crypto/internal/fips140/bigmod/nat_riscv64.s b/src/crypto/internal/fips140/bigmod/nat_riscv64.s index c1d9cc0dd488ac..66780d4f729147 100644 --- a/src/crypto/internal/fips140/bigmod/nat_riscv64.s +++ b/src/crypto/internal/fips140/bigmod/nat_riscv64.s @@ -34,15 +34,15 @@ loop: MOV 2*8(X5), X16 // z[2] MOV 3*8(X5), X19 // z[3] - MOV 0*8(X7), X8 // x[0] + MOV 0*8(X7), X20 // x[0] MOV 1*8(X7), X11 // x[1] MOV 2*8(X7), X14 // x[2] MOV 3*8(X7), X17 // x[3] - MULHU X8, X6, X9 // z_hi[0] = x[0] * y - MUL X8, X6, X8 // z_lo[0] = x[0] * y - ADD X8, X10, X21 // z_lo[0] = x[0] * y + z[0] - SLTU X8, X21, X22 + MULHU X20, X6, X9 // z_hi[0] = x[0] * y + MUL X20, X6, X20 // z_lo[0] = x[0] * y + ADD X20, X10, X21 // z_lo[0] = x[0] * y + z[0] + SLTU X20, X21, X22 ADD X9, X22, X9 // z_hi[0] = x[0] * y + z[0] ADD X21, X29, X10 // z_lo[0] = x[0] * y + z[0] + c SLTU X21, X10, X22 diff --git a/src/crypto/internal/fips140/sha256/sha256block_riscv64.s b/src/crypto/internal/fips140/sha256/sha256block_riscv64.s index 42c3bd3a751da6..f9c0d0a66538c7 100644 --- a/src/crypto/internal/fips140/sha256/sha256block_riscv64.s +++ b/src/crypto/internal/fips140/sha256/sha256block_riscv64.s @@ -53,13 +53,13 @@ MOVBU ((index*4)+0)(X29), X5; \ MOVBU ((index*4)+1)(X29), X6; \ MOVBU ((index*4)+2)(X29), X7; \ - MOVBU ((index*4)+3)(X29), X8; \ + MOVBU ((index*4)+3)(X29), X22; \ SLL $24, X5; \ SLL $16, X6; \ OR X5, X6, X5; \ SLL $8, X7; \ OR X5, X7, X5; \ - OR X5, X8, X5; \ + OR X5, X22, X5; \ MOVW X5, (index*4)(X19) // Wt = SIGMA1(Wt-2) + Wt-7 + SIGMA0(Wt-15) + Wt-16; for 16 <= t <= 63 @@ -71,16 +71,16 @@ MOVWU (((index-7)&0xf)*4)(X19), X9; \ MOVWU (((index-16)&0xf)*4)(X19), X21; \ RORW $17, X5, X7; \ - RORW $19, X5, X8; \ + RORW $19, X5, X22; \ SRL $10, X5; \ XOR X7, X5; \ - XOR X8, X5; \ + XOR X22, X5; \ ADD X9, X5; \ RORW $7, X6, X7; \ - RORW $18, X6, X8; \ + RORW $18, X6, X22; \ SRL $3, X6; \ XOR X7, X6; \ - XOR X8, X6; \ + XOR X22, X6; \ ADD X6, X5; \ ADD X21, X5; \ MOVW X5, ((index&0xf)*4)(X19) @@ -92,15 +92,15 @@ // Ch(x, y, z) = (x AND y) XOR (NOT x AND z) // = ((y XOR z) AND x) XOR z #define SHA256T1(index, e, f, g, h) \ - MOVWU (index*4)(X18), X8; \ + MOVWU (index*4)(X18), X22; \ ADD X5, h; \ RORW $6, e, X6; \ - ADD X8, h; \ + ADD X22, h; \ RORW $11, e, X7; \ - RORW $25, e, X8; \ + RORW $25, e, X22; \ XOR X7, X6; \ XOR f, g, X5; \ - XOR X8, X6; \ + XOR X22, X6; \ AND e, X5; \ ADD X6, h; \ XOR g, X5; \ @@ -114,12 +114,12 @@ #define SHA256T2(a, b, c) \ RORW $2, a, X6; \ RORW $13, a, X7; \ - RORW $22, a, X8; \ + RORW $22, a, X22; \ XOR X7, X6; \ XOR b, c, X9; \ AND b, c, X7; \ AND a, X9; \ - XOR X8, X6; \ + XOR X22, X6; \ XOR X7, X9; \ ADD X9, X6 @@ -235,11 +235,11 @@ loop: MOVWU (0*4)(X20), X5 MOVWU (1*4)(X20), X6 MOVWU (2*4)(X20), X7 - MOVWU (3*4)(X20), X8 + MOVWU (3*4)(X20), X22 ADD X5, X10 // H0 = a + H0 ADD X6, X11 // H1 = b + H1 ADD X7, X12 // H2 = c + H2 - ADD X8, X13 // H3 = d + H3 + ADD X22, X13 // H3 = d + H3 MOVW X10, (0*4)(X20) MOVW X11, (1*4)(X20) MOVW X12, (2*4)(X20) @@ -247,11 +247,11 @@ loop: MOVWU (4*4)(X20), X5 MOVWU (5*4)(X20), X6 MOVWU (6*4)(X20), X7 - MOVWU (7*4)(X20), X8 + MOVWU (7*4)(X20), X22 ADD X5, X14 // H4 = e + H4 ADD X6, X15 // H5 = f + H5 ADD X7, X16 // H6 = g + H6 - ADD X8, X17 // H7 = h + H7 + ADD X22, X17 // H7 = h + H7 MOVW X14, (4*4)(X20) MOVW X15, (5*4)(X20) MOVW X16, (6*4)(X20) diff --git a/src/crypto/internal/fips140/sha512/sha512block_riscv64.s b/src/crypto/internal/fips140/sha512/sha512block_riscv64.s index f25ed62237bd0c..9d665cc56ce41d 100644 --- a/src/crypto/internal/fips140/sha512/sha512block_riscv64.s +++ b/src/crypto/internal/fips140/sha512/sha512block_riscv64.s @@ -51,25 +51,25 @@ MOVBU ((index*8)+0)(X29), X5; \ MOVBU ((index*8)+1)(X29), X6; \ MOVBU ((index*8)+2)(X29), X7; \ - MOVBU ((index*8)+3)(X29), X8; \ + MOVBU ((index*8)+3)(X29), X22; \ SLL $56, X5; \ SLL $48, X6; \ OR X5, X6, X5; \ SLL $40, X7; \ OR X5, X7, X5; \ - SLL $32, X8; \ - OR X5, X8, X5; \ + SLL $32, X22; \ + OR X5, X22, X5; \ MOVBU ((index*8)+4)(X29), X9; \ MOVBU ((index*8)+5)(X29), X6; \ MOVBU ((index*8)+6)(X29), X7; \ - MOVBU ((index*8)+7)(X29), X8; \ + MOVBU ((index*8)+7)(X29), X22; \ SLL $24, X9; \ OR X5, X9, X5; \ SLL $16, X6; \ OR X5, X6, X5; \ SLL $8, X7; \ OR X5, X7, X5; \ - OR X5, X8, X5; \ + OR X5, X22, X5; \ MOV X5, (index*8)(X19) // Wt = SIGMA1(Wt-2) + Wt-7 + SIGMA0(Wt-15) + Wt-16; for 16 <= t <= 79 @@ -81,16 +81,16 @@ MOV (((index-7)&0xf)*8)(X19), X9; \ MOV (((index-16)&0xf)*8)(X19), X21; \ ROR $19, X5, X7; \ - ROR $61, X5, X8; \ + ROR $61, X5, X22; \ SRL $6, X5; \ XOR X7, X5; \ - XOR X8, X5; \ + XOR X22, X5; \ ADD X9, X5; \ ROR $1, X6, X7; \ - ROR $8, X6, X8; \ + ROR $8, X6, X22; \ SRL $7, X6; \ XOR X7, X6; \ - XOR X8, X6; \ + XOR X22, X6; \ ADD X6, X5; \ ADD X21, X5; \ MOV X5, ((index&0xf)*8)(X19) @@ -102,15 +102,15 @@ // Ch(x, y, z) = (x AND y) XOR (NOT x AND z) // = ((y XOR z) AND x) XOR z #define SHA512T1(index, e, f, g, h) \ - MOV (index*8)(X18), X8; \ + MOV (index*8)(X18), X22; \ ADD X5, h; \ ROR $14, e, X6; \ - ADD X8, h; \ + ADD X22, h; \ ROR $18, e, X7; \ - ROR $41, e, X8; \ + ROR $41, e, X22; \ XOR X7, X6; \ XOR f, g, X5; \ - XOR X8, X6; \ + XOR X22, X6; \ AND e, X5; \ ADD X6, h; \ XOR g, X5; \ @@ -124,12 +124,12 @@ #define SHA512T2(a, b, c) \ ROR $28, a, X6; \ ROR $34, a, X7; \ - ROR $39, a, X8; \ + ROR $39, a, X22; \ XOR X7, X6; \ XOR b, c, X9; \ AND b, c, X7; \ AND a, X9; \ - XOR X8, X6; \ + XOR X22, X6; \ XOR X7, X9; \ ADD X9, X6 @@ -258,11 +258,11 @@ loop: MOV (0*8)(X20), X5 MOV (1*8)(X20), X6 MOV (2*8)(X20), X7 - MOV (3*8)(X20), X8 + MOV (3*8)(X20), X22 ADD X5, X10 // H0 = a + H0 ADD X6, X11 // H1 = b + H1 ADD X7, X12 // H2 = c + H2 - ADD X8, X13 // H3 = d + H3 + ADD X22, X13 // H3 = d + H3 MOV X10, (0*8)(X20) MOV X11, (1*8)(X20) MOV X12, (2*8)(X20) @@ -270,11 +270,11 @@ loop: MOV (4*8)(X20), X5 MOV (5*8)(X20), X6 MOV (6*8)(X20), X7 - MOV (7*8)(X20), X8 + MOV (7*8)(X20), X22 ADD X5, X14 // H4 = e + H4 ADD X6, X15 // H5 = f + H5 ADD X7, X16 // H6 = g + H6 - ADD X8, X17 // H7 = h + H7 + ADD X22, X17 // H7 = h + H7 MOV X14, (4*8)(X20) MOV X15, (5*8)(X20) MOV X16, (6*8)(X20) diff --git a/src/crypto/internal/fips140/subtle/xor_riscv64.s b/src/crypto/internal/fips140/subtle/xor_riscv64.s index b5fa5dcef45e82..b68fe22ea760a4 100644 --- a/src/crypto/internal/fips140/subtle/xor_riscv64.s +++ b/src/crypto/internal/fips140/subtle/xor_riscv64.s @@ -25,9 +25,9 @@ TEXT ·xorBytes(SB), NOSPLIT|NOFRAME, $0 BEQZ X5, loop64_check // Check one byte at a time until we reach 8 byte alignment. - MOV $8, X8 - SUB X5, X8 - SUB X8, X13 + MOV $8, X9 + SUB X5, X9 + SUB X9, X13 align: MOVBU 0(X11), X16 MOVBU 0(X12), X17 @@ -36,8 +36,8 @@ align: ADD $1, X10 ADD $1, X11 ADD $1, X12 - SUB $1, X8 - BNEZ X8, align + SUB $1, X9 + BNEZ X9, align loop64_check: MOV $64, X15 diff --git a/src/crypto/md5/md5block_riscv64.s b/src/crypto/md5/md5block_riscv64.s index 017c70b9369516..efd0730f88c488 100644 --- a/src/crypto/md5/md5block_riscv64.s +++ b/src/crypto/md5/md5block_riscv64.s @@ -162,7 +162,7 @@ loop: LOAD64U(X29,0, X17, X18, X5) LOAD64U(X29,8, X17, X18, X6) LOAD64U(X29,16, X17, X18, X7) - LOAD64U(X29,24, X17, X18, X8) + LOAD64U(X29,24, X17, X18, X21) LOAD64U(X29,32, X17, X18, X9) LOAD64U(X29,40, X17, X18, X10) LOAD64U(X29,48, X17, X18, X11) @@ -173,7 +173,7 @@ aligned: MOV (0*8)(X29), X5 MOV (1*8)(X29), X6 MOV (2*8)(X29), X7 - MOV (3*8)(X29), X8 + MOV (3*8)(X29), X21 MOV (4*8)(X29), X9 MOV (5*8)(X29), X10 MOV (6*8)(X29), X11 @@ -200,8 +200,8 @@ block_loaded: ROUND1ODD(X14,X15,X16,X13,X6, -1044525330,22); // 0xc1bdceee ROUND1EVN(X13,X14,X15,X16,X7, -176418897, 7); // 0xf57c0faf ROUND1ODD(X16,X13,X14,X15,X7, 0x4787c62a,12); // 0x4787c62a - ROUND1EVN(X15,X16,X13,X14,X8, -1473231341,17); // 0xa8304613 - ROUND1ODD(X14,X15,X16,X13,X8, -45705983,22); // 0xfd469501 + ROUND1EVN(X15,X16,X13,X14,X21, -1473231341,17); // 0xa8304613 + ROUND1ODD(X14,X15,X16,X13,X21, -45705983,22); // 0xfd469501 ROUND1EVN(X13,X14,X15,X16,X9, 0x698098d8, 7); // 0x698098d8 ROUND1ODD(X16,X13,X14,X15,X9, -1958414417,12); // 0x8b44f7af ROUND1EVN(X15,X16,X13,X14,X10, -42063,17); // 0xffff5bb1 @@ -212,7 +212,7 @@ block_loaded: ROUND1ODD(X14,X15,X16,X13,X12, 0x49b40821,22); // 0x49b40821 ROUND2ODD(X13,X14,X15,X16,X5, -165796510, 5); // f61e2562 - ROUND2EVN(X16,X13,X14,X15,X8, -1069501632, 9); // c040b340 + ROUND2EVN(X16,X13,X14,X15,X21, -1069501632, 9); // c040b340 ROUND2ODD(X15,X16,X13,X14,X10, 0x265e5a51,14); // 265e5a51 ROUND2EVN(X14,X15,X16,X13,X5, -373897302,20); // e9b6c7aa ROUND2ODD(X13,X14,X15,X16,X7, -701558691, 5); // d62f105d @@ -225,7 +225,7 @@ block_loaded: ROUND2EVN(X14,X15,X16,X13,X9, 0x455a14ed,20); // 455a14ed ROUND2ODD(X13,X14,X15,X16,X11,-1444681467, 5); // a9e3e905 ROUND2EVN(X16,X13,X14,X15,X6, -51403784, 9); // fcefa3f8 - ROUND2ODD(X15,X16,X13,X14,X8, 0x676f02d9,14); // 676f02d9 + ROUND2ODD(X15,X16,X13,X14,X21, 0x676f02d9,14); // 676f02d9 ROUND2EVN(X14,X15,X16,X13,X11,-1926607734,20); // 8d2a4c8a ROUND3ODD(X13,X14,X15,X16,X7, -378558, 4); // fffa3942 @@ -234,19 +234,19 @@ block_loaded: ROUND3EVN(X14,X15,X16,X13,X12, -35309556,23); // fde5380c ROUND3ODD(X13,X14,X15,X16,X5, -1530992060, 4); // a4beea44 ROUND3EVN(X16,X13,X14,X15,X7, 0x4bdecfa9,11); // 4bdecfa9 - ROUND3ODD(X15,X16,X13,X14,X8, -155497632,16); // f6bb4b60 + ROUND3ODD(X15,X16,X13,X14,X21, -155497632,16); // f6bb4b60 ROUND3EVN(X14,X15,X16,X13,X10,-1094730640,23); // bebfbc70 ROUND3ODD(X13,X14,X15,X16,X11, 0x289b7ec6, 4); // 289b7ec6 ROUND3EVN(X16,X13,X14,X15,X5, -358537222,11); // eaa127fa ROUND3ODD(X15,X16,X13,X14,X6, -722521979,16); // d4ef3085 - ROUND3EVN(X14,X15,X16,X13,X8, 0x4881d05,23); // 4881d05 + ROUND3EVN(X14,X15,X16,X13,X21, 0x4881d05,23); // 4881d05 ROUND3ODD(X13,X14,X15,X16,X9, -640364487, 4); // d9d4d039 ROUND3EVN(X16,X13,X14,X15,X11, -421815835,11); // e6db99e5 ROUND3ODD(X15,X16,X13,X14,X12, 0x1fa27cf8,16); // 1fa27cf8 ROUND3EVN(X14,X15,X16,X13,X6, -995338651,23); // c4ac5665 ROUND4EVN(X13,X14,X15,X16,X5, -198630844, 6); // f4292244 - ROUND4ODD(X16,X13,X14,X15,X8, 0x432aff97,10); // 432aff97 + ROUND4ODD(X16,X13,X14,X15,X21, 0x432aff97,10); // 432aff97 ROUND4EVN(X15,X16,X13,X14,X12,-1416354905,15); // ab9423a7 ROUND4ODD(X14,X15,X16,X13,X7, -57434055,21); // fc93a039 ROUND4EVN(X13,X14,X15,X16,X11, 0x655b59c3, 6); // 655b59c3 @@ -255,7 +255,7 @@ block_loaded: ROUND4ODD(X14,X15,X16,X13,X5, -2054922799,21); // 85845dd1 ROUND4EVN(X13,X14,X15,X16,X9, 0x6fa87e4f, 6); // 6fa87e4f ROUND4ODD(X16,X13,X14,X15,X12, -30611744,10); // fe2ce6e0 - ROUND4EVN(X15,X16,X13,X14,X8, -1560198380,15); // a3014314 + ROUND4EVN(X15,X16,X13,X14,X21, -1560198380,15); // a3014314 ROUND4ODD(X14,X15,X16,X13,X11, 0x4e0811a1,21); // 4e0811a1 ROUND4EVN(X13,X14,X15,X16,X7, -145523070, 6); // f7537e82 ROUND4ODD(X16,X13,X14,X15,X10,-1120210379,10); // bd3af235 diff --git a/src/crypto/sha1/sha1block_riscv64.s b/src/crypto/sha1/sha1block_riscv64.s index 08496940084c6b..d41b452ff5a309 100644 --- a/src/crypto/sha1/sha1block_riscv64.s +++ b/src/crypto/sha1/sha1block_riscv64.s @@ -10,23 +10,23 @@ MOVBU ((index*4)+0)(X29), X5; \ MOVBU ((index*4)+1)(X29), X6; \ MOVBU ((index*4)+2)(X29), X7; \ - MOVBU ((index*4)+3)(X29), X8; \ + MOVBU ((index*4)+3)(X29), X9; \ SLL $24, X5; \ SLL $16, X6; \ OR X5, X6, X5; \ SLL $8, X7; \ OR X5, X7, X5; \ - OR X5, X8, X5; \ + OR X5, X9, X5; \ MOVW X5, (index*4)(X19) #define SHUFFLE(index) \ MOVWU (((index)&0xf)*4)(X19), X5; \ MOVWU (((index-3)&0xf)*4)(X19), X6; \ MOVWU (((index-8)&0xf)*4)(X19), X7; \ - MOVWU (((index-14)&0xf)*4)(X19), X8; \ + MOVWU (((index-14)&0xf)*4)(X19), X9; \ XOR X6, X5; \ XOR X7, X5; \ - XOR X8, X5; \ + XOR X9, X5; \ RORW $31, X5; \ MOVW X5, (((index)&0xf)*4)(X19) @@ -43,20 +43,20 @@ // f = (b & c) | ((b | c) & d) #define FUNC3(a, b, c, d, e) \ - OR b, c, X8; \ + OR b, c, X9; \ AND b, c, X6; \ - AND d, X8; \ - OR X6, X8, X7 + AND d, X9; \ + OR X6, X9, X7 #define FUNC4 FUNC2 #define MIX(a, b, c, d, e, key) \ RORW $2, b; \ ADD X7, e; \ - RORW $27, a, X8; \ + RORW $27, a, X9; \ ADD X5, e; \ ADD key, e; \ - ADD X8, e + ADD X9, e #define ROUND1(a, b, c, d, e, index) \ LOAD(index); \ diff --git a/src/internal/abi/abi_riscv64.go b/src/internal/abi/abi_riscv64.go index 2bcd9d6db21bd7..b0b02d72ea6b3a 100644 --- a/src/internal/abi/abi_riscv64.go +++ b/src/internal/abi/abi_riscv64.go @@ -7,8 +7,8 @@ package abi const ( // See abi_generic.go. - // X8 - X23 - IntArgRegs = 16 + // X10 - X17, X9, X18 - X23. + IntArgRegs = 15 // F8 - F23. FloatArgRegs = 16 diff --git a/src/internal/buildcfg/exp.go b/src/internal/buildcfg/exp.go index aa41986e8e9387..b37f509210f22c 100644 --- a/src/internal/buildcfg/exp.go +++ b/src/internal/buildcfg/exp.go @@ -48,7 +48,7 @@ const DefaultGOEXPERIMENT = defaultGOEXPERIMENT // platforms that support it. // // Note: must agree with runtime.framepointer_enabled. -var FramePointerEnabled = GOARCH == "amd64" || GOARCH == "arm64" +var FramePointerEnabled = GOARCH == "amd64" || GOARCH == "arm64" || GOARCH == "riscv64" // ParseGOEXPERIMENT parses a (GOOS, GOARCH, GOEXPERIMENT) // configuration tuple and returns the enabled and baseline experiment diff --git a/src/internal/bytealg/compare_riscv64.s b/src/internal/bytealg/compare_riscv64.s index 3b1523dfbf7f3b..2a02ca232ec017 100644 --- a/src/internal/bytealg/compare_riscv64.s +++ b/src/internal/bytealg/compare_riscv64.s @@ -68,10 +68,10 @@ vector_loop: JMP cmp_len vector_not_eq: - // Load first differing bytes in X8/X9. + // Load first differing bytes in X14/X9. ADD X7, X10 ADD X7, X12 - MOVBU (X10), X8 + MOVBU (X10), X14 MOVBU (X12), X9 JMP cmp @@ -81,8 +81,8 @@ compare_scalar: // Check alignment - if alignment differs we have to do one byte at a time. AND $7, X10, X7 - AND $7, X12, X8 - BNE X7, X8, check8_unaligned + AND $7, X12, X14 + BNE X7, X14, check8_unaligned BEQZ X7, compare32 // Check one byte at a time until we reach 8 byte alignment. @@ -91,9 +91,9 @@ compare_scalar: SUB X7, X5, X5 align: SUB $1, X7 - MOVBU 0(X10), X8 + MOVBU 0(X10), X14 MOVBU 0(X12), X9 - BNE X8, X9, cmp + BNE X14, X9, cmp ADD $1, X10 ADD $1, X12 BNEZ X7, align @@ -139,7 +139,7 @@ check8_unaligned: MOV $8, X6 BLT X5, X6, check4_unaligned compare8_unaligned: - MOVBU 0(X10), X8 + MOVBU 0(X10), X14 MOVBU 1(X10), X15 MOVBU 2(X10), X17 MOVBU 3(X10), X19 @@ -155,7 +155,7 @@ compare8_unaligned: MOVBU 5(X12), X24 MOVBU 6(X12), X28 MOVBU 7(X12), X30 - BNE X8, X9, cmp1a + BNE X14, X9, cmp1a BNE X15, X16, cmp1b BNE X17, X18, cmp1c BNE X19, X20, cmp1d @@ -173,7 +173,7 @@ check4_unaligned: MOV $4, X6 BLT X5, X6, compare1 compare4_unaligned: - MOVBU 0(X10), X8 + MOVBU 0(X10), X14 MOVBU 1(X10), X15 MOVBU 2(X10), X17 MOVBU 3(X10), X19 @@ -181,7 +181,7 @@ compare4_unaligned: MOVBU 1(X12), X16 MOVBU 2(X12), X18 MOVBU 3(X12), X20 - BNE X8, X9, cmp1a + BNE X14, X9, cmp1a BNE X15, X16, cmp1b BNE X17, X18, cmp1c BNE X19, X20, cmp1d @@ -192,9 +192,9 @@ compare4_unaligned: compare1: BEQZ X5, cmp_len - MOVBU 0(X10), X8 + MOVBU 0(X10), X14 MOVBU 0(X12), X9 - BNE X8, X9, cmp + BNE X14, X9, cmp ADD $1, X10 ADD $1, X12 SUB $1, X5 @@ -209,15 +209,15 @@ cmp8a: cmp8b: MOV $0xff, X19 cmp8_loop: - AND X17, X19, X8 + AND X17, X19, X14 AND X18, X19, X9 - BNE X8, X9, cmp + BNE X14, X9, cmp SLLI $8, X19 JMP cmp8_loop cmp1a: - SLTU X9, X8, X5 - SLTU X8, X9, X6 + SLTU X9, X14, X5 + SLTU X14, X9, X6 JMP cmp_ret cmp1b: SLTU X16, X15, X5 @@ -249,11 +249,11 @@ cmp1h: JMP cmp_ret cmp_len: - MOV X11, X8 + MOV X11, X14 MOV X13, X9 cmp: - SLTU X9, X8, X5 - SLTU X8, X9, X6 + SLTU X9, X14, X5 + SLTU X14, X9, X6 cmp_ret: SUB X5, X6, X10 RET diff --git a/src/math/big/arith_riscv64.s b/src/math/big/arith_riscv64.s index 8817b1c8265d33..9289f9a4a37af2 100644 --- a/src/math/big/arith_riscv64.s +++ b/src/math/big/arith_riscv64.s @@ -13,46 +13,41 @@ TEXT ·addVV(SB), NOSPLIT, $0 MOV z_len+8(FP), X5 MOV x_base+24(FP), X6 MOV y_base+48(FP), X7 - MOV z_base+0(FP), X8 + MOV z_base+0(FP), X9 // compute unrolled loop lengths - AND $3, X5, X9 + AND $3, X5, X10 SRL $2, X5 XOR X28, X28 // clear carry loop1: - BEQZ X9, loop1done + BEQZ X10, loop1done loop1cont: // unroll 1X - MOV 0(X6), X10 - MOV 0(X7), X11 - ADD X11, X10 // ADCS X11, X10, X10 (cr=X28) - SLTU X11, X10, X31 // ... - ADD X28, X10 // ... - SLTU X28, X10, X28 // ... + MOV 0(X6), X11 + MOV 0(X7), X12 + ADD X12, X11 // ADCS X12, X11, X11 (cr=X28) + SLTU X12, X11, X31 // ... + ADD X28, X11 // ... + SLTU X28, X11, X28 // ... ADD X31, X28 // ... - MOV X10, 0(X8) + MOV X11, 0(X9) ADD $8, X6 ADD $8, X7 - ADD $8, X8 - SUB $1, X9 - BNEZ X9, loop1cont + ADD $8, X9 + SUB $1, X10 + BNEZ X10, loop1cont loop1done: loop4: BEQZ X5, loop4done loop4cont: // unroll 4X - MOV 0(X6), X9 - MOV 8(X6), X10 - MOV 16(X6), X11 - MOV 24(X6), X12 - MOV 0(X7), X13 - MOV 8(X7), X14 - MOV 16(X7), X15 - MOV 24(X7), X16 - ADD X13, X9 // ADCS X13, X9, X9 (cr=X28) - SLTU X13, X9, X31 // ... - ADD X28, X9 // ... - SLTU X28, X9, X28 // ... - ADD X31, X28 // ... + MOV 0(X6), X10 + MOV 8(X6), X11 + MOV 16(X6), X12 + MOV 24(X6), X13 + MOV 0(X7), X14 + MOV 8(X7), X15 + MOV 16(X7), X16 + MOV 24(X7), X17 ADD X14, X10 // ADCS X14, X10, X10 (cr=X28) SLTU X14, X10, X31 // ... ADD X28, X10 // ... @@ -68,13 +63,18 @@ loop4cont: ADD X28, X12 // ... SLTU X28, X12, X28 // ... ADD X31, X28 // ... - MOV X9, 0(X8) - MOV X10, 8(X8) - MOV X11, 16(X8) - MOV X12, 24(X8) + ADD X17, X13 // ADCS X17, X13, X13 (cr=X28) + SLTU X17, X13, X31 // ... + ADD X28, X13 // ... + SLTU X28, X13, X28 // ... + ADD X31, X28 // ... + MOV X10, 0(X9) + MOV X11, 8(X9) + MOV X12, 16(X9) + MOV X13, 24(X9) ADD $32, X6 ADD $32, X7 - ADD $32, X8 + ADD $32, X9 SUB $1, X5 BNEZ X5, loop4cont loop4done: @@ -86,46 +86,41 @@ TEXT ·subVV(SB), NOSPLIT, $0 MOV z_len+8(FP), X5 MOV x_base+24(FP), X6 MOV y_base+48(FP), X7 - MOV z_base+0(FP), X8 + MOV z_base+0(FP), X9 // compute unrolled loop lengths - AND $3, X5, X9 + AND $3, X5, X10 SRL $2, X5 XOR X28, X28 // clear carry loop1: - BEQZ X9, loop1done + BEQZ X10, loop1done loop1cont: // unroll 1X - MOV 0(X6), X10 - MOV 0(X7), X11 - SLTU X28, X10, X31 // SBCS X11, X10, X10 - SUB X28, X10 // ... - SLTU X11, X10, X28 // ... - SUB X11, X10 // ... + MOV 0(X6), X11 + MOV 0(X7), X12 + SLTU X28, X11, X31 // SBCS X12, X11, X11 + SUB X28, X11 // ... + SLTU X12, X11, X28 // ... + SUB X12, X11 // ... ADD X31, X28 // ... - MOV X10, 0(X8) + MOV X11, 0(X9) ADD $8, X6 ADD $8, X7 - ADD $8, X8 - SUB $1, X9 - BNEZ X9, loop1cont + ADD $8, X9 + SUB $1, X10 + BNEZ X10, loop1cont loop1done: loop4: BEQZ X5, loop4done loop4cont: // unroll 4X - MOV 0(X6), X9 - MOV 8(X6), X10 - MOV 16(X6), X11 - MOV 24(X6), X12 - MOV 0(X7), X13 - MOV 8(X7), X14 - MOV 16(X7), X15 - MOV 24(X7), X16 - SLTU X28, X9, X31 // SBCS X13, X9, X9 - SUB X28, X9 // ... - SLTU X13, X9, X28 // ... - SUB X13, X9 // ... - ADD X31, X28 // ... + MOV 0(X6), X10 + MOV 8(X6), X11 + MOV 16(X6), X12 + MOV 24(X6), X13 + MOV 0(X7), X14 + MOV 8(X7), X15 + MOV 16(X7), X16 + MOV 24(X7), X17 SLTU X28, X10, X31 // SBCS X14, X10, X10 SUB X28, X10 // ... SLTU X14, X10, X28 // ... @@ -141,13 +136,18 @@ loop4cont: SLTU X16, X12, X28 // ... SUB X16, X12 // ... ADD X31, X28 // ... - MOV X9, 0(X8) - MOV X10, 8(X8) - MOV X11, 16(X8) - MOV X12, 24(X8) + SLTU X28, X13, X31 // SBCS X17, X13, X13 + SUB X28, X13 // ... + SLTU X17, X13, X28 // ... + SUB X17, X13 // ... + ADD X31, X28 // ... + MOV X10, 0(X9) + MOV X11, 8(X9) + MOV X12, 16(X9) + MOV X13, 24(X9) ADD $32, X6 ADD $32, X7 - ADD $32, X8 + ADD $32, X9 SUB $1, X5 BNEZ X5, loop4cont loop4done: @@ -160,69 +160,69 @@ TEXT ·lshVU(SB), NOSPLIT, $0 BEQZ X5, ret0 MOV s+48(FP), X6 MOV x_base+24(FP), X7 - MOV z_base+0(FP), X8 + MOV z_base+0(FP), X9 // run loop backward - SLL $3, X5, X9 - ADD X9, X7 - SLL $3, X5, X9 - ADD X9, X8 + SLL $3, X5, X10 + ADD X10, X7 + SLL $3, X5, X10 + ADD X10, X9 // shift first word into carry - MOV -8(X7), X9 - MOV $64, X10 - SUB X6, X10 - SRL X10, X9, X11 - SLL X6, X9 - MOV X11, c+56(FP) + MOV -8(X7), X10 + MOV $64, X11 + SUB X6, X11 + SRL X11, X10, X12 + SLL X6, X10 + MOV X12, c+56(FP) // shift remaining words SUB $1, X5 // compute unrolled loop lengths - AND $3, X5, X11 + AND $3, X5, X12 SRL $2, X5 loop1: - BEQZ X11, loop1done + BEQZ X12, loop1done loop1cont: // unroll 1X - MOV -16(X7), X12 - SRL X10, X12, X13 - OR X9, X13 - SLL X6, X12, X9 - MOV X13, -8(X8) + MOV -16(X7), X13 + SRL X11, X13, X14 + OR X10, X14 + SLL X6, X13, X10 + MOV X14, -8(X9) ADD $-8, X7 - ADD $-8, X8 - SUB $1, X11 - BNEZ X11, loop1cont + ADD $-8, X9 + SUB $1, X12 + BNEZ X12, loop1cont loop1done: loop4: BEQZ X5, loop4done loop4cont: // unroll 4X - MOV -16(X7), X11 - MOV -24(X7), X12 - MOV -32(X7), X13 - MOV -40(X7), X14 - SRL X10, X11, X15 - OR X9, X15 - SLL X6, X11, X9 - SRL X10, X12, X11 - OR X9, X11 - SLL X6, X12, X9 - SRL X10, X13, X12 - OR X9, X12 - SLL X6, X13, X9 - SRL X10, X14, X13 - OR X9, X13 - SLL X6, X14, X9 - MOV X15, -8(X8) - MOV X11, -16(X8) - MOV X12, -24(X8) - MOV X13, -32(X8) + MOV -16(X7), X12 + MOV -24(X7), X13 + MOV -32(X7), X14 + MOV -40(X7), X15 + SRL X11, X12, X16 + OR X10, X16 + SLL X6, X12, X10 + SRL X11, X13, X12 + OR X10, X12 + SLL X6, X13, X10 + SRL X11, X14, X13 + OR X10, X13 + SLL X6, X14, X10 + SRL X11, X15, X14 + OR X10, X14 + SLL X6, X15, X10 + MOV X16, -8(X9) + MOV X12, -16(X9) + MOV X13, -24(X9) + MOV X14, -32(X9) ADD $-32, X7 - ADD $-32, X8 + ADD $-32, X9 SUB $1, X5 BNEZ X5, loop4cont loop4done: // store final shifted bits - MOV X9, -8(X8) + MOV X10, -8(X9) RET ret0: MOV X0, c+56(FP) @@ -234,64 +234,64 @@ TEXT ·rshVU(SB), NOSPLIT, $0 BEQZ X5, ret0 MOV s+48(FP), X6 MOV x_base+24(FP), X7 - MOV z_base+0(FP), X8 + MOV z_base+0(FP), X9 // shift first word into carry - MOV 0(X7), X9 - MOV $64, X10 - SUB X6, X10 - SLL X10, X9, X11 - SRL X6, X9 - MOV X11, c+56(FP) + MOV 0(X7), X10 + MOV $64, X11 + SUB X6, X11 + SLL X11, X10, X12 + SRL X6, X10 + MOV X12, c+56(FP) // shift remaining words SUB $1, X5 // compute unrolled loop lengths - AND $3, X5, X11 + AND $3, X5, X12 SRL $2, X5 loop1: - BEQZ X11, loop1done + BEQZ X12, loop1done loop1cont: // unroll 1X - MOV 8(X7), X12 - SLL X10, X12, X13 - OR X9, X13 - SRL X6, X12, X9 - MOV X13, 0(X8) + MOV 8(X7), X13 + SLL X11, X13, X14 + OR X10, X14 + SRL X6, X13, X10 + MOV X14, 0(X9) ADD $8, X7 - ADD $8, X8 - SUB $1, X11 - BNEZ X11, loop1cont + ADD $8, X9 + SUB $1, X12 + BNEZ X12, loop1cont loop1done: loop4: BEQZ X5, loop4done loop4cont: // unroll 4X - MOV 8(X7), X11 - MOV 16(X7), X12 - MOV 24(X7), X13 - MOV 32(X7), X14 - SLL X10, X11, X15 - OR X9, X15 - SRL X6, X11, X9 - SLL X10, X12, X11 - OR X9, X11 - SRL X6, X12, X9 - SLL X10, X13, X12 - OR X9, X12 - SRL X6, X13, X9 - SLL X10, X14, X13 - OR X9, X13 - SRL X6, X14, X9 - MOV X15, 0(X8) - MOV X11, 8(X8) - MOV X12, 16(X8) - MOV X13, 24(X8) + MOV 8(X7), X12 + MOV 16(X7), X13 + MOV 24(X7), X14 + MOV 32(X7), X15 + SLL X11, X12, X16 + OR X10, X16 + SRL X6, X12, X10 + SLL X11, X13, X12 + OR X10, X12 + SRL X6, X13, X10 + SLL X11, X14, X13 + OR X10, X13 + SRL X6, X14, X10 + SLL X11, X15, X14 + OR X10, X14 + SRL X6, X15, X10 + MOV X16, 0(X9) + MOV X12, 8(X9) + MOV X13, 16(X9) + MOV X14, 24(X9) ADD $32, X7 - ADD $32, X8 + ADD $32, X9 SUB $1, X5 BNEZ X5, loop4cont loop4done: // store final shifted bits - MOV X9, 0(X8) + MOV X10, 0(X9) RET ret0: MOV X0, c+56(FP) @@ -302,63 +302,63 @@ TEXT ·mulAddVWW(SB), NOSPLIT, $0 MOV m+48(FP), X5 MOV a+56(FP), X6 MOV z_len+8(FP), X7 - MOV x_base+24(FP), X8 - MOV z_base+0(FP), X9 + MOV x_base+24(FP), X9 + MOV z_base+0(FP), X10 // compute unrolled loop lengths - AND $3, X7, X10 + AND $3, X7, X11 SRL $2, X7 loop1: - BEQZ X10, loop1done + BEQZ X11, loop1done loop1cont: // unroll 1X - MOV 0(X8), X11 + MOV 0(X9), X12 // synthetic carry, one column at a time - MUL X5, X11, X12 - MULHU X5, X11, X13 - ADD X6, X12, X11 // ADDS X6, X12, X11 (cr=X28) - SLTU X6, X11, X28 // ... - ADD X28, X13, X6 // ADC $0, X13, X6 - MOV X11, 0(X9) - ADD $8, X8 + MUL X5, X12, X13 + MULHU X5, X12, X14 + ADD X6, X13, X12 // ADDS X6, X13, X12 (cr=X28) + SLTU X6, X12, X28 // ... + ADD X28, X14, X6 // ADC $0, X14, X6 + MOV X12, 0(X10) ADD $8, X9 - SUB $1, X10 - BNEZ X10, loop1cont + ADD $8, X10 + SUB $1, X11 + BNEZ X11, loop1cont loop1done: loop4: BEQZ X7, loop4done loop4cont: // unroll 4X - MOV 0(X8), X10 - MOV 8(X8), X11 - MOV 16(X8), X12 - MOV 24(X8), X13 + MOV 0(X9), X11 + MOV 8(X9), X12 + MOV 16(X9), X13 + MOV 24(X9), X14 // synthetic carry, one column at a time - MUL X5, X10, X14 - MULHU X5, X10, X15 - ADD X6, X14, X10 // ADDS X6, X14, X10 (cr=X28) - SLTU X6, X10, X28 // ... - ADD X28, X15, X6 // ADC $0, X15, X6 - MUL X5, X11, X14 - MULHU X5, X11, X15 - ADD X6, X14, X11 // ADDS X6, X14, X11 (cr=X28) + MUL X5, X11, X15 + MULHU X5, X11, X16 + ADD X6, X15, X11 // ADDS X6, X15, X11 (cr=X28) SLTU X6, X11, X28 // ... - ADD X28, X15, X6 // ADC $0, X15, X6 - MUL X5, X12, X14 - MULHU X5, X12, X15 - ADD X6, X14, X12 // ADDS X6, X14, X12 (cr=X28) + ADD X28, X16, X6 // ADC $0, X16, X6 + MUL X5, X12, X15 + MULHU X5, X12, X16 + ADD X6, X15, X12 // ADDS X6, X15, X12 (cr=X28) SLTU X6, X12, X28 // ... - ADD X28, X15, X6 // ADC $0, X15, X6 - MUL X5, X13, X14 - MULHU X5, X13, X15 - ADD X6, X14, X13 // ADDS X6, X14, X13 (cr=X28) + ADD X28, X16, X6 // ADC $0, X16, X6 + MUL X5, X13, X15 + MULHU X5, X13, X16 + ADD X6, X15, X13 // ADDS X6, X15, X13 (cr=X28) SLTU X6, X13, X28 // ... - ADD X28, X15, X6 // ADC $0, X15, X6 - MOV X10, 0(X9) - MOV X11, 8(X9) - MOV X12, 16(X9) - MOV X13, 24(X9) - ADD $32, X8 + ADD X28, X16, X6 // ADC $0, X16, X6 + MUL X5, X14, X15 + MULHU X5, X14, X16 + ADD X6, X15, X14 // ADDS X6, X15, X14 (cr=X28) + SLTU X6, X14, X28 // ... + ADD X28, X16, X6 // ADC $0, X16, X6 + MOV X11, 0(X10) + MOV X12, 8(X10) + MOV X13, 16(X10) + MOV X14, 24(X10) ADD $32, X9 + ADD $32, X10 SUB $1, X7 BNEZ X7, loop4cont loop4done: @@ -370,86 +370,86 @@ TEXT ·addMulVVWW(SB), NOSPLIT, $0 MOV m+72(FP), X5 MOV a+80(FP), X6 MOV z_len+8(FP), X7 - MOV x_base+24(FP), X8 - MOV y_base+48(FP), X9 - MOV z_base+0(FP), X10 + MOV x_base+24(FP), X9 + MOV y_base+48(FP), X10 + MOV z_base+0(FP), X11 // compute unrolled loop lengths - AND $3, X7, X11 + AND $3, X7, X12 SRL $2, X7 loop1: - BEQZ X11, loop1done + BEQZ X12, loop1done loop1cont: // unroll 1X - MOV 0(X8), X12 MOV 0(X9), X13 + MOV 0(X10), X14 // synthetic carry, one column at a time - MUL X5, X13, X14 - MULHU X5, X13, X15 - ADD X12, X14 // ADDS X12, X14, X14 (cr=X28) - SLTU X12, X14, X28 // ... - ADD X28, X15 // ADC $0, X15, X15 - ADD X6, X14, X13 // ADDS X6, X14, X13 (cr=X28) - SLTU X6, X13, X28 // ... - ADD X28, X15, X6 // ADC $0, X15, X6 - MOV X13, 0(X10) - ADD $8, X8 + MUL X5, X14, X15 + MULHU X5, X14, X16 + ADD X13, X15 // ADDS X13, X15, X15 (cr=X28) + SLTU X13, X15, X28 // ... + ADD X28, X16 // ADC $0, X16, X16 + ADD X6, X15, X14 // ADDS X6, X15, X14 (cr=X28) + SLTU X6, X14, X28 // ... + ADD X28, X16, X6 // ADC $0, X16, X6 + MOV X14, 0(X11) ADD $8, X9 ADD $8, X10 - SUB $1, X11 - BNEZ X11, loop1cont + ADD $8, X11 + SUB $1, X12 + BNEZ X12, loop1cont loop1done: loop4: BEQZ X7, loop4done loop4cont: // unroll 4X - MOV 0(X8), X11 - MOV 8(X8), X12 - MOV 16(X8), X13 - MOV 24(X8), X14 - MOV 0(X9), X15 - MOV 8(X9), X16 - MOV 16(X9), X17 - MOV 24(X9), X18 + MOV 0(X9), X12 + MOV 8(X9), X13 + MOV 16(X9), X14 + MOV 24(X9), X15 + MOV 0(X10), X16 + MOV 8(X10), X17 + MOV 16(X10), X18 + MOV 24(X10), X19 // synthetic carry, one column at a time - MUL X5, X15, X19 - MULHU X5, X15, X20 - ADD X11, X19 // ADDS X11, X19, X19 (cr=X28) - SLTU X11, X19, X28 // ... - ADD X28, X20 // ADC $0, X20, X20 - ADD X6, X19, X15 // ADDS X6, X19, X15 (cr=X28) - SLTU X6, X15, X28 // ... - ADD X28, X20, X6 // ADC $0, X20, X6 - MUL X5, X16, X19 - MULHU X5, X16, X20 - ADD X12, X19 // ADDS X12, X19, X19 (cr=X28) - SLTU X12, X19, X28 // ... - ADD X28, X20 // ADC $0, X20, X20 - ADD X6, X19, X16 // ADDS X6, X19, X16 (cr=X28) + MUL X5, X16, X20 + MULHU X5, X16, X21 + ADD X12, X20 // ADDS X12, X20, X20 (cr=X28) + SLTU X12, X20, X28 // ... + ADD X28, X21 // ADC $0, X21, X21 + ADD X6, X20, X16 // ADDS X6, X20, X16 (cr=X28) SLTU X6, X16, X28 // ... - ADD X28, X20, X6 // ADC $0, X20, X6 - MUL X5, X17, X19 - MULHU X5, X17, X20 - ADD X13, X19 // ADDS X13, X19, X19 (cr=X28) - SLTU X13, X19, X28 // ... - ADD X28, X20 // ADC $0, X20, X20 - ADD X6, X19, X17 // ADDS X6, X19, X17 (cr=X28) + ADD X28, X21, X6 // ADC $0, X21, X6 + MUL X5, X17, X20 + MULHU X5, X17, X21 + ADD X13, X20 // ADDS X13, X20, X20 (cr=X28) + SLTU X13, X20, X28 // ... + ADD X28, X21 // ADC $0, X21, X21 + ADD X6, X20, X17 // ADDS X6, X20, X17 (cr=X28) SLTU X6, X17, X28 // ... - ADD X28, X20, X6 // ADC $0, X20, X6 - MUL X5, X18, X19 - MULHU X5, X18, X20 - ADD X14, X19 // ADDS X14, X19, X19 (cr=X28) - SLTU X14, X19, X28 // ... - ADD X28, X20 // ADC $0, X20, X20 - ADD X6, X19, X18 // ADDS X6, X19, X18 (cr=X28) + ADD X28, X21, X6 // ADC $0, X21, X6 + MUL X5, X18, X20 + MULHU X5, X18, X21 + ADD X14, X20 // ADDS X14, X20, X20 (cr=X28) + SLTU X14, X20, X28 // ... + ADD X28, X21 // ADC $0, X21, X21 + ADD X6, X20, X18 // ADDS X6, X20, X18 (cr=X28) SLTU X6, X18, X28 // ... - ADD X28, X20, X6 // ADC $0, X20, X6 - MOV X15, 0(X10) - MOV X16, 8(X10) - MOV X17, 16(X10) - MOV X18, 24(X10) - ADD $32, X8 + ADD X28, X21, X6 // ADC $0, X21, X6 + MUL X5, X19, X20 + MULHU X5, X19, X21 + ADD X15, X20 // ADDS X15, X20, X20 (cr=X28) + SLTU X15, X20, X28 // ... + ADD X28, X21 // ADC $0, X21, X21 + ADD X6, X20, X19 // ADDS X6, X20, X19 (cr=X28) + SLTU X6, X19, X28 // ... + ADD X28, X21, X6 // ADC $0, X21, X6 + MOV X16, 0(X11) + MOV X17, 8(X11) + MOV X18, 16(X11) + MOV X19, 24(X11) ADD $32, X9 ADD $32, X10 + ADD $32, X11 SUB $1, X7 BNEZ X7, loop4cont loop4done: diff --git a/src/math/big/internal/asmgen/riscv64.go b/src/math/big/internal/asmgen/riscv64.go index 8995c4c1592ca7..20600d47c31843 100644 --- a/src/math/big/internal/asmgen/riscv64.go +++ b/src/math/big/internal/asmgen/riscv64.go @@ -16,10 +16,11 @@ var ArchRISCV64 = &Arch{ // X2 is SP. // X3 is SB. // X4 is TP. + // X8 is FP. // X27 is g. // X28 and X29 are our virtual carry flags. // X31 is the assembler/linker temporary (which we use too). - "X5", "X6", "X7", "X8", "X9", + "X5", "X6", "X7", "X9", "X10", "X11", "X12", "X13", "X14", "X15", "X16", "X17", "X18", "X19", "X20", "X21", "X22", "X23", "X24", "X25", "X26", "X30", diff --git a/src/runtime/asan_riscv64.s b/src/runtime/asan_riscv64.s index 5a333361dde90d..94b05b2a930f56 100644 --- a/src/runtime/asan_riscv64.s +++ b/src/runtime/asan_riscv64.s @@ -76,7 +76,7 @@ TEXT runtime·lsandoleakcheck(SB), NOSPLIT, $0-0 // Switches SP to g0 stack and calls (X14). Arguments already set. TEXT asancall<>(SB), NOSPLIT, $0-0 - MOV X2, X8 // callee-saved + MOV X2, X9 // callee-saved BEQZ g, call // no g, still on a system stack MOV g_m(g), X21 @@ -91,5 +91,5 @@ TEXT asancall<>(SB), NOSPLIT, $0-0 call: JALR RA, X14 - MOV X8, X2 + MOV X9, X2 RET diff --git a/src/runtime/asm_riscv64.s b/src/runtime/asm_riscv64.s index 3bc33427798dc5..c2430e608c88ff 100644 --- a/src/runtime/asm_riscv64.s +++ b/src/runtime/asm_riscv64.s @@ -64,10 +64,13 @@ GLOBL _rt0_riscv64_lib_argv<>(SB),NOPTR, $8 // func rt0_go() TEXT runtime·rt0_go(SB),NOSPLIT|TOPFRAME,$0 // X2 = stack; A0 = argc; A1 = argv - SUB $24, X2 + SUB $32, X2 MOV A0, 8(X2) // argc MOV A1, 16(X2) // argv + // Call stack unwinding must not proceed past this frame. + MOV ZERO, X8 + // create istack out of the given (operating system) stack. // _cgo_init may update stackguard. MOV $runtime·g0(SB), g @@ -125,6 +128,8 @@ nocgo: RET TEXT runtime·mstart(SB),NOSPLIT|TOPFRAME,$0 + // Call stack unwinding must not proceed past this frame. + MOV ZERO, X8 CALL runtime·mstart0(SB) RET // not reached @@ -181,6 +186,7 @@ switch: CALL runtime·save_g(SB) MOV (g_sched+gobuf_sp)(g), T0 MOV T0, X2 + MOV (g_sched+gobuf_bp)(g), X8 // call target function MOV 0(CTXT), T1 // code pointer @@ -192,6 +198,8 @@ switch: CALL runtime·save_g(SB) MOV (g_sched+gobuf_sp)(g), X2 MOV ZERO, (g_sched+gobuf_sp)(g) + MOV (g_sched+gobuf_bp)(g), X8 + MOV ZERO, (g_sched+gobuf_bp)(g) RET noswitch: @@ -199,7 +207,8 @@ noswitch: // Using a tail call here cleans up tracebacks since we won't stop // at an intermediate systemstack. MOV 0(CTXT), T1 // code pointer - ADD $8, X2 + MOV -8(X2), X8 + ADD $16, X2 JMP (T1) // func switchToCrashStack0(fn func()) @@ -247,6 +256,7 @@ TEXT runtime·morestack(SB),NOSPLIT|NOFRAME,$0-0 MOV T0, (g_sched+gobuf_pc)(g) MOV RA, (g_sched+gobuf_lr)(g) MOV CTXT, (g_sched+gobuf_ctxt)(g) + MOV X8, (g_sched+gobuf_bp)(g) // Cannot grow scheduler stack (m->g0). MOV g_m(g), A0 @@ -265,12 +275,14 @@ TEXT runtime·morestack(SB),NOSPLIT|NOFRAME,$0-0 // Set m->morebuf to f's caller. MOV RA, (m_morebuf+gobuf_pc)(A0) // f's caller's PC MOV X2, (m_morebuf+gobuf_sp)(A0) // f's caller's SP + MOV X8, (m_morebuf+gobuf_bp)(A0) // f's caller's FP MOV g, (m_morebuf+gobuf_g)(A0) // Call newstack on m->g0's stack. MOV m_g0(A0), g CALL runtime·save_g(SB) MOV (g_sched+gobuf_sp)(g), X2 + MOV ZERO, X8 // Create a stack frame on g0 to call newstack. MOV ZERO, -8(X2) // Zero saved LR in frame SUB $8, X2 @@ -316,9 +328,11 @@ TEXT gogo<>(SB), NOSPLIT|NOFRAME, $0 CALL runtime·save_g(SB) MOV gobuf_sp(T0), X2 + MOV gobuf_bp(T0), X8 MOV gobuf_lr(T0), RA MOV gobuf_ctxt(T0), CTXT MOV ZERO, gobuf_sp(T0) + MOV ZERO, gobuf_bp(T0) MOV ZERO, gobuf_lr(T0) MOV ZERO, gobuf_ctxt(T0) MOV gobuf_pc(T0), T0 @@ -349,6 +363,7 @@ TEXT runtime·mcall(SB), NOSPLIT|NOFRAME, $0-8 MOV X2, (g_sched+gobuf_sp)(g) MOV RA, (g_sched+gobuf_pc)(g) MOV ZERO, (g_sched+gobuf_lr)(g) + MOV X8, (g_sched+gobuf_bp)(g) // Switch to m->g0 & its stack, call fn. MOV g, X10 @@ -359,6 +374,7 @@ TEXT runtime·mcall(SB), NOSPLIT|NOFRAME, $0-8 JMP runtime·badmcall(SB) MOV 0(CTXT), T1 // code pointer MOV (g_sched+gobuf_sp)(g), X2 // sp = m->g0->sched.sp + MOV ZERO, X8 // we don't need special macro for regabi since arg0(X10) = g SUB $16, X2 MOV X10, 8(X2) // setup g @@ -373,10 +389,11 @@ TEXT runtime·mcall(SB), NOSPLIT|NOFRAME, $0-8 // Smashes X31. TEXT gosave_systemstack_switch<>(SB),NOSPLIT|NOFRAME,$0 MOV $runtime·systemstack_switch(SB), X31 - ADD $8, X31 // get past prologue + ADD $24, X31 // get past prologue MOV X31, (g_sched+gobuf_pc)(g) MOV X2, (g_sched+gobuf_sp)(g) MOV ZERO, (g_sched+gobuf_lr)(g) + MOV X8, (g_sched+gobuf_bp)(g) // Assert ctxt is zero. See func save. MOV (g_sched+gobuf_ctxt)(g), X31 BEQ ZERO, X31, 2(PC) @@ -389,7 +406,9 @@ TEXT gosave_systemstack_switch<>(SB),NOSPLIT|NOFRAME,$0 TEXT ·asmcgocall_no_g(SB),NOSPLIT,$0-16 MOV fn+0(FP), X11 MOV arg+8(FP), X10 + SUB $16, X2 JALR RA, (X11) + ADD $16, X2 RET // func asmcgocall(fn, arg unsafe.Pointer) int32 @@ -400,8 +419,8 @@ TEXT ·asmcgocall(SB),NOSPLIT,$0-20 MOV fn+0(FP), X11 MOV arg+8(FP), X10 - MOV X2, X8 // save original stack pointer - MOV g, X9 + MOV X2, X9 // save original stack pointer + MOV g, X18 // Figure out if we need to switch to m->g0 stack. // We get called to create new OS threads too, and those @@ -417,15 +436,16 @@ TEXT ·asmcgocall(SB),NOSPLIT,$0-20 MOV X7, g CALL runtime·save_g(SB) MOV (g_sched+gobuf_sp)(g), X2 + MOV (g_sched+gobuf_bp)(g), X8 // Now on a scheduling stack (a pthread-created stack). g0: // Save room for two of our pointers. SUB $16, X2 - MOV X9, 0(X2) // save old g on stack - MOV (g_stack+stack_hi)(X9), X9 - SUB X8, X9, X8 - MOV X8, 8(X2) // save depth in old g stack (can't just save SP, as stack might be copied during a callback) + MOV X18, 0(X2) // save old g on stack + MOV (g_stack+stack_hi)(X18), X5 + SUB X9, X5, X6 + MOV X6, 8(X2) // save depth in old g stack (can't just save SP, as stack might be copied during a callback) JALR RA, (X11) @@ -657,6 +677,7 @@ needm: MOV g_m(g), X5 MOV m_g0(X5), X6 MOV X2, (g_sched+gobuf_sp)(X6) + MOV X8, (g_sched+gobuf_bp)(X6) havem: // Now there's a valid m, and we're running on its m->g0. @@ -668,6 +689,7 @@ havem: MOV (g_sched+gobuf_sp)(X6), X7 MOV X7, savedsp-24(SP) // must match frame size MOV X2, (g_sched+gobuf_sp)(X6) + MOV X8, (g_sched+gobuf_bp)(X6) // Switch to m->curg stack and call runtime.cgocallbackg. // Because we are taking over the execution of m->curg @@ -684,21 +706,24 @@ havem: CALL runtime·save_g(SB) MOV (g_sched+gobuf_sp)(g), X6 // prepare stack as X6 MOV (g_sched+gobuf_pc)(g), X7 - MOV X7, -(24+8)(X6) // "saved LR"; must match frame size + MOV X7, -(24+16)(X6) // "saved LR"; must match frame size + // Preserve m->curg->sched.bp in the frame-pointer link slot (one word below the SP). + MOV (g_sched+gobuf_bp)(g), X11 + MOV X11, -(24+24)(X6) // Gather our arguments into registers. MOV fn+0(FP), X7 - MOV frame+8(FP), X8 + MOV frame+8(FP), X12 MOV ctxt+16(FP), X9 - MOV $-(24+8)(X6), X2 // switch stack; must match frame size + MOV $-(24+16)(X6), X2 // switch stack; must match frame size MOV X7, 8(X2) - MOV X8, 16(X2) + MOV X12, 16(X2) MOV X9, 24(X2) CALL runtime·cgocallbackg(SB) // Restore g->sched (== m->curg->sched) from saved values. MOV 0(X2), X7 MOV X7, (g_sched+gobuf_pc)(g) - MOV $(24+8)(X2), X6 // must match frame size + MOV $(24+16)(X2), X6 // must match frame size MOV X6, (g_sched+gobuf_sp)(g) // Switch back to m->g0's stack and restore m->g0->sched.sp. @@ -766,30 +791,29 @@ TEXT ·spillArgs(SB),NOSPLIT,$0-0 MOV X15, (5*8)(X25) MOV X16, (6*8)(X25) MOV X17, (7*8)(X25) - MOV X8, (8*8)(X25) - MOV X9, (9*8)(X25) - MOV X18, (10*8)(X25) - MOV X19, (11*8)(X25) - MOV X20, (12*8)(X25) - MOV X21, (13*8)(X25) - MOV X22, (14*8)(X25) - MOV X23, (15*8)(X25) - MOVD F10, (16*8)(X25) - MOVD F11, (17*8)(X25) - MOVD F12, (18*8)(X25) - MOVD F13, (19*8)(X25) - MOVD F14, (20*8)(X25) - MOVD F15, (21*8)(X25) - MOVD F16, (22*8)(X25) - MOVD F17, (23*8)(X25) - MOVD F8, (24*8)(X25) - MOVD F9, (25*8)(X25) - MOVD F18, (26*8)(X25) - MOVD F19, (27*8)(X25) - MOVD F20, (28*8)(X25) - MOVD F21, (29*8)(X25) - MOVD F22, (30*8)(X25) - MOVD F23, (31*8)(X25) + MOV X9, (8*8)(X25) + MOV X18, (9*8)(X25) + MOV X19, (10*8)(X25) + MOV X20, (11*8)(X25) + MOV X21, (12*8)(X25) + MOV X22, (13*8)(X25) + MOV X23, (14*8)(X25) + MOVD F10, (15*8)(X25) + MOVD F11, (16*8)(X25) + MOVD F12, (17*8)(X25) + MOVD F13, (18*8)(X25) + MOVD F14, (19*8)(X25) + MOVD F15, (20*8)(X25) + MOVD F16, (21*8)(X25) + MOVD F17, (22*8)(X25) + MOVD F8, (23*8)(X25) + MOVD F9, (24*8)(X25) + MOVD F18, (25*8)(X25) + MOVD F19, (26*8)(X25) + MOVD F20, (27*8)(X25) + MOVD F21, (28*8)(X25) + MOVD F22, (29*8)(X25) + MOVD F23, (30*8)(X25) RET // unspillArgs loads args into registers from a *internal/abi.RegArgs in X25. @@ -802,30 +826,33 @@ TEXT ·unspillArgs(SB),NOSPLIT,$0-0 MOV (5*8)(X25), X15 MOV (6*8)(X25), X16 MOV (7*8)(X25), X17 - MOV (8*8)(X25), X8 - MOV (9*8)(X25), X9 - MOV (10*8)(X25), X18 - MOV (11*8)(X25), X19 - MOV (12*8)(X25), X20 - MOV (13*8)(X25), X21 - MOV (14*8)(X25), X22 - MOV (15*8)(X25), X23 - MOVD (16*8)(X25), F10 - MOVD (17*8)(X25), F11 - MOVD (18*8)(X25), F12 - MOVD (19*8)(X25), F13 - MOVD (20*8)(X25), F14 - MOVD (21*8)(X25), F15 - MOVD (22*8)(X25), F16 - MOVD (23*8)(X25), F17 - MOVD (24*8)(X25), F8 - MOVD (25*8)(X25), F9 - MOVD (26*8)(X25), F18 - MOVD (27*8)(X25), F19 - MOVD (28*8)(X25), F20 - MOVD (29*8)(X25), F21 - MOVD (30*8)(X25), F22 - MOVD (31*8)(X25), F23 + MOV (8*8)(X25), X9 + MOV (9*8)(X25), X18 + MOV (10*8)(X25), X19 + MOV (11*8)(X25), X20 + MOV (12*8)(X25), X21 + MOV (13*8)(X25), X22 + MOV (14*8)(X25), X23 + MOVD (15*8)(X25), F10 + MOVD (16*8)(X25), F11 + MOVD (17*8)(X25), F12 + MOVD (18*8)(X25), F13 + MOVD (19*8)(X25), F14 + MOVD (20*8)(X25), F15 + MOVD (21*8)(X25), F16 + MOVD (22*8)(X25), F17 + MOVD (23*8)(X25), F8 + MOVD (24*8)(X25), F9 + MOVD (25*8)(X25), F18 + MOVD (26*8)(X25), F19 + MOVD (27*8)(X25), F20 + MOVD (28*8)(X25), F21 + MOVD (29*8)(X25), F22 + MOVD (30*8)(X25), F23 + RET + +TEXT ·getfp(SB),NOSPLIT|NOFRAME,$0 + MOV X8, X10 RET // gcWriteBarrier informs the GC about heap pointer writes. @@ -869,6 +896,7 @@ flush: // X2 is SP // X3 is GP // X4 is TP + // X8 is FP MOV X7, 3*8(X2) MOV X8, 4*8(X2) MOV X9, 5*8(X2) diff --git a/src/runtime/cgo/asm_riscv64.s b/src/runtime/cgo/asm_riscv64.s index d8be554977feb7..81513e93569062 100644 --- a/src/runtime/cgo/asm_riscv64.s +++ b/src/runtime/cgo/asm_riscv64.s @@ -11,8 +11,8 @@ // function. TEXT ·set_crosscall2(SB),NOSPLIT,$0-0 MOV _crosscall2_ptr(SB), X7 - MOV $crosscall2_trampoline<>(SB), X8 - MOV X8, (X7) + MOV $crosscall2_trampoline<>(SB), X9 + MOV X9, (X7) RET TEXT crosscall2_trampoline<>(SB),NOSPLIT,$0-0 diff --git a/src/runtime/mkpreempt.go b/src/runtime/mkpreempt.go index ca1c6e4a0e624a..b9086728d14c88 100644 --- a/src/runtime/mkpreempt.go +++ b/src/runtime/mkpreempt.go @@ -901,12 +901,12 @@ func genPPC64(g *gen) { func genRISCV64(g *gen) { p := g.p - // X0 (zero), X1 (LR), X2 (SP), X3 (GP), X4 (TP), X27 (g), X31 (TMP) are special. + // X0 (zero), X1 (LR), X2 (SP), X3 (GP), X4 (TP), X8(FP), X27 (g), X31 (TMP) are special. var l = layout{sp: "X2", stack: 8} // Add integer registers (X5-X26, X28-30). for i := 5; i < 31; i++ { - if i == 27 { + if i == 8 || i == 27 { continue } reg := fmt.Sprintf("X%d", i) @@ -919,14 +919,18 @@ func genRISCV64(g *gen) { l.add("MOVD", reg, 8) } + l.stack += 8 p("MOV X1, -%d(X2)", l.stack) p("SUB $%d, X2", l.stack) + p("MOV X8, -8(X2)") + p("ADD $8, X2, X8") l.save(g) p("CALL ·asyncPreempt2(SB)") l.restore(g) p("MOV %d(X2), X1", l.stack) + p("MOV -8(X2), X8") p("MOV (X2), X31") - p("ADD $%d, X2", l.stack+8) + p("ADD $%d, X2", l.stack+16) p("JMP (X31)") } diff --git a/src/runtime/mprof.go b/src/runtime/mprof.go index f1703a7ebab802..13a723b9484dea 100644 --- a/src/runtime/mprof.go +++ b/src/runtime/mprof.go @@ -589,7 +589,12 @@ func fpTracebackPartialExpand(skip int, fp unsafe.Pointer, pcBuf []uintptr) int } for n < len(pcBuf) && fp != nil { // return addr sits one word above the frame pointer - pc := *(*uintptr)(unsafe.Pointer(uintptr(fp) + goarch.PtrSize)) + var pc uintptr + if goarch.ArchFamily == goarch.RISCV64 { + pc = *(*uintptr)(unsafe.Pointer(uintptr(fp) - goarch.PtrSize)) + } else { + pc = *(*uintptr)(unsafe.Pointer(uintptr(fp) + goarch.PtrSize)) + } if skip > 0 { callPC := pc - 1 @@ -612,7 +617,11 @@ func fpTracebackPartialExpand(skip int, fp unsafe.Pointer, pcBuf []uintptr) int } // follow the frame pointer to the next one - fp = unsafe.Pointer(*(*uintptr)(fp)) + if goarch.ArchFamily == goarch.RISCV64 { + fp = unsafe.Pointer(*(*uintptr)(unsafe.Pointer(uintptr(fp) - 2*goarch.PtrSize))) + } else { + fp = unsafe.Pointer(*(*uintptr)(fp)) + } } return n } diff --git a/src/runtime/panic.go b/src/runtime/panic.go index d467e9305d12e6..163495f55d6c44 100644 --- a/src/runtime/panic.go +++ b/src/runtime/panic.go @@ -1408,6 +1408,10 @@ func recovery(gp *g) { // than the sp. fp is totally useless to us here, because it // only gets us to the caller's fp. gp.sched.bp = sp - goarch.PtrSize + case goarch.IsRiscv64 != 0: + // On riscv64 with frame pointers enabled, the architectural bp + // points one word higher than the sp. + gp.sched.bp = sp + goarch.PtrSize } gogo(&gp.sched) } diff --git a/src/runtime/preempt_riscv64.s b/src/runtime/preempt_riscv64.s index bbb6447dc59618..1210bb7e7c7a8b 100644 --- a/src/runtime/preempt_riscv64.s +++ b/src/runtime/preempt_riscv64.s @@ -6,122 +6,124 @@ TEXT ·asyncPreempt(SB),NOSPLIT|NOFRAME,$0-0 MOV X1, -464(X2) SUB $464, X2 + MOV X8, -8(X2) + ADD $8, X2, X8 MOV X5, 8(X2) MOV X6, 16(X2) MOV X7, 24(X2) - MOV X8, 32(X2) - MOV X9, 40(X2) - MOV X10, 48(X2) - MOV X11, 56(X2) - MOV X12, 64(X2) - MOV X13, 72(X2) - MOV X14, 80(X2) - MOV X15, 88(X2) - MOV X16, 96(X2) - MOV X17, 104(X2) - MOV X18, 112(X2) - MOV X19, 120(X2) - MOV X20, 128(X2) - MOV X21, 136(X2) - MOV X22, 144(X2) - MOV X23, 152(X2) - MOV X24, 160(X2) - MOV X25, 168(X2) - MOV X26, 176(X2) - MOV X28, 184(X2) - MOV X29, 192(X2) - MOV X30, 200(X2) - MOVD F0, 208(X2) - MOVD F1, 216(X2) - MOVD F2, 224(X2) - MOVD F3, 232(X2) - MOVD F4, 240(X2) - MOVD F5, 248(X2) - MOVD F6, 256(X2) - MOVD F7, 264(X2) - MOVD F8, 272(X2) - MOVD F9, 280(X2) - MOVD F10, 288(X2) - MOVD F11, 296(X2) - MOVD F12, 304(X2) - MOVD F13, 312(X2) - MOVD F14, 320(X2) - MOVD F15, 328(X2) - MOVD F16, 336(X2) - MOVD F17, 344(X2) - MOVD F18, 352(X2) - MOVD F19, 360(X2) - MOVD F20, 368(X2) - MOVD F21, 376(X2) - MOVD F22, 384(X2) - MOVD F23, 392(X2) - MOVD F24, 400(X2) - MOVD F25, 408(X2) - MOVD F26, 416(X2) - MOVD F27, 424(X2) - MOVD F28, 432(X2) - MOVD F29, 440(X2) - MOVD F30, 448(X2) - MOVD F31, 456(X2) + MOV X9, 32(X2) + MOV X10, 40(X2) + MOV X11, 48(X2) + MOV X12, 56(X2) + MOV X13, 64(X2) + MOV X14, 72(X2) + MOV X15, 80(X2) + MOV X16, 88(X2) + MOV X17, 96(X2) + MOV X18, 104(X2) + MOV X19, 112(X2) + MOV X20, 120(X2) + MOV X21, 128(X2) + MOV X22, 136(X2) + MOV X23, 144(X2) + MOV X24, 152(X2) + MOV X25, 160(X2) + MOV X26, 168(X2) + MOV X28, 176(X2) + MOV X29, 184(X2) + MOV X30, 192(X2) + MOVD F0, 200(X2) + MOVD F1, 208(X2) + MOVD F2, 216(X2) + MOVD F3, 224(X2) + MOVD F4, 232(X2) + MOVD F5, 240(X2) + MOVD F6, 248(X2) + MOVD F7, 256(X2) + MOVD F8, 264(X2) + MOVD F9, 272(X2) + MOVD F10, 280(X2) + MOVD F11, 288(X2) + MOVD F12, 296(X2) + MOVD F13, 304(X2) + MOVD F14, 312(X2) + MOVD F15, 320(X2) + MOVD F16, 328(X2) + MOVD F17, 336(X2) + MOVD F18, 344(X2) + MOVD F19, 352(X2) + MOVD F20, 360(X2) + MOVD F21, 368(X2) + MOVD F22, 376(X2) + MOVD F23, 384(X2) + MOVD F24, 392(X2) + MOVD F25, 400(X2) + MOVD F26, 408(X2) + MOVD F27, 416(X2) + MOVD F28, 424(X2) + MOVD F29, 432(X2) + MOVD F30, 440(X2) + MOVD F31, 448(X2) CALL ·asyncPreempt2(SB) - MOVD 456(X2), F31 - MOVD 448(X2), F30 - MOVD 440(X2), F29 - MOVD 432(X2), F28 - MOVD 424(X2), F27 - MOVD 416(X2), F26 - MOVD 408(X2), F25 - MOVD 400(X2), F24 - MOVD 392(X2), F23 - MOVD 384(X2), F22 - MOVD 376(X2), F21 - MOVD 368(X2), F20 - MOVD 360(X2), F19 - MOVD 352(X2), F18 - MOVD 344(X2), F17 - MOVD 336(X2), F16 - MOVD 328(X2), F15 - MOVD 320(X2), F14 - MOVD 312(X2), F13 - MOVD 304(X2), F12 - MOVD 296(X2), F11 - MOVD 288(X2), F10 - MOVD 280(X2), F9 - MOVD 272(X2), F8 - MOVD 264(X2), F7 - MOVD 256(X2), F6 - MOVD 248(X2), F5 - MOVD 240(X2), F4 - MOVD 232(X2), F3 - MOVD 224(X2), F2 - MOVD 216(X2), F1 - MOVD 208(X2), F0 - MOV 200(X2), X30 - MOV 192(X2), X29 - MOV 184(X2), X28 - MOV 176(X2), X26 - MOV 168(X2), X25 - MOV 160(X2), X24 - MOV 152(X2), X23 - MOV 144(X2), X22 - MOV 136(X2), X21 - MOV 128(X2), X20 - MOV 120(X2), X19 - MOV 112(X2), X18 - MOV 104(X2), X17 - MOV 96(X2), X16 - MOV 88(X2), X15 - MOV 80(X2), X14 - MOV 72(X2), X13 - MOV 64(X2), X12 - MOV 56(X2), X11 - MOV 48(X2), X10 - MOV 40(X2), X9 - MOV 32(X2), X8 + MOVD 448(X2), F31 + MOVD 440(X2), F30 + MOVD 432(X2), F29 + MOVD 424(X2), F28 + MOVD 416(X2), F27 + MOVD 408(X2), F26 + MOVD 400(X2), F25 + MOVD 392(X2), F24 + MOVD 384(X2), F23 + MOVD 376(X2), F22 + MOVD 368(X2), F21 + MOVD 360(X2), F20 + MOVD 352(X2), F19 + MOVD 344(X2), F18 + MOVD 336(X2), F17 + MOVD 328(X2), F16 + MOVD 320(X2), F15 + MOVD 312(X2), F14 + MOVD 304(X2), F13 + MOVD 296(X2), F12 + MOVD 288(X2), F11 + MOVD 280(X2), F10 + MOVD 272(X2), F9 + MOVD 264(X2), F8 + MOVD 256(X2), F7 + MOVD 248(X2), F6 + MOVD 240(X2), F5 + MOVD 232(X2), F4 + MOVD 224(X2), F3 + MOVD 216(X2), F2 + MOVD 208(X2), F1 + MOVD 200(X2), F0 + MOV 192(X2), X30 + MOV 184(X2), X29 + MOV 176(X2), X28 + MOV 168(X2), X26 + MOV 160(X2), X25 + MOV 152(X2), X24 + MOV 144(X2), X23 + MOV 136(X2), X22 + MOV 128(X2), X21 + MOV 120(X2), X20 + MOV 112(X2), X19 + MOV 104(X2), X18 + MOV 96(X2), X17 + MOV 88(X2), X16 + MOV 80(X2), X15 + MOV 72(X2), X14 + MOV 64(X2), X13 + MOV 56(X2), X12 + MOV 48(X2), X11 + MOV 40(X2), X10 + MOV 32(X2), X9 MOV 24(X2), X7 MOV 16(X2), X6 MOV 8(X2), X5 MOV 464(X2), X1 + MOV -8(X2), X8 MOV (X2), X31 - ADD $472, X2 + ADD $480, X2 JMP (X31) + diff --git a/src/runtime/proc.go b/src/runtime/proc.go index 005c875cbf1801..d1b3afe9f948e9 100644 --- a/src/runtime/proc.go +++ b/src/runtime/proc.go @@ -5339,7 +5339,7 @@ func newproc1(fn *funcval, callergp *g, callerpc uintptr, parked bool, waitreaso *(*uintptr)(unsafe.Pointer(sp)) = 0 prepGoExitFrame(sp) } - if GOARCH == "arm64" { + if GOARCH == "arm64" || GOARCH == "riscv64" { // caller's FP *(*uintptr)(unsafe.Pointer(sp - goarch.PtrSize)) = 0 } diff --git a/src/runtime/race_riscv64.s b/src/runtime/race_riscv64.s index 26ea43420c1630..bd47789b908763 100644 --- a/src/runtime/race_riscv64.s +++ b/src/runtime/race_riscv64.s @@ -374,7 +374,7 @@ TEXT racecallatomic<>(SB), NOSPLIT, $0 // X13 = addr of incoming arg list // Trigger SIGSEGV early. - MOV 24(X2), X6 // 1st arg is addr. after two times CALL, get it at 24(X2) + MOV 40(X2), X6 // 1st arg is addr. after two times CALL, get it at 40(X2) MOVB (X6), X0 // segv here if addr is bad // Check that addr is within [arenastart, arenaend) or within [racedatastart, racedataend). MOV runtime·racearenastart(SB), X7 @@ -389,9 +389,9 @@ racecallatomic_data: racecallatomic_ok: // Addr is within the good range, call the atomic function. MOV g_racectx(g), X10 // goroutine context - MOV 8(X2), X11 // caller pc + MOV 16(X2), X11 // caller pc MOV X1, X12 // pc - ADD $24, X2, X13 + ADD $40, X2, X13 CALL racecall<>(SB) RET racecallatomic_ignore: @@ -406,9 +406,9 @@ racecallatomic_ignore: MOV X21, X23 // restore the target function // Call the atomic function. MOV g_racectx(g), X10 // goroutine context - MOV 8(X2), X11 // caller pc + MOV 16(X2), X11 // caller pc MOV X20, X12 // pc - ADD $24, X2, X13 // arguments + ADD $40, X2, X13 // arguments CALL racecall<>(SB) // Call __tsan_go_ignore_sync_end. MOV $__tsan_go_ignore_sync_end(SB), X23 @@ -444,6 +444,10 @@ TEXT racecall<>(SB), NOSPLIT|NOFRAME, $0-0 MOV (g_sched+gobuf_sp)(X7), X2 // Switch to g0 stack call: + // Decrement SP past where the frame pointer is saved in the Go riscv64 + // ABI (one word below the stack pointer) so the race detector library + // code doesn't clobber it. + SUB $8, X2 JALR RA, (X23) // Call C function MOV X19, X2 // Restore SP JMP (X18) // Return to Go. diff --git a/src/runtime/runtime2.go b/src/runtime/runtime2.go index be33932b24d160..8e19a848ec67b6 100644 --- a/src/runtime/runtime2.go +++ b/src/runtime/runtime2.go @@ -1502,7 +1502,7 @@ var ( ) // Must agree with internal/buildcfg.FramePointerEnabled. -const framepointer_enabled = GOARCH == "amd64" || GOARCH == "arm64" +const framepointer_enabled = GOARCH == "amd64" || GOARCH == "arm64" || GOARCH == "riscv64" // getcallerfp returns the frame pointer of the caller of the caller // of this function. @@ -1512,8 +1512,16 @@ const framepointer_enabled = GOARCH == "amd64" || GOARCH == "arm64" func getcallerfp() uintptr { fp := getfp() // This frame's FP. if fp != 0 { - fp = *(*uintptr)(unsafe.Pointer(fp)) // The caller's FP. - fp = *(*uintptr)(unsafe.Pointer(fp)) // The caller's caller's FP. + if GOARCH == "riscv64" { + // On RISC-V, FP (S0) points to SP+8. + // The caller's FP is saved at SP-8, which is fp-16. + fp = *(*uintptr)(unsafe.Pointer(fp - 16)) // The caller's FP. + fp = *(*uintptr)(unsafe.Pointer(fp - 16)) // The caller's caller's FP. + } else { + // On ARM64/AMD64, FP points exactly to the saved FP. + fp = *(*uintptr)(unsafe.Pointer(fp)) // The caller's FP. + fp = *(*uintptr)(unsafe.Pointer(fp)) // The caller's caller's FP. + } } return fp } diff --git a/src/runtime/signal_riscv64.go b/src/runtime/signal_riscv64.go index 8acd34ce2a2bf6..5194f40b0f9cc7 100644 --- a/src/runtime/signal_riscv64.go +++ b/src/runtime/signal_riscv64.go @@ -63,10 +63,15 @@ func (c *sigctxt) preparePanic(sig uint32, gp *g) { // functions are correctly handled. This smashes // the stack frame but we're not going back there // anyway. - sp := c.sp() - goarch.PtrSize + sp := c.sp() - 2*goarch.PtrSize c.set_sp(sp) *(*uint64)(unsafe.Pointer(uintptr(sp))) = c.ra() - + // Make sure a valid frame pointer is saved on the stack so that the + // frame pointer checks in adjustframe are happy, if they're enabled. + // Frame pointer unwinding won't visit the sigpanic frame, since + // sigpanic will save the same frame pointer before calling into a panic + // function. + *(*uint64)(unsafe.Pointer(uintptr(sp - goarch.PtrSize))) = c.s0() pc := gp.sigpc if shouldPushSigpanic(gp, pc, uintptr(c.ra())) { @@ -84,9 +89,13 @@ func (c *sigctxt) pushCall(targetPC, resumePC uintptr) { // push the call. The function being pushed is responsible // for restoring the LR and setting the SP back. // This extra slot is known to gentraceback. - sp := c.sp() - goarch.PtrSize + sp := c.sp() - 2*goarch.PtrSize c.set_sp(sp) *(*uint64)(unsafe.Pointer(uintptr(sp))) = c.ra() + // Make sure a valid frame pointer is saved on the stack so that the + // frame pointer checks in adjustframe are happy, if they're enabled. + // This is not actually used for unwinding. + *(*uint64)(unsafe.Pointer(uintptr(sp - goarch.PtrSize))) = c.s0() // Set up PC and LR to pretend the function being signaled // calls targetPC at resumePC. c.set_ra(uint64(resumePC)) diff --git a/src/runtime/stack.go b/src/runtime/stack.go index 6f89cc142c39f0..9c18a553b68c9c 100644 --- a/src/runtime/stack.go +++ b/src/runtime/stack.go @@ -709,7 +709,7 @@ func adjustframe(frame *stkframe, adjinfo *adjustinfo) { } // Adjust saved frame pointer if there is one. - if (goarch.ArchFamily == goarch.AMD64 || goarch.ArchFamily == goarch.ARM64) && frame.argp-frame.varp == 2*goarch.PtrSize { + if (goarch.ArchFamily == goarch.AMD64 || goarch.ArchFamily == goarch.ARM64 || goarch.ArchFamily == goarch.RISCV64) && frame.argp-frame.varp == 2*goarch.PtrSize { if stackDebug >= 3 { print(" saved bp\n") } @@ -725,8 +725,8 @@ func adjustframe(frame *stkframe, adjinfo *adjustinfo) { } // On AMD64, this is the caller's frame pointer saved in the current // frame. - // On ARM64, this is the frame pointer of the caller's caller saved - // by the caller in its frame (one word below its SP). + // On ARM64 and RISCV64, this is the frame pointer of the caller's + // caller saved by the caller in its frame (one word below its SP). adjustpointer(adjinfo, unsafe.Pointer(frame.varp)) } @@ -796,6 +796,15 @@ func adjustctxt(gp *g, adjinfo *adjustinfo) { memmove(unsafe.Pointer(gp.sched.bp), unsafe.Pointer(oldfp), goarch.PtrSize) adjustpointer(adjinfo, unsafe.Pointer(gp.sched.bp)) } + } else if GOARCH == "riscv64" { + // On RISCV64, the frame pointer (S0/X8) points one word above SP, + // while the frame pointer is saved one word *below* SP. + if oldfp == gp.sched.sp+goarch.PtrSize { + oldlink := oldfp - 2*goarch.PtrSize + newlink := gp.sched.bp - 2*goarch.PtrSize + memmove(unsafe.Pointer(newlink), unsafe.Pointer(oldlink), goarch.PtrSize) + adjustpointer(adjinfo, unsafe.Pointer(newlink)) + } } } diff --git a/src/runtime/stubs_riscv64.go b/src/runtime/stubs_riscv64.go index 2306ba878b0253..e1f91cda1a2cf4 100644 --- a/src/runtime/stubs_riscv64.go +++ b/src/runtime/stubs_riscv64.go @@ -22,6 +22,4 @@ func unspillArgs() // getfp returns the frame pointer register of its caller or 0 if not implemented. // TODO: Make this a compiler intrinsic -// -//go:nosplit -func getfp() uintptr { return 0 } +func getfp() uintptr diff --git a/src/runtime/traceback.go b/src/runtime/traceback.go index 1c6f24c0332a75..e0857487a09d67 100644 --- a/src/runtime/traceback.go +++ b/src/runtime/traceback.go @@ -501,7 +501,11 @@ func (u *unwinder) next() { // before faking a call. if usesLR && injectedCall { x := *(*uintptr)(unsafe.Pointer(frame.sp)) - frame.sp += alignUp(sys.MinFrameSize, sys.StackAlign) + if goarch.ArchFamily == goarch.RISCV64 && framepointer_enabled { + frame.sp += 2 * goarch.PtrSize + } else { + frame.sp += alignUp(sys.MinFrameSize, sys.StackAlign) + } f = findfunc(frame.pc) frame.fn = f if !f.valid() { diff --git a/src/runtime/tracestack.go b/src/runtime/tracestack.go index d3f217bbacedc8..3380647f1e3a3d 100644 --- a/src/runtime/tracestack.go +++ b/src/runtime/tracestack.go @@ -257,7 +257,7 @@ func makeTraceFrame(gen uintptr, f Frame) traceFrame { // tracefpunwindoff returns true if frame pointer unwinding for the tracer is // disabled via GODEBUG or not supported by the architecture. func tracefpunwindoff() bool { - return debug.tracefpunwindoff != 0 || (goarch.ArchFamily != goarch.AMD64 && goarch.ArchFamily != goarch.ARM64) + return debug.tracefpunwindoff != 0 || (goarch.ArchFamily != goarch.AMD64 && goarch.ArchFamily != goarch.ARM64 && goarch.ArchFamily != goarch.RISCV64) } // fpTracebackPCs populates pcBuf with the return addresses for each frame and @@ -266,10 +266,18 @@ func tracefpunwindoff() bool { // B, this will return a PC for only B. func fpTracebackPCs(fp unsafe.Pointer, pcBuf []uintptr) (i int) { for i = 0; i < len(pcBuf) && fp != nil; i++ { - // return addr sits one word above the frame pointer - pcBuf[i] = *(*uintptr)(unsafe.Pointer(uintptr(fp) + goarch.PtrSize)) - // follow the frame pointer to the next one - fp = unsafe.Pointer(*(*uintptr)(fp)) + if GOARCH == "riscv64" { + // On RISC-V, the frame pointer (FP) points to SP+PtrSize. + // The return address (LR) is at SP+0, which is fp-PtrSize. + pcBuf[i] = *(*uintptr)(unsafe.Pointer(uintptr(fp) - goarch.PtrSize)) + // The saved caller FP is at SP-PtrSize, which is fp-2*PtrSize. + fp = unsafe.Pointer(*(*uintptr)(unsafe.Pointer(uintptr(fp) - 2*goarch.PtrSize))) + } else { + // return addr sits one word above the frame pointer + pcBuf[i] = *(*uintptr)(unsafe.Pointer(uintptr(fp) + goarch.PtrSize)) + // follow the frame pointer to the next one + fp = unsafe.Pointer(*(*uintptr)(fp)) + } } return i } diff --git a/test/nosplit.go b/test/nosplit.go index 4b4c93b1d067c5..c2a965b7456040 100644 --- a/test/nosplit.go +++ b/test/nosplit.go @@ -146,7 +146,7 @@ start 104 nosplit; REJECT ppc64 ppc64le arm64 start 108 nosplit; REJECT ppc64 ppc64le start 112 nosplit; REJECT ppc64 ppc64le arm64 start 116 nosplit; REJECT ppc64 ppc64le -start 120 nosplit; REJECT ppc64 ppc64le amd64 arm64 +start 120 nosplit; REJECT ppc64 ppc64le amd64 arm64 riscv64 start 124 nosplit; REJECT ppc64 ppc64le amd64 start 128 nosplit; REJECT start 132 nosplit; REJECT @@ -164,7 +164,7 @@ start 104 nosplit call f; f 0 nosplit; REJECT ppc64 ppc64le arm64 start 108 nosplit call f; f 0 nosplit; REJECT ppc64 ppc64le start 112 nosplit call f; f 0 nosplit; REJECT ppc64 ppc64le amd64 arm64 start 116 nosplit call f; f 0 nosplit; REJECT ppc64 ppc64le amd64 -start 120 nosplit call f; f 0 nosplit; REJECT ppc64 ppc64le amd64 arm64 +start 120 nosplit call f; f 0 nosplit; REJECT ppc64 ppc64le amd64 arm64 riscv64 start 124 nosplit call f; f 0 nosplit; REJECT ppc64 ppc64le amd64 386 start 128 nosplit call f; f 0 nosplit; REJECT start 132 nosplit call f; f 0 nosplit; REJECT @@ -180,7 +180,7 @@ start 104 nosplit call f; f 0 call f; REJECT ppc64 ppc64le amd64 arm64 start 108 nosplit call f; f 0 call f; REJECT ppc64 ppc64le amd64 start 112 nosplit call f; f 0 call f; REJECT ppc64 ppc64le amd64 arm64 start 116 nosplit call f; f 0 call f; REJECT ppc64 ppc64le amd64 -start 120 nosplit call f; f 0 call f; REJECT ppc64 ppc64le amd64 386 arm64 +start 120 nosplit call f; f 0 call f; REJECT ppc64 ppc64le amd64 386 arm64 riscv64 start 124 nosplit call f; f 0 call f; REJECT ppc64 ppc64le amd64 386 start 128 nosplit call f; f 0 call f; REJECT start 132 nosplit call f; f 0 call f; REJECT @@ -193,7 +193,7 @@ start 104 nosplit callind; REJECT ppc64 ppc64le amd64 arm64 start 108 nosplit callind; REJECT ppc64 ppc64le amd64 start 112 nosplit callind; REJECT ppc64 ppc64le amd64 arm64 start 116 nosplit callind; REJECT ppc64 ppc64le amd64 -start 120 nosplit callind; REJECT ppc64 ppc64le amd64 386 arm64 +start 120 nosplit callind; REJECT ppc64 ppc64le amd64 386 arm64 riscv64 start 124 nosplit callind; REJECT ppc64 ppc64le amd64 386 start 128 nosplit callind; REJECT start 132 nosplit callind; REJECT From 0c0a5a5e0a8aa1e17008ae510384088032d4956e Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Thu, 13 Aug 2026 21:09:06 +0800 Subject: [PATCH 03/19] not use X8 in assemble file --- .../fips140/nistec/fiat/p256_riscv64.s | 69 ++++++++++--------- src/hash/crc32/crc32_riscv64.s | 42 ++++++----- 2 files changed, 59 insertions(+), 52 deletions(-) diff --git a/src/crypto/internal/fips140/nistec/fiat/p256_riscv64.s b/src/crypto/internal/fips140/nistec/fiat/p256_riscv64.s index 4e2471d8c3e657..d24458aa4af006 100644 --- a/src/crypto/internal/fips140/nistec/fiat/p256_riscv64.s +++ b/src/crypto/internal/fips140/nistec/fiat/p256_riscv64.s @@ -23,7 +23,8 @@ GLOBL p256const1<>(SB), RODATA, $8 // X21-X24 = acc0-acc3 (accumulator low bits) // X25-X26, X28-X29 = acc4-acc7 (accumulator high bits) // X30 = const1 = 0xFFFFFFFF00000001 -// X5-X9, X12 = temporary variables +// X5-X7, X9, X12, X31 = temporary variables +// Note: X8 (S0/FP) is reserved for frame pointer and not used as temporary TEXT ·p256Mul(SB),NOSPLIT,$0-24 MOV out+0(FP), X10 MOV a+8(FP), X11 @@ -76,7 +77,7 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 // ===================================== SLL $32, X21, X5 // t0 = acc0 << 32 SRL $32, X21, X7 // t1 = acc0 >> 32 - MUL X21, X30, X8 // t2 = lo(acc0 * const1) + MUL X21, X30, X31 // t2 = lo(acc0 * const1) MULHU X21, X30, X21 // acc0 = hi(acc0 * const1) ADD X22, X5, X22 @@ -88,8 +89,8 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 SLTU X6, X23, X5 ADD X9, X5, X6 - ADD X24, X8, X24 - SLTU X8, X24, X9 + ADD X24, X31, X24 + SLTU X31, X24, X9 ADD X24, X6, X24 SLTU X6, X24, X5 ADD X9, X5, X6 @@ -100,7 +101,7 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 // Round 1: y[1] * x // ===================================== MULHU X18, X13, X7 - MULHU X18, X14, X8 + MULHU X18, X14, X31 MULHU X18, X15, X9 MULHU X18, X16, X26 @@ -134,8 +135,8 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 ADD X23, X7, X23 SLTU X7, X23, X6 - ADD X24, X8, X24 - SLTU X8, X24, X5 + ADD X24, X31, X24 + SLTU X31, X24, X5 ADD X24, X6, X24 SLTU X6, X24, X12 ADD X5, X12, X6 @@ -154,7 +155,7 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 // ===================================== SLL $32, X22, X5 SRL $32, X22, X7 - MUL X22, X30, X8 + MUL X22, X30, X31 MULHU X22, X30, X22 ADD X23, X5, X23 @@ -166,8 +167,8 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 SLTU X6, X24, X5 ADD X9, X5, X6 - ADD X21, X8, X21 - SLTU X8, X21, X9 + ADD X21, X31, X21 + SLTU X31, X21, X9 ADD X21, X6, X21 SLTU X6, X21, X5 ADD X9, X5, X6 @@ -178,7 +179,7 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 // Round 2: y[2] * x // ===================================== MULHU X19, X13, X7 - MULHU X19, X14, X8 + MULHU X19, X14, X31 MULHU X19, X15, X9 MULHU X19, X16, X28 @@ -212,8 +213,8 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 ADD X24, X7, X24 SLTU X7, X24, X6 - ADD X25, X8, X25 - SLTU X8, X25, X5 + ADD X25, X31, X25 + SLTU X31, X25, X5 ADD X25, X6, X25 SLTU X6, X25, X12 ADD X5, X12, X6 @@ -234,7 +235,7 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 // ===================================== SLL $32, X23, X5 SRL $32, X23, X7 - MUL X23, X30, X8 + MUL X23, X30, X31 MULHU X23, X30, X23 ADD X24, X5, X24 @@ -246,8 +247,8 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 SLTU X6, X21, X5 ADD X9, X5, X6 - ADD X22, X8, X22 - SLTU X8, X22, X9 + ADD X22, X31, X22 + SLTU X31, X22, X9 ADD X22, X6, X22 SLTU X6, X22, X5 ADD X9, X5, X6 @@ -258,7 +259,7 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 // Round 3: y[3] * x // ===================================== MULHU X20, X13, X7 - MULHU X20, X14, X8 + MULHU X20, X14, X31 MULHU X20, X15, X9 MULHU X20, X16, X29 @@ -292,8 +293,8 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 ADD X25, X7, X25 SLTU X7, X25, X6 - ADD X26, X8, X26 - SLTU X8, X26, X5 + ADD X26, X31, X26 + SLTU X31, X26, X5 ADD X26, X6, X26 SLTU X6, X26, X7 ADD X5, X7, X6 @@ -312,7 +313,7 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 // ===================================== SLL $32, X24, X5 SRL $32, X24, X7 - MUL X24, X30, X8 + MUL X24, X30, X31 MULHU X24, X30, X24 ADD X21, X5, X21 @@ -324,8 +325,8 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 SLTU X6, X22, X5 ADD X9, X5, X6 - ADD X23, X8, X23 - SLTU X8, X23, X9 + ADD X23, X31, X23 + SLTU X31, X23, X9 ADD X23, X6, X23 SLTU X6, X23, X5 ADD X9, X5, X6 @@ -368,10 +369,10 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 SLTU X6, X21, X7 // X7 = b0 = (acc0 < p0) // Step 2: t1, b1 = Sub64(acc1, p1, b0) - SUB X5, X22, X8 // X8 = tmp = acc1 - const0 + SUB X5, X22, X31 // X31 = tmp = acc1 - const0 SLTU X5, X22, X9 // X9 = (acc1 < const0) - SUB X7, X8, X14 // X14 = t1 = tmp - b0 - SLTU X7, X8, X12 // X12 = (tmp < b0) + SUB X7, X31, X14 // X14 = t1 = tmp - b0 + SLTU X7, X31, X12 // X12 = (tmp < b0) OR X9, X12, X7 // X7 = b1 // Step 3: t2, b2 = Sub64(acc2, 0, b1) @@ -379,33 +380,33 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 SLTU X7, X23, X7 // X7 = b2 = (acc2 < b1) // Step 4: t3, b3 = Sub64(acc3, p3, b2) - SUB X30, X24, X8 // X8 = tmp = acc3 - const1 + SUB X30, X24, X31 // X31 = tmp = acc3 - const1 SLTU X30, X24, X9 // X9 = (acc3 < const1) - SUB X7, X8, X16 // X16 = t3 = tmp - b2 - SLTU X7, X8, X12 // X12 = (tmp < b2) + SUB X7, X31, X16 // X16 = t3 = tmp - b2 + SLTU X7, X31, X12 // X12 = (tmp < b2) OR X9, X12, X7 // X7 = b3 // Step 5: final_borrow = (carry < b3) - SLTU X7, X25, X8 // X8 = (carry < b3) = final_borrow + SLTU X7, X25, X31 // X31 = (carry < b3) = final_borrow // Conditional select: mask = final_borrow ? -1 : 0 - NEG X8, X8 // X8 = mask + NEG X31, X31 // X31 = mask // Select result XOR X21, X13, X9 - AND X8, X9, X9 + AND X31, X9, X9 XOR X9, X13, X13 XOR X22, X14, X9 - AND X8, X9, X9 + AND X31, X9, X9 XOR X9, X14, X14 XOR X23, X15, X9 - AND X8, X9, X9 + AND X31, X9, X9 XOR X9, X15, X15 XOR X24, X16, X9 - AND X8, X9, X9 + AND X31, X9, X9 XOR X9, X16, X16 // Write result diff --git a/src/hash/crc32/crc32_riscv64.s b/src/hash/crc32/crc32_riscv64.s index 8a107f1ff8223e..7a3c06985ca13c 100644 --- a/src/hash/crc32/crc32_riscv64.s +++ b/src/hash/crc32/crc32_riscv64.s @@ -11,6 +11,10 @@ // 2. Fold each subsequent 16-byte block using carry-less multiplication // 3. Final fold: reduce 128-bit accumulator to 64 bits // 4. Barrett reduction: reduce 64 bits to 32-bit CRC +// +// Register usage (frame-pointer compatible): +// X5-X7, X9-X28 = general purpose / temporary registers +// X8 (S0/FP) is NOT used to avoid conflict with frame pointer #include "textflag.h" @@ -60,20 +64,21 @@ TEXT ·ieeeUpdateCLMUL(SB), NOSPLIT, $0-36 MOV p_len+16(FP), X7 // len(p) // Load first 16 bytes of data - MOV (X6), X8 // t0 = low 64 bits + // Note: Using X28 instead of X8 to avoid conflict with frame pointer (S0/X8) + MOV (X6), X28 // t0 = low 64 bits MOV 8(X6), X9 // t1 = high 64 bits ADD $16, X6 ADD $-16, X7 // XOR CRC seed into the low word of the first block - XOR X5, X8, X8 + XOR X5, X28, X28 // Load fold constants: K2 (high), K1 (low) MOV ieee_fold<>+0(SB), X10 // K2 MOV ieee_fold<>+8(SB), X11 // K1 // Main fold loop: process 16 bytes per iteration. - // We fold the 128-bit accumulator (X8, X9) with each new 16-byte block. + // We fold the 128-bit accumulator (X28, X9) with each new 16-byte block. MOV $16, X12 ieee_fold_loop: BLT X7, X12, ieee_fold_done @@ -87,21 +92,21 @@ ieee_fold_loop: // Carry-less multiply fold: // new_low = clmul(K1, t0) XOR clmul(K2, t1) XOR d0 // new_high = clmulh(K1, t0) XOR clmulh(K2, t1) XOR d1 - CLMUL X11, X8, X15 // clmul(K1, t0) → low result - CLMULH X11, X8, X16 // clmulh(K1, t0) → high result + CLMUL X11, X28, X15 // clmul(K1, t0) → low result + CLMULH X11, X28, X16 // clmulh(K1, t0) → high result CLMUL X10, X9, X17 // clmul(K2, t1) → low result CLMULH X10, X9, X18 // clmulh(K2, t1) → high result // Combine fold results with new data - XOR X15, X17, X8 // t0 = fold_low - XOR X8, X13, X8 // t0 ^= d0 + XOR X15, X17, X28 // t0 = fold_low + XOR X28, X13, X28 // t0 ^= d0 XOR X16, X18, X9 // t1 = fold_high XOR X9, X14, X9 // t1 ^= d1 JMP ieee_fold_loop ieee_fold_done: - // (X8, X9) = (t0, t1) holds the folded 128-bit accumulator. + // (X28, X9) = (t0, t1) holds the folded 128-bit accumulator. // Now reduce 128 bits → 64 bits → 32 bits. // Load final reduction constants @@ -117,8 +122,8 @@ ieee_fold_done: // high32 = t1 >> 32 // f = clmul(low32, const_low) // result = (t3h << 32) XOR high32 XOR f - CLMUL X11, X8, X12 // t4 = clmul(t0, const_high) - CLMULH X11, X8, X13 // t3h = clmulh(t0, const_high) + CLMUL X11, X28, X12 // t4 = clmul(t0, const_high) + CLMULH X11, X28, X13 // t3h = clmulh(t0, const_high) XOR X9, X12, X9 // t1 = t1 XOR t4 // Extract low 32 and high 32 bits from t1 @@ -158,13 +163,14 @@ TEXT ·castagnoliUpdateCLMUL(SB), NOSPLIT, $0-36 MOV p_len+16(FP), X7 // len(p) // Load first 16 bytes of data - MOV (X6), X8 // t0 = low 64 bits + // Note: Using X28 instead of X8 to avoid conflict with frame pointer (S0/X8) + MOV (X6), X28 // t0 = low 64 bits MOV 8(X6), X9 // t1 = high 64 bits ADD $16, X6 ADD $-16, X7 // XOR CRC seed into the low word of the first block - XOR X5, X8, X8 + XOR X5, X28, X28 // Load fold constants: K2 (high), K1 (low) MOV cast_fold<>+0(SB), X10 // K2 @@ -182,14 +188,14 @@ cast_fold_loop: ADD $-16, X7 // Carry-less multiply fold - CLMUL X11, X8, X15 // clmul(K1, t0) - CLMULH X11, X8, X16 // clmulh(K1, t0) + CLMUL X11, X28, X15 // clmul(K1, t0) + CLMULH X11, X28, X16 // clmulh(K1, t0) CLMUL X10, X9, X17 // clmul(K2, t1) CLMULH X10, X9, X18 // clmulh(K2, t1) // Combine fold results with new data - XOR X15, X17, X8 // t0 = fold_low - XOR X8, X13, X8 // t0 ^= d0 + XOR X15, X17, X28 // t0 = fold_low + XOR X28, X13, X28 // t0 ^= d0 XOR X16, X18, X9 // t1 = fold_high XOR X9, X14, X9 // t1 ^= d1 @@ -201,8 +207,8 @@ cast_fold_done: MOV cast_reduce<>+8(SB), X11 // const_high // 128-bit → 64-bit folding - CLMUL X11, X8, X12 // t4 = clmul(t0, const_high) - CLMULH X11, X8, X13 // t3h = clmulh(t0, const_high) + CLMUL X11, X28, X12 // t4 = clmul(t0, const_high) + CLMULH X11, X28, X13 // t3h = clmulh(t0, const_high) XOR X9, X12, X9 // t1 = t1 XOR t4 MOV mask32<>(SB), X20 // X20 = 0xFFFFFFFF From 9cb8433ee7adf7ee29191e474cf31e2cb2af886f Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Fri, 14 Aug 2026 13:52:31 +0800 Subject: [PATCH 04/19] not use X8 in sha256block_riscv64.s --- src/crypto/internal/fips140/sha256/sha256block_riscv64.s | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/crypto/internal/fips140/sha256/sha256block_riscv64.s b/src/crypto/internal/fips140/sha256/sha256block_riscv64.s index f9c0d0a66538c7..e79567436aa9d9 100644 --- a/src/crypto/internal/fips140/sha256/sha256block_riscv64.s +++ b/src/crypto/internal/fips140/sha256/sha256block_riscv64.s @@ -648,11 +648,12 @@ blockloop: // Scalar load to avoid index ambiguity (corrected offsets) // Layout in scratch: 0:f,4:e,8:b,12:a,16:h,20:g,24:d,28:c // Use indexed gather to reorder scratch {f,e,b,a,h,g,d,c} -> {a,b,c,d,e,f,g,h} - MOV $index_final<>(SB), X8 - VLE32V (X8), V31 + // Note: Use X9 instead of X8 to avoid clobbering the frame pointer (S0/X8). + MOV $index_final<>(SB), X9 + VLE32V (X9), V31 VLUXEI32V (X6), V31, V3 // V3 = {a,b,c,d} - MOV $index_final<>+16(SB), X8 - VLE32V (X8), V31 + MOV $index_final<>+16(SB), X9 + VLE32V (X9), V31 VLUXEI32V (X6), V31, V4 // V4 = {e,f,g,h} VADDVV V1, V3, V1 From 18ff5498e520818bc8dd53407b416e50c37a5b5a Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Fri, 14 Aug 2026 15:03:04 +0800 Subject: [PATCH 05/19] add build log --- .github/workflows/all.bash in milkv-pioneer.yml | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/.github/workflows/all.bash in milkv-pioneer.yml b/.github/workflows/all.bash in milkv-pioneer.yml index 0cfe9a3643c5b7..1f95d83d656c83 100644 --- a/.github/workflows/all.bash in milkv-pioneer.yml +++ b/.github/workflows/all.bash in milkv-pioneer.yml @@ -34,4 +34,11 @@ jobs: # build toolchain cd "$GITHUB_WORKSPACE/src" - ./all.bash + { set -x; ./all.bash -v; } 2>&1 | tee build.log + - name: Upload build log on failure + if: failure() + uses: actions/upload-artifact@v4 + with: + name: build-log + path: ${{ github.workspace }}/build.log + retention-days: 7 From 43297e49069ff0e1236d2fa2dc67a328ab776b41 Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Fri, 14 Aug 2026 15:30:36 +0800 Subject: [PATCH 06/19] fix log path --- .../workflows/all.bash in milkv-pioneer.yml | 8 +- .github/workflows/go vet.yml | 184 +++++++++--------- .../workflows/test all in amd64 ubuntu.yml | 20 +- .../workflows/test all in arm64 ubuntu.yml | 22 +-- 4 files changed, 117 insertions(+), 117 deletions(-) diff --git a/.github/workflows/all.bash in milkv-pioneer.yml b/.github/workflows/all.bash in milkv-pioneer.yml index 1f95d83d656c83..62d9d81e7ee19b 100644 --- a/.github/workflows/all.bash in milkv-pioneer.yml +++ b/.github/workflows/all.bash in milkv-pioneer.yml @@ -27,18 +27,18 @@ jobs: set -euxo pipefail BOOT=/tmp/go-bootstrap rm -rf "$BOOT" - curl -fsSL https://go.dev/dl/go1.25.0.linux-riscv64.tar.gz -o /tmp/go.tar.gz + curl -fsSL https://go.dev/dl/go1.26.5.linux-riscv64.tar.gz -o /tmp/go.tar.gz tar -C /tmp -xzf /tmp/go.tar.gz mv /tmp/go "$BOOT" export GOROOT_BOOTSTRAP="$BOOT" # build toolchain cd "$GITHUB_WORKSPACE/src" - { set -x; ./all.bash -v; } 2>&1 | tee build.log + ./all.bash 2>&1 | tee build.log - name: Upload build log on failure if: failure() uses: actions/upload-artifact@v4 with: name: build-log - path: ${{ github.workspace }}/build.log - retention-days: 7 + path: src/build.log + retention-days: 2 diff --git a/.github/workflows/go vet.yml b/.github/workflows/go vet.yml index 65a6706bacdcd5..20731522f681b9 100644 --- a/.github/workflows/go vet.yml +++ b/.github/workflows/go vet.yml @@ -14,102 +14,102 @@ jobs: - name: Build toolchain and test (host amd64) run: | - # install bootstrap Go - set -euxo pipefail - BOOT=/tmp/go-bootstrap - curl -fsSL https://go.dev/dl/go1.25.0.linux-amd64.tar.gz -o /tmp/go.tar.gz - tar -C /tmp -xzf /tmp/go.tar.gz - mv /tmp/go "$BOOT" - export GOROOT_BOOTSTRAP="$BOOT" + # # install bootstrap Go + # set -euxo pipefail + # BOOT=/tmp/go-bootstrap + # curl -fsSL https://go.dev/dl/go1.25.0.linux-amd64.tar.gz -o /tmp/go.tar.gz + # tar -C /tmp -xzf /tmp/go.tar.gz + # mv /tmp/go "$BOOT" + # export GOROOT_BOOTSTRAP="$BOOT" - # build toolchain - cd "$GITHUB_WORKSPACE/src" - ./make.bash - # run go vet only on packages with changed Go files under src/ relative to PR base - export GOROOT="$GITHUB_WORKSPACE" - cd "$GITHUB_WORKSPACE" - # Determine base commit for PR; fallback to origin/${GITHUB_BASE_REF:-main} - BASE_SHA="${{ github.event.pull_request.base.sha }}" - if [ -z "${BASE_SHA}" ]; then - git fetch --no-tags origin "+refs/heads/*:refs/remotes/origin/*" - BASE_REF="${GITHUB_BASE_REF:-main}" - BASE_SHA="origin/${BASE_REF}" - fi - # Collect changed .go files under src/ - mapfile -t CHANGED < <(git diff --name-only --diff-filter=ACMRT "${BASE_SHA}" HEAD -- '*.go' | grep -E '^src/' || true) - if [ ${#CHANGED[@]} -eq 0 ]; then - echo "No changed Go files under src/; skipping vet." - exit 0 - fi - # Derive unique package directories relative to src/ - mapfile -t PKG_DIRS < <(printf '%s\n' "${CHANGED[@]}" | sed 's|^src/||' | xargs -r -n1 dirname | sort -u) - cd "$GOROOT/src" - ok_dirs=() - for d in "${PKG_DIRS[@]}"; do - # Filter to valid packages (go list must succeed) - if GO111MODULE=off "$GOROOT/bin/go" list "./$d" >/dev/null 2>&1; then - ok_dirs+=("./$d") - fi - done - if [ ${#ok_dirs[@]} -eq 0 ]; then - echo "No valid Go packages to vet; exiting." - exit 0 - fi - echo "Vetting packages:" - printf '%s\n' "${ok_dirs[@]}" + # # build toolchain + # cd "$GITHUB_WORKSPACE/src" + # ./make.bash + # # run go vet only on packages with changed Go files under src/ relative to PR base + # export GOROOT="$GITHUB_WORKSPACE" + # cd "$GITHUB_WORKSPACE" + # # Determine base commit for PR; fallback to origin/${GITHUB_BASE_REF:-main} + # BASE_SHA="${{ github.event.pull_request.base.sha }}" + # if [ -z "${BASE_SHA}" ]; then + # git fetch --no-tags origin "+refs/heads/*:refs/remotes/origin/*" + # BASE_REF="${GITHUB_BASE_REF:-main}" + # BASE_SHA="origin/${BASE_REF}" + # fi + # # Collect changed .go files under src/ + # mapfile -t CHANGED < <(git diff --name-only --diff-filter=ACMRT "${BASE_SHA}" HEAD -- '*.go' | grep -E '^src/' || true) + # if [ ${#CHANGED[@]} -eq 0 ]; then + # echo "No changed Go files under src/; skipping vet." + # exit 0 + # fi + # # Derive unique package directories relative to src/ + # mapfile -t PKG_DIRS < <(printf '%s\n' "${CHANGED[@]}" | sed 's|^src/||' | xargs -r -n1 dirname | sort -u) + # cd "$GOROOT/src" + # ok_dirs=() + # for d in "${PKG_DIRS[@]}"; do + # # Filter to valid packages (go list must succeed) + # if GO111MODULE=off "$GOROOT/bin/go" list "./$d" >/dev/null 2>&1; then + # ok_dirs+=("./$d") + # fi + # done + # if [ ${#ok_dirs[@]} -eq 0 ]; then + # echo "No valid Go packages to vet; exiting." + # exit 0 + # fi + # echo "Vetting packages:" + # printf '%s\n' "${ok_dirs[@]}" - # Run go vet and capture output without failing immediately - # Disable xtrace to reduce noise in logs while filtering - set +x - set +e - GO111MODULE=off "$GOROOT/bin/go" vet -v "${ok_dirs[@]}" > /tmp/vet.out 2>&1 - VET_STATUS=${PIPESTATUS[0]} - set -e - # Re-enable xtrace if desired (leave disabled to keep logs clean) + # # Run go vet and capture output without failing immediately + # # Disable xtrace to reduce noise in logs while filtering + # set +x + # set +e + # GO111MODULE=off "$GOROOT/bin/go" vet -v "${ok_dirs[@]}" > /tmp/vet.out 2>&1 + # VET_STATUS=${PIPESTATUS[0]} + # set -e + # # Re-enable xtrace if desired (leave disabled to keep logs clean) - if [ "$VET_STATUS" -eq 0 ]; then - echo "go vet passed with no errors." - exit 0 - fi + # if [ "$VET_STATUS" -eq 0 ]; then + # echo "go vet passed with no errors." + # exit 0 + # fi - # Build a set of changed files relative to $GOROOT/src - mapfile -t CHANGED_REL < <(printf '%s\n' "${CHANGED[@]}" | sed 's|^src/||') - declare -A CHANGED_SET=() - for f in "${CHANGED_REL[@]}"; do - CHANGED_SET["$f"]=1 - CHANGED_SET["./$f"]=1 - done + # # Build a set of changed files relative to $GOROOT/src + # mapfile -t CHANGED_REL < <(printf '%s\n' "${CHANGED[@]}" | sed 's|^src/||') + # declare -A CHANGED_SET=() + # for f in "${CHANGED_REL[@]}"; do + # CHANGED_SET["$f"]=1 + # CHANGED_SET["./$f"]=1 + # done - # Filter vet output: keep errors only for files modified in this PR - KEPT_ERRORS=0 - IGNORED_ERRORS=0 - > /tmp/vet.kept - > /tmp/vet.ignored + # # Filter vet output: keep errors only for files modified in this PR + # KEPT_ERRORS=0 + # IGNORED_ERRORS=0 + # > /tmp/vet.kept + # > /tmp/vet.ignored - while IFS= read -r line; do - if [[ "$line" =~ ^([[:alnum:]_./-]+\.go):([0-9]+): ]]; then - file="${BASH_REMATCH[1]}" - if [[ ${CHANGED_SET[$file]+_} ]]; then - echo "$line" >> /tmp/vet.kept - KEPT_ERRORS=$((KEPT_ERRORS+1)) - else - echo "$line" >> /tmp/vet.ignored - IGNORED_ERRORS=$((IGNORED_ERRORS+1)) - fi - fi - done < /tmp/vet.out + # while IFS= read -r line; do + # if [[ "$line" =~ ^([[:alnum:]_./-]+\.go):([0-9]+): ]]; then + # file="${BASH_REMATCH[1]}" + # if [[ ${CHANGED_SET[$file]+_} ]]; then + # echo "$line" >> /tmp/vet.kept + # KEPT_ERRORS=$((KEPT_ERRORS+1)) + # else + # echo "$line" >> /tmp/vet.ignored + # IGNORED_ERRORS=$((IGNORED_ERRORS+1)) + # fi + # fi + # done < /tmp/vet.out - if [ "$KEPT_ERRORS" -gt 0 ]; then - echo "go vet errors in modified files ($KEPT_ERRORS):" >&2 - cat /tmp/vet.kept >&2 - if [ "$IGNORED_ERRORS" -gt 0 ]; then - echo "go vet diagnostics ignored in unmodified files ($IGNORED_ERRORS):" >&2 - cat /tmp/vet.ignored >&2 - fi - exit 1 - else - echo "go vet reported issues only in unmodified files ($IGNORED_ERRORS); ignoring." >&2 - # Optionally show ignored diagnostics; comment out next line to hide details - cat /tmp/vet.ignored >&2 || true - exit 0 - fi \ No newline at end of file + # if [ "$KEPT_ERRORS" -gt 0 ]; then + # echo "go vet errors in modified files ($KEPT_ERRORS):" >&2 + # cat /tmp/vet.kept >&2 + # if [ "$IGNORED_ERRORS" -gt 0 ]; then + # echo "go vet diagnostics ignored in unmodified files ($IGNORED_ERRORS):" >&2 + # cat /tmp/vet.ignored >&2 + # fi + # exit 1 + # else + # echo "go vet reported issues only in unmodified files ($IGNORED_ERRORS); ignoring." >&2 + # # Optionally show ignored diagnostics; comment out next line to hide details + # cat /tmp/vet.ignored >&2 || true + # exit 0 + # fi \ No newline at end of file diff --git a/.github/workflows/test all in amd64 ubuntu.yml b/.github/workflows/test all in amd64 ubuntu.yml index 0a9278ee8370fe..4aaa02cf7c6f28 100644 --- a/.github/workflows/test all in amd64 ubuntu.yml +++ b/.github/workflows/test all in amd64 ubuntu.yml @@ -14,14 +14,14 @@ jobs: - name: Build toolchain and test (host amd64) run: | - # install bootstrap Go - set -euxo pipefail - BOOT=/tmp/go-bootstrap - curl -fsSL https://go.dev/dl/go1.25.0.linux-amd64.tar.gz -o /tmp/go.tar.gz - tar -C /tmp -xzf /tmp/go.tar.gz - mv /tmp/go "$BOOT" - export GOROOT_BOOTSTRAP="$BOOT" + # # install bootstrap Go + # set -euxo pipefail + # BOOT=/tmp/go-bootstrap + # curl -fsSL https://go.dev/dl/go1.25.0.linux-amd64.tar.gz -o /tmp/go.tar.gz + # tar -C /tmp -xzf /tmp/go.tar.gz + # mv /tmp/go "$BOOT" + # export GOROOT_BOOTSTRAP="$BOOT" - # build toolchain and test - cd "$GITHUB_WORKSPACE/src" - ./all.bash \ No newline at end of file + # # build toolchain and test + # cd "$GITHUB_WORKSPACE/src" + # ./all.bash \ No newline at end of file diff --git a/.github/workflows/test all in arm64 ubuntu.yml b/.github/workflows/test all in arm64 ubuntu.yml index dbc90174f04508..ca889c43fdc612 100644 --- a/.github/workflows/test all in arm64 ubuntu.yml +++ b/.github/workflows/test all in arm64 ubuntu.yml @@ -14,15 +14,15 @@ jobs: - name: Build toolchain and test (host arm64) run: | - # install bootstrap Go - set -euxo pipefail - BOOT=/tmp/go-bootstrap - curl -fsSL https://go.dev/dl/go1.25.0.linux-arm64.tar.gz -o /tmp/go.tar.gz - tar -C /tmp -xzf /tmp/go.tar.gz - mv /tmp/go "$BOOT" - export GOROOT_BOOTSTRAP="$BOOT" - uname -a + # # install bootstrap Go + # set -euxo pipefail + # BOOT=/tmp/go-bootstrap + # curl -fsSL https://go.dev/dl/go1.25.0.linux-arm64.tar.gz -o /tmp/go.tar.gz + # tar -C /tmp -xzf /tmp/go.tar.gz + # mv /tmp/go "$BOOT" + # export GOROOT_BOOTSTRAP="$BOOT" + # uname -a - # build toolchain and test - cd "$GITHUB_WORKSPACE/src" - ./all.bash \ No newline at end of file + # # build toolchain and test + # cd "$GITHUB_WORKSPACE/src" + # ./all.bash \ No newline at end of file From e2b08398ebc583c510b3f16395e66c85f3fe65d2 Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Sat, 15 Aug 2026 14:20:49 +0800 Subject: [PATCH 07/19] edit go version --- VERSION | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/VERSION b/VERSION index 9b642ac23a6b1e..d1ffced689f655 100644 --- a/VERSION +++ b/VERSION @@ -1,2 +1,2 @@ -go1.26.5 +go1.26.5-zte-fp time 2026-07-01T21:24:27Z From 608ffa6637f3f91e1667d0ffb0f2f6d8bebcf7e8 Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Sat, 15 Aug 2026 15:22:09 +0800 Subject: [PATCH 08/19] Regression Test --- VERSION | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/VERSION b/VERSION index d1ffced689f655..9b642ac23a6b1e 100644 --- a/VERSION +++ b/VERSION @@ -1,2 +1,2 @@ -go1.26.5-zte-fp +go1.26.5 time 2026-07-01T21:24:27Z From ebccf7167cb3e28fd99e89449ea5c559f9596927 Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Sat, 15 Aug 2026 15:35:16 +0800 Subject: [PATCH 09/19] go1.26.4_bootstrap --- .github/workflows/all.bash in milkv-pioneer.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/all.bash in milkv-pioneer.yml b/.github/workflows/all.bash in milkv-pioneer.yml index 62d9d81e7ee19b..41ce03050c75be 100644 --- a/.github/workflows/all.bash in milkv-pioneer.yml +++ b/.github/workflows/all.bash in milkv-pioneer.yml @@ -27,7 +27,7 @@ jobs: set -euxo pipefail BOOT=/tmp/go-bootstrap rm -rf "$BOOT" - curl -fsSL https://go.dev/dl/go1.26.5.linux-riscv64.tar.gz -o /tmp/go.tar.gz + curl -fsSL https://go.dev/dl/go1.26.4.linux-riscv64.tar.gz -o /tmp/go.tar.gz tar -C /tmp -xzf /tmp/go.tar.gz mv /tmp/go "$BOOT" export GOROOT_BOOTSTRAP="$BOOT" From e0a4b58b0584a960a5ec94769d8985c82564c7dd Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Sat, 15 Aug 2026 15:52:56 +0800 Subject: [PATCH 10/19] Revert "go1.26.4_bootstrap" This reverts commit f2dc8bf63680deb2d4dc52a15110e0a1347bfd74. --- .github/workflows/all.bash in milkv-pioneer.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/all.bash in milkv-pioneer.yml b/.github/workflows/all.bash in milkv-pioneer.yml index 41ce03050c75be..62d9d81e7ee19b 100644 --- a/.github/workflows/all.bash in milkv-pioneer.yml +++ b/.github/workflows/all.bash in milkv-pioneer.yml @@ -27,7 +27,7 @@ jobs: set -euxo pipefail BOOT=/tmp/go-bootstrap rm -rf "$BOOT" - curl -fsSL https://go.dev/dl/go1.26.4.linux-riscv64.tar.gz -o /tmp/go.tar.gz + curl -fsSL https://go.dev/dl/go1.26.5.linux-riscv64.tar.gz -o /tmp/go.tar.gz tar -C /tmp -xzf /tmp/go.tar.gz mv /tmp/go "$BOOT" export GOROOT_BOOTSTRAP="$BOOT" From 946323685cdafb9d6b3caf10b6c733db97100e15 Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Sat, 15 Aug 2026 15:53:18 +0800 Subject: [PATCH 11/19] Revert "Regression Test" This reverts commit 30aaed29d04090448f7cfaf7fc85edb1b38b8651. --- VERSION | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/VERSION b/VERSION index 9b642ac23a6b1e..d1ffced689f655 100644 --- a/VERSION +++ b/VERSION @@ -1,2 +1,2 @@ -go1.26.5 +go1.26.5-zte-fp time 2026-07-01T21:24:27Z From 02cfbfd7e959b210bf6e549f72c81ac60995e220 Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Sat, 15 Aug 2026 15:54:16 +0800 Subject: [PATCH 12/19] Revert "not use X8 in sha256block_riscv64.s" This reverts commit edf59e994562697525c46501e01caf78c9eb2491. --- src/crypto/internal/fips140/sha256/sha256block_riscv64.s | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/src/crypto/internal/fips140/sha256/sha256block_riscv64.s b/src/crypto/internal/fips140/sha256/sha256block_riscv64.s index e79567436aa9d9..f9c0d0a66538c7 100644 --- a/src/crypto/internal/fips140/sha256/sha256block_riscv64.s +++ b/src/crypto/internal/fips140/sha256/sha256block_riscv64.s @@ -648,12 +648,11 @@ blockloop: // Scalar load to avoid index ambiguity (corrected offsets) // Layout in scratch: 0:f,4:e,8:b,12:a,16:h,20:g,24:d,28:c // Use indexed gather to reorder scratch {f,e,b,a,h,g,d,c} -> {a,b,c,d,e,f,g,h} - // Note: Use X9 instead of X8 to avoid clobbering the frame pointer (S0/X8). - MOV $index_final<>(SB), X9 - VLE32V (X9), V31 + MOV $index_final<>(SB), X8 + VLE32V (X8), V31 VLUXEI32V (X6), V31, V3 // V3 = {a,b,c,d} - MOV $index_final<>+16(SB), X9 - VLE32V (X9), V31 + MOV $index_final<>+16(SB), X8 + VLE32V (X8), V31 VLUXEI32V (X6), V31, V4 // V4 = {e,f,g,h} VADDVV V1, V3, V1 From 1ed08819619c59c7720b0199da78d4e5b5b99848 Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Sat, 15 Aug 2026 16:26:09 +0800 Subject: [PATCH 13/19] Revert "not use X8 in assemble file" This reverts commit 0a0677bf7b56f5a94f03666fcc64e4e51afadf58. --- .../fips140/nistec/fiat/p256_riscv64.s | 69 +++++++++---------- src/hash/crc32/crc32_riscv64.s | 42 +++++------ 2 files changed, 52 insertions(+), 59 deletions(-) diff --git a/src/crypto/internal/fips140/nistec/fiat/p256_riscv64.s b/src/crypto/internal/fips140/nistec/fiat/p256_riscv64.s index d24458aa4af006..4e2471d8c3e657 100644 --- a/src/crypto/internal/fips140/nistec/fiat/p256_riscv64.s +++ b/src/crypto/internal/fips140/nistec/fiat/p256_riscv64.s @@ -23,8 +23,7 @@ GLOBL p256const1<>(SB), RODATA, $8 // X21-X24 = acc0-acc3 (accumulator low bits) // X25-X26, X28-X29 = acc4-acc7 (accumulator high bits) // X30 = const1 = 0xFFFFFFFF00000001 -// X5-X7, X9, X12, X31 = temporary variables -// Note: X8 (S0/FP) is reserved for frame pointer and not used as temporary +// X5-X9, X12 = temporary variables TEXT ·p256Mul(SB),NOSPLIT,$0-24 MOV out+0(FP), X10 MOV a+8(FP), X11 @@ -77,7 +76,7 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 // ===================================== SLL $32, X21, X5 // t0 = acc0 << 32 SRL $32, X21, X7 // t1 = acc0 >> 32 - MUL X21, X30, X31 // t2 = lo(acc0 * const1) + MUL X21, X30, X8 // t2 = lo(acc0 * const1) MULHU X21, X30, X21 // acc0 = hi(acc0 * const1) ADD X22, X5, X22 @@ -89,8 +88,8 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 SLTU X6, X23, X5 ADD X9, X5, X6 - ADD X24, X31, X24 - SLTU X31, X24, X9 + ADD X24, X8, X24 + SLTU X8, X24, X9 ADD X24, X6, X24 SLTU X6, X24, X5 ADD X9, X5, X6 @@ -101,7 +100,7 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 // Round 1: y[1] * x // ===================================== MULHU X18, X13, X7 - MULHU X18, X14, X31 + MULHU X18, X14, X8 MULHU X18, X15, X9 MULHU X18, X16, X26 @@ -135,8 +134,8 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 ADD X23, X7, X23 SLTU X7, X23, X6 - ADD X24, X31, X24 - SLTU X31, X24, X5 + ADD X24, X8, X24 + SLTU X8, X24, X5 ADD X24, X6, X24 SLTU X6, X24, X12 ADD X5, X12, X6 @@ -155,7 +154,7 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 // ===================================== SLL $32, X22, X5 SRL $32, X22, X7 - MUL X22, X30, X31 + MUL X22, X30, X8 MULHU X22, X30, X22 ADD X23, X5, X23 @@ -167,8 +166,8 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 SLTU X6, X24, X5 ADD X9, X5, X6 - ADD X21, X31, X21 - SLTU X31, X21, X9 + ADD X21, X8, X21 + SLTU X8, X21, X9 ADD X21, X6, X21 SLTU X6, X21, X5 ADD X9, X5, X6 @@ -179,7 +178,7 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 // Round 2: y[2] * x // ===================================== MULHU X19, X13, X7 - MULHU X19, X14, X31 + MULHU X19, X14, X8 MULHU X19, X15, X9 MULHU X19, X16, X28 @@ -213,8 +212,8 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 ADD X24, X7, X24 SLTU X7, X24, X6 - ADD X25, X31, X25 - SLTU X31, X25, X5 + ADD X25, X8, X25 + SLTU X8, X25, X5 ADD X25, X6, X25 SLTU X6, X25, X12 ADD X5, X12, X6 @@ -235,7 +234,7 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 // ===================================== SLL $32, X23, X5 SRL $32, X23, X7 - MUL X23, X30, X31 + MUL X23, X30, X8 MULHU X23, X30, X23 ADD X24, X5, X24 @@ -247,8 +246,8 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 SLTU X6, X21, X5 ADD X9, X5, X6 - ADD X22, X31, X22 - SLTU X31, X22, X9 + ADD X22, X8, X22 + SLTU X8, X22, X9 ADD X22, X6, X22 SLTU X6, X22, X5 ADD X9, X5, X6 @@ -259,7 +258,7 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 // Round 3: y[3] * x // ===================================== MULHU X20, X13, X7 - MULHU X20, X14, X31 + MULHU X20, X14, X8 MULHU X20, X15, X9 MULHU X20, X16, X29 @@ -293,8 +292,8 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 ADD X25, X7, X25 SLTU X7, X25, X6 - ADD X26, X31, X26 - SLTU X31, X26, X5 + ADD X26, X8, X26 + SLTU X8, X26, X5 ADD X26, X6, X26 SLTU X6, X26, X7 ADD X5, X7, X6 @@ -313,7 +312,7 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 // ===================================== SLL $32, X24, X5 SRL $32, X24, X7 - MUL X24, X30, X31 + MUL X24, X30, X8 MULHU X24, X30, X24 ADD X21, X5, X21 @@ -325,8 +324,8 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 SLTU X6, X22, X5 ADD X9, X5, X6 - ADD X23, X31, X23 - SLTU X31, X23, X9 + ADD X23, X8, X23 + SLTU X8, X23, X9 ADD X23, X6, X23 SLTU X6, X23, X5 ADD X9, X5, X6 @@ -369,10 +368,10 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 SLTU X6, X21, X7 // X7 = b0 = (acc0 < p0) // Step 2: t1, b1 = Sub64(acc1, p1, b0) - SUB X5, X22, X31 // X31 = tmp = acc1 - const0 + SUB X5, X22, X8 // X8 = tmp = acc1 - const0 SLTU X5, X22, X9 // X9 = (acc1 < const0) - SUB X7, X31, X14 // X14 = t1 = tmp - b0 - SLTU X7, X31, X12 // X12 = (tmp < b0) + SUB X7, X8, X14 // X14 = t1 = tmp - b0 + SLTU X7, X8, X12 // X12 = (tmp < b0) OR X9, X12, X7 // X7 = b1 // Step 3: t2, b2 = Sub64(acc2, 0, b1) @@ -380,33 +379,33 @@ TEXT ·p256Mul(SB),NOSPLIT,$0-24 SLTU X7, X23, X7 // X7 = b2 = (acc2 < b1) // Step 4: t3, b3 = Sub64(acc3, p3, b2) - SUB X30, X24, X31 // X31 = tmp = acc3 - const1 + SUB X30, X24, X8 // X8 = tmp = acc3 - const1 SLTU X30, X24, X9 // X9 = (acc3 < const1) - SUB X7, X31, X16 // X16 = t3 = tmp - b2 - SLTU X7, X31, X12 // X12 = (tmp < b2) + SUB X7, X8, X16 // X16 = t3 = tmp - b2 + SLTU X7, X8, X12 // X12 = (tmp < b2) OR X9, X12, X7 // X7 = b3 // Step 5: final_borrow = (carry < b3) - SLTU X7, X25, X31 // X31 = (carry < b3) = final_borrow + SLTU X7, X25, X8 // X8 = (carry < b3) = final_borrow // Conditional select: mask = final_borrow ? -1 : 0 - NEG X31, X31 // X31 = mask + NEG X8, X8 // X8 = mask // Select result XOR X21, X13, X9 - AND X31, X9, X9 + AND X8, X9, X9 XOR X9, X13, X13 XOR X22, X14, X9 - AND X31, X9, X9 + AND X8, X9, X9 XOR X9, X14, X14 XOR X23, X15, X9 - AND X31, X9, X9 + AND X8, X9, X9 XOR X9, X15, X15 XOR X24, X16, X9 - AND X31, X9, X9 + AND X8, X9, X9 XOR X9, X16, X16 // Write result diff --git a/src/hash/crc32/crc32_riscv64.s b/src/hash/crc32/crc32_riscv64.s index 7a3c06985ca13c..8a107f1ff8223e 100644 --- a/src/hash/crc32/crc32_riscv64.s +++ b/src/hash/crc32/crc32_riscv64.s @@ -11,10 +11,6 @@ // 2. Fold each subsequent 16-byte block using carry-less multiplication // 3. Final fold: reduce 128-bit accumulator to 64 bits // 4. Barrett reduction: reduce 64 bits to 32-bit CRC -// -// Register usage (frame-pointer compatible): -// X5-X7, X9-X28 = general purpose / temporary registers -// X8 (S0/FP) is NOT used to avoid conflict with frame pointer #include "textflag.h" @@ -64,21 +60,20 @@ TEXT ·ieeeUpdateCLMUL(SB), NOSPLIT, $0-36 MOV p_len+16(FP), X7 // len(p) // Load first 16 bytes of data - // Note: Using X28 instead of X8 to avoid conflict with frame pointer (S0/X8) - MOV (X6), X28 // t0 = low 64 bits + MOV (X6), X8 // t0 = low 64 bits MOV 8(X6), X9 // t1 = high 64 bits ADD $16, X6 ADD $-16, X7 // XOR CRC seed into the low word of the first block - XOR X5, X28, X28 + XOR X5, X8, X8 // Load fold constants: K2 (high), K1 (low) MOV ieee_fold<>+0(SB), X10 // K2 MOV ieee_fold<>+8(SB), X11 // K1 // Main fold loop: process 16 bytes per iteration. - // We fold the 128-bit accumulator (X28, X9) with each new 16-byte block. + // We fold the 128-bit accumulator (X8, X9) with each new 16-byte block. MOV $16, X12 ieee_fold_loop: BLT X7, X12, ieee_fold_done @@ -92,21 +87,21 @@ ieee_fold_loop: // Carry-less multiply fold: // new_low = clmul(K1, t0) XOR clmul(K2, t1) XOR d0 // new_high = clmulh(K1, t0) XOR clmulh(K2, t1) XOR d1 - CLMUL X11, X28, X15 // clmul(K1, t0) → low result - CLMULH X11, X28, X16 // clmulh(K1, t0) → high result + CLMUL X11, X8, X15 // clmul(K1, t0) → low result + CLMULH X11, X8, X16 // clmulh(K1, t0) → high result CLMUL X10, X9, X17 // clmul(K2, t1) → low result CLMULH X10, X9, X18 // clmulh(K2, t1) → high result // Combine fold results with new data - XOR X15, X17, X28 // t0 = fold_low - XOR X28, X13, X28 // t0 ^= d0 + XOR X15, X17, X8 // t0 = fold_low + XOR X8, X13, X8 // t0 ^= d0 XOR X16, X18, X9 // t1 = fold_high XOR X9, X14, X9 // t1 ^= d1 JMP ieee_fold_loop ieee_fold_done: - // (X28, X9) = (t0, t1) holds the folded 128-bit accumulator. + // (X8, X9) = (t0, t1) holds the folded 128-bit accumulator. // Now reduce 128 bits → 64 bits → 32 bits. // Load final reduction constants @@ -122,8 +117,8 @@ ieee_fold_done: // high32 = t1 >> 32 // f = clmul(low32, const_low) // result = (t3h << 32) XOR high32 XOR f - CLMUL X11, X28, X12 // t4 = clmul(t0, const_high) - CLMULH X11, X28, X13 // t3h = clmulh(t0, const_high) + CLMUL X11, X8, X12 // t4 = clmul(t0, const_high) + CLMULH X11, X8, X13 // t3h = clmulh(t0, const_high) XOR X9, X12, X9 // t1 = t1 XOR t4 // Extract low 32 and high 32 bits from t1 @@ -163,14 +158,13 @@ TEXT ·castagnoliUpdateCLMUL(SB), NOSPLIT, $0-36 MOV p_len+16(FP), X7 // len(p) // Load first 16 bytes of data - // Note: Using X28 instead of X8 to avoid conflict with frame pointer (S0/X8) - MOV (X6), X28 // t0 = low 64 bits + MOV (X6), X8 // t0 = low 64 bits MOV 8(X6), X9 // t1 = high 64 bits ADD $16, X6 ADD $-16, X7 // XOR CRC seed into the low word of the first block - XOR X5, X28, X28 + XOR X5, X8, X8 // Load fold constants: K2 (high), K1 (low) MOV cast_fold<>+0(SB), X10 // K2 @@ -188,14 +182,14 @@ cast_fold_loop: ADD $-16, X7 // Carry-less multiply fold - CLMUL X11, X28, X15 // clmul(K1, t0) - CLMULH X11, X28, X16 // clmulh(K1, t0) + CLMUL X11, X8, X15 // clmul(K1, t0) + CLMULH X11, X8, X16 // clmulh(K1, t0) CLMUL X10, X9, X17 // clmul(K2, t1) CLMULH X10, X9, X18 // clmulh(K2, t1) // Combine fold results with new data - XOR X15, X17, X28 // t0 = fold_low - XOR X28, X13, X28 // t0 ^= d0 + XOR X15, X17, X8 // t0 = fold_low + XOR X8, X13, X8 // t0 ^= d0 XOR X16, X18, X9 // t1 = fold_high XOR X9, X14, X9 // t1 ^= d1 @@ -207,8 +201,8 @@ cast_fold_done: MOV cast_reduce<>+8(SB), X11 // const_high // 128-bit → 64-bit folding - CLMUL X11, X28, X12 // t4 = clmul(t0, const_high) - CLMULH X11, X28, X13 // t3h = clmulh(t0, const_high) + CLMUL X11, X8, X12 // t4 = clmul(t0, const_high) + CLMULH X11, X8, X13 // t3h = clmulh(t0, const_high) XOR X9, X12, X9 // t1 = t1 XOR t4 MOV mask32<>(SB), X20 // X20 = 0xFFFFFFFF From 6fb8da4fb845c3be95b2416575650c0c0b8fd54a Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Mon, 17 Aug 2026 09:15:09 +0800 Subject: [PATCH 14/19] Revert "runtime/cgo: add abi_riscv64.h for callee-saved register macros" This reverts commit 61a1a48858dcf250aa13be7c3e472ecf5b292356. --- src/runtime/asm_riscv64.s | 53 +++++++++++++++++++++++--- src/runtime/cgo/abi_riscv64.h | 72 ----------------------------------- src/runtime/cgo/asm_riscv64.s | 55 ++++++++++++++++++++++---- src/runtime/race_riscv64.s | 53 +++++++++++++++++++++++--- 4 files changed, 144 insertions(+), 89 deletions(-) delete mode 100644 src/runtime/cgo/abi_riscv64.h diff --git a/src/runtime/asm_riscv64.s b/src/runtime/asm_riscv64.s index c2430e608c88ff..f10528b95bdf8f 100644 --- a/src/runtime/asm_riscv64.s +++ b/src/runtime/asm_riscv64.s @@ -5,7 +5,6 @@ #include "go_asm.h" #include "funcdata.h" #include "textflag.h" -#include "cgo/abi_riscv64.h" // When building with -buildmode=c-shared, this symbol is called when the shared @@ -13,8 +12,30 @@ TEXT _rt0_riscv64_lib(SB),NOSPLIT,$224 // Preserve callee-save registers, along with X1 (LR). MOV X1, (8*3)(X2) - SAVE_GPR((8*4)) - SAVE_FPR((8*16)) + MOV X8, (8*4)(X2) + MOV X9, (8*5)(X2) + MOV X18, (8*6)(X2) + MOV X19, (8*7)(X2) + MOV X20, (8*8)(X2) + MOV X21, (8*9)(X2) + MOV X22, (8*10)(X2) + MOV X23, (8*11)(X2) + MOV X24, (8*12)(X2) + MOV X25, (8*13)(X2) + MOV X26, (8*14)(X2) + MOV g, (8*15)(X2) + MOVD F8, (8*16)(X2) + MOVD F9, (8*17)(X2) + MOVD F18, (8*18)(X2) + MOVD F19, (8*19)(X2) + MOVD F20, (8*20)(X2) + MOVD F21, (8*21)(X2) + MOVD F22, (8*22)(X2) + MOVD F23, (8*23)(X2) + MOVD F24, (8*24)(X2) + MOVD F25, (8*25)(X2) + MOVD F26, (8*26)(X2) + MOVD F27, (8*27)(X2) // Initialize g as nil in case of using g later e.g. sigaction in cgo_sigaction.go MOV X0, g @@ -45,8 +66,30 @@ nocgo: restore: // Restore callee-save registers, along with X1 (LR). MOV (8*3)(X2), X1 - RESTORE_GPR((8*4)) - RESTORE_FPR((8*16)) + MOV (8*4)(X2), X8 + MOV (8*5)(X2), X9 + MOV (8*6)(X2), X18 + MOV (8*7)(X2), X19 + MOV (8*8)(X2), X20 + MOV (8*9)(X2), X21 + MOV (8*10)(X2), X22 + MOV (8*11)(X2), X23 + MOV (8*12)(X2), X24 + MOV (8*13)(X2), X25 + MOV (8*14)(X2), X26 + MOV (8*15)(X2), g + MOVD (8*16)(X2), F8 + MOVD (8*17)(X2), F9 + MOVD (8*18)(X2), F18 + MOVD (8*19)(X2), F19 + MOVD (8*20)(X2), F20 + MOVD (8*21)(X2), F21 + MOVD (8*22)(X2), F22 + MOVD (8*23)(X2), F23 + MOVD (8*24)(X2), F24 + MOVD (8*25)(X2), F25 + MOVD (8*26)(X2), F26 + MOVD (8*27)(X2), F27 RET diff --git a/src/runtime/cgo/abi_riscv64.h b/src/runtime/cgo/abi_riscv64.h deleted file mode 100644 index b9322e0c53e2ac..00000000000000 --- a/src/runtime/cgo/abi_riscv64.h +++ /dev/null @@ -1,72 +0,0 @@ -// Copyright 2026 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -// Macros for transitioning from the host ABI to Go ABI0. -// -// These macros save and restore the callee-saved registers -// from the stack, but they don't adjust stack pointer, so -// the user should prepare stack space in advance. -// SAVE_GPR(offset) saves X8, X9, X18-X27 to the stack space -// of ((offset)+0*8)(X2) ~ ((offset)+11*8)(X2). -// -// SAVE_FPR(offset) saves F8, F9, F18-F27 to the stack space -// of ((offset)+0*8)(X2) ~ ((offset)+11*8)(X2). -// -// Note: g is X27 - -#define SAVE_GPR(offset) \ - MOV X8, ((offset)+0*8)(X2) \ - MOV X9, ((offset)+1*8)(X2) \ - MOV X18, ((offset)+2*8)(X2) \ - MOV X19, ((offset)+3*8)(X2) \ - MOV X20, ((offset)+4*8)(X2) \ - MOV X21, ((offset)+5*8)(X2) \ - MOV X22, ((offset)+6*8)(X2) \ - MOV X23, ((offset)+7*8)(X2) \ - MOV X24, ((offset)+8*8)(X2) \ - MOV X25, ((offset)+9*8)(X2) \ - MOV X26, ((offset)+10*8)(X2) \ - MOV g, ((offset)+11*8)(X2) - -#define RESTORE_GPR(offset) \ - MOV ((offset)+0*8)(X2), X8 \ - MOV ((offset)+1*8)(X2), X9 \ - MOV ((offset)+2*8)(X2), X18 \ - MOV ((offset)+3*8)(X2), X19 \ - MOV ((offset)+4*8)(X2), X20 \ - MOV ((offset)+5*8)(X2), X21 \ - MOV ((offset)+6*8)(X2), X22 \ - MOV ((offset)+7*8)(X2), X23 \ - MOV ((offset)+8*8)(X2), X24 \ - MOV ((offset)+9*8)(X2), X25 \ - MOV ((offset)+10*8)(X2), X26 \ - MOV ((offset)+11*8)(X2), g - -#define SAVE_FPR(offset) \ - MOVD F8, ((offset)+0*8)(X2) \ - MOVD F9, ((offset)+1*8)(X2) \ - MOVD F18, ((offset)+2*8)(X2) \ - MOVD F19, ((offset)+3*8)(X2) \ - MOVD F20, ((offset)+4*8)(X2) \ - MOVD F21, ((offset)+5*8)(X2) \ - MOVD F22, ((offset)+6*8)(X2) \ - MOVD F23, ((offset)+7*8)(X2) \ - MOVD F24, ((offset)+8*8)(X2) \ - MOVD F25, ((offset)+9*8)(X2) \ - MOVD F26, ((offset)+10*8)(X2) \ - MOVD F27, ((offset)+11*8)(X2) - -#define RESTORE_FPR(offset) \ - MOVD ((offset)+0*8)(X2), F8 \ - MOVD ((offset)+1*8)(X2), F9 \ - MOVD ((offset)+2*8)(X2), F18 \ - MOVD ((offset)+3*8)(X2), F19 \ - MOVD ((offset)+4*8)(X2), F20 \ - MOVD ((offset)+5*8)(X2), F21 \ - MOVD ((offset)+6*8)(X2), F22 \ - MOVD ((offset)+7*8)(X2), F23 \ - MOVD ((offset)+8*8)(X2), F24 \ - MOVD ((offset)+9*8)(X2), F25 \ - MOVD ((offset)+10*8)(X2), F26 \ - MOVD ((offset)+11*8)(X2), F27 diff --git a/src/runtime/cgo/asm_riscv64.s b/src/runtime/cgo/asm_riscv64.s index 81513e93569062..c9df17b05ed476 100644 --- a/src/runtime/cgo/asm_riscv64.s +++ b/src/runtime/cgo/asm_riscv64.s @@ -3,7 +3,6 @@ // license that can be found in the LICENSE file. #include "textflag.h" -#include "abi_riscv64.h" // Set the x_crosscall2_ptr C function pointer variable point to crosscall2. // It's such a pointer chain: _crosscall2_ptr -> x_crosscall2_ptr -> crosscall2 @@ -32,19 +31,61 @@ TEXT crosscall2(SB),NOSPLIT|NOFRAME,$0 MOV X10, (8*1)(X2) // fn unsafe.Pointer MOV X11, (8*2)(X2) // a unsafe.Pointer MOV X13, (8*3)(X2) // ctxt uintptr - - SAVE_GPR((8*4)) + MOV X8, (8*4)(X2) + MOV X9, (8*5)(X2) + MOV X18, (8*6)(X2) + MOV X19, (8*7)(X2) + MOV X20, (8*8)(X2) + MOV X21, (8*9)(X2) + MOV X22, (8*10)(X2) + MOV X23, (8*11)(X2) + MOV X24, (8*12)(X2) + MOV X25, (8*13)(X2) + MOV X26, (8*14)(X2) + MOV g, (8*15)(X2) MOV X1, (8*16)(X2) - SAVE_FPR((8*17)) + MOVD F8, (8*17)(X2) + MOVD F9, (8*18)(X2) + MOVD F18, (8*19)(X2) + MOVD F19, (8*20)(X2) + MOVD F20, (8*21)(X2) + MOVD F21, (8*22)(X2) + MOVD F22, (8*23)(X2) + MOVD F23, (8*24)(X2) + MOVD F24, (8*25)(X2) + MOVD F25, (8*26)(X2) + MOVD F26, (8*27)(X2) + MOVD F27, (8*28)(X2) // Initialize Go ABI environment CALL runtime·load_g(SB) CALL runtime·cgocallback(SB) - RESTORE_GPR((8*4)) + MOV (8*4)(X2), X8 + MOV (8*5)(X2), X9 + MOV (8*6)(X2), X18 + MOV (8*7)(X2), X19 + MOV (8*8)(X2), X20 + MOV (8*9)(X2), X21 + MOV (8*10)(X2), X22 + MOV (8*11)(X2), X23 + MOV (8*12)(X2), X24 + MOV (8*13)(X2), X25 + MOV (8*14)(X2), X26 + MOV (8*15)(X2), g MOV (8*16)(X2), X1 - RESTORE_FPR((8*17)) - + MOVD (8*17)(X2), F8 + MOVD (8*18)(X2), F9 + MOVD (8*19)(X2), F18 + MOVD (8*20)(X2), F19 + MOVD (8*21)(X2), F20 + MOVD (8*22)(X2), F21 + MOVD (8*23)(X2), F22 + MOVD (8*24)(X2), F23 + MOVD (8*25)(X2), F24 + MOVD (8*26)(X2), F25 + MOVD (8*27)(X2), F26 + MOVD (8*28)(X2), F27 ADD $(8*29), X2 RET diff --git a/src/runtime/race_riscv64.s b/src/runtime/race_riscv64.s index bd47789b908763..4b4a73c5b633fb 100644 --- a/src/runtime/race_riscv64.s +++ b/src/runtime/race_riscv64.s @@ -7,7 +7,6 @@ #include "go_asm.h" #include "funcdata.h" #include "textflag.h" -#include "cgo/abi_riscv64.h" // The following thunks allow calling the gcc-compiled race runtime directly // from Go code without going all the way through cgo. @@ -478,8 +477,30 @@ rest: // 8(X2) and 16(X2) are for args passed to racecallback SUB $(27*8), X2 MOV X1, (0*8)(X2) - SAVE_GPR((3*8)) - SAVE_FPR((15*8)) + MOV X8, (3*8)(X2) + MOV X9, (4*8)(X2) + MOV X18, (5*8)(X2) + MOV X19, (6*8)(X2) + MOV X20, (7*8)(X2) + MOV X21, (8*8)(X2) + MOV X22, (9*8)(X2) + MOV X23, (10*8)(X2) + MOV X24, (11*8)(X2) + MOV X25, (12*8)(X2) + MOV X26, (13*8)(X2) + MOV g, (14*8)(X2) + MOVD F8, (15*8)(X2) + MOVD F9, (16*8)(X2) + MOVD F18, (17*8)(X2) + MOVD F19, (18*8)(X2) + MOVD F20, (19*8)(X2) + MOVD F21, (20*8)(X2) + MOVD F22, (21*8)(X2) + MOVD F23, (22*8)(X2) + MOVD F24, (23*8)(X2) + MOVD F25, (24*8)(X2) + MOVD F26, (25*8)(X2) + MOVD F27, (26*8)(X2) // Set g = g0. CALL runtime·load_g(SB) @@ -498,8 +519,30 @@ rest: ret: // Restore callee-save registers. MOV (0*8)(X2), X1 - RESTORE_GPR((3*8)) - RESTORE_FPR((15*8)) + MOV (3*8)(X2), X8 + MOV (4*8)(X2), X9 + MOV (5*8)(X2), X18 + MOV (6*8)(X2), X19 + MOV (7*8)(X2), X20 + MOV (8*8)(X2), X21 + MOV (9*8)(X2), X22 + MOV (10*8)(X2), X23 + MOV (11*8)(X2), X24 + MOV (12*8)(X2), X25 + MOV (13*8)(X2), X26 + MOV (14*8)(X2), g + MOVD (15*8)(X2), F8 + MOVD (16*8)(X2), F9 + MOVD (17*8)(X2), F18 + MOVD (18*8)(X2), F19 + MOVD (19*8)(X2), F20 + MOVD (20*8)(X2), F21 + MOVD (21*8)(X2), F22 + MOVD (22*8)(X2), F23 + MOVD (23*8)(X2), F24 + MOVD (24*8)(X2), F25 + MOVD (25*8)(X2), F26 + MOVD (26*8)(X2), F27 ADD $(27*8), X2 JMP (X1) From 1b15b7e66dd817ce496da2ade50e3b4ad3a4161e Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Mon, 17 Aug 2026 11:03:15 +0800 Subject: [PATCH 15/19] remove VERSION file --- VERSION | 2 -- 1 file changed, 2 deletions(-) delete mode 100644 VERSION diff --git a/VERSION b/VERSION deleted file mode 100644 index d1ffced689f655..00000000000000 --- a/VERSION +++ /dev/null @@ -1,2 +0,0 @@ -go1.26.5-zte-fp -time 2026-07-01T21:24:27Z From ef77bcebcabfdab162d489b3fb7e6d328632d8da Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Mon, 17 Aug 2026 14:31:31 +0800 Subject: [PATCH 16/19] add misaligned_fast test --- .github/workflows/all.bash in milkv-pioneer.yml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/.github/workflows/all.bash in milkv-pioneer.yml b/.github/workflows/all.bash in milkv-pioneer.yml index 62d9d81e7ee19b..c1c39a61ec2d41 100644 --- a/.github/workflows/all.bash in milkv-pioneer.yml +++ b/.github/workflows/all.bash in milkv-pioneer.yml @@ -31,6 +31,8 @@ jobs: tar -C /tmp -xzf /tmp/go.tar.gz mv /tmp/go "$BOOT" export GOROOT_BOOTSTRAP="$BOOT" + export GORISCV64=rva20u64,misaligned_fast + export GO_TEST_TIMEOUT_SCALE=10 # build toolchain cd "$GITHUB_WORKSPACE/src" From feb0f8ddec5e361e2c407808e88621be92a782aa Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Mon, 17 Aug 2026 14:38:06 +0800 Subject: [PATCH 17/19] use zte-go --- .github/workflows/all.bash in milkv-pioneer.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/all.bash in milkv-pioneer.yml b/.github/workflows/all.bash in milkv-pioneer.yml index c1c39a61ec2d41..90571a86b77cb7 100644 --- a/.github/workflows/all.bash in milkv-pioneer.yml +++ b/.github/workflows/all.bash in milkv-pioneer.yml @@ -27,7 +27,7 @@ jobs: set -euxo pipefail BOOT=/tmp/go-bootstrap rm -rf "$BOOT" - curl -fsSL https://go.dev/dl/go1.26.5.linux-riscv64.tar.gz -o /tmp/go.tar.gz + curl -fsSL https://github.com/zte-riscv/go/releases/download/go1.26.4.202607/go1.26.4.202607.linux-riscv64.tar.gz -o /tmp/go.tar.gz tar -C /tmp -xzf /tmp/go.tar.gz mv /tmp/go "$BOOT" export GOROOT_BOOTSTRAP="$BOOT" From 265b6e4555257885e7daeb0e500e573982251140 Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Wed, 19 Aug 2026 09:19:37 +0800 Subject: [PATCH 18/19] Revert "remove VERSION file" This reverts commit 91dafedbac6c7c78531d7001c8d55961287d91b1. --- VERSION | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 VERSION diff --git a/VERSION b/VERSION new file mode 100644 index 00000000000000..d1ffced689f655 --- /dev/null +++ b/VERSION @@ -0,0 +1,2 @@ +go1.26.5-zte-fp +time 2026-07-01T21:24:27Z From 057339e0d558ef752628f059e304005efcc9aa37 Mon Sep 17 00:00:00 2001 From: Xueqi Luo <1824368278@qq.com> Date: Wed, 19 Aug 2026 09:21:23 +0800 Subject: [PATCH 19/19] rm go-cache --- .github/workflows/all.bash in milkv-pioneer.yml | 1 + VERSION | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/.github/workflows/all.bash in milkv-pioneer.yml b/.github/workflows/all.bash in milkv-pioneer.yml index 90571a86b77cb7..2eb6129246a94f 100644 --- a/.github/workflows/all.bash in milkv-pioneer.yml +++ b/.github/workflows/all.bash in milkv-pioneer.yml @@ -35,6 +35,7 @@ jobs: export GO_TEST_TIMEOUT_SCALE=10 # build toolchain + rm -rf "$HOME/.cache/go-build" cd "$GITHUB_WORKSPACE/src" ./all.bash 2>&1 | tee build.log - name: Upload build log on failure diff --git a/VERSION b/VERSION index d1ffced689f655..9b642ac23a6b1e 100644 --- a/VERSION +++ b/VERSION @@ -1,2 +1,2 @@ -go1.26.5-zte-fp +go1.26.5 time 2026-07-01T21:24:27Z