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DT: Add DTB 8-byte alignment compliance test - #797

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chetan-rathore merged 1 commit into
ARM-software:mainfrom
VEP04:user/vepav01/PJ03164-4059
Sep 4, 2026
Merged

chetan-rathore merged 1 commit into
ARM-software:mainfrom
VEP04:user/vepav01/PJ03164-4059

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@VEP04 VEP04 commented Sep 3, 2026

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Adds a Device tree ACS test to validate the address of the DTB published.

The change adds dtb_alignment_test.py to the Device tree ACS flow and uses the DTB Table address reported in dmem.log as the input for validation.

The checker verifies that:

  1. The reported DTB address is present
  2. The DTB address is aligned to an 8-byte boundary, as required by the Devicetree specification.
  3. Invalid, missing, or misaligned DTB addresses are reported as failures.

Add a Devicetree ACS test to validate that the DTB Table
address reported in dmem.log is non-zero and 8-byte aligned.

The change adds dtb_alignment_test.py, integrates the test
into the Devicetree flow, and generates a dedicated log for
alignment validation results.

Signed-off-by: VEP333 <VE.Pavithraja@arm.com>
Change-Id: I61b68adec0be5a44b1acff960af63f695f70b85b
@chetan-rathore
chetan-rathore merged commit 980960d into ARM-software:main Sep 4, 2026
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2 participants