Add test for S_L7RAS_2 - Add simple register check to see if FEAT_SpecSEI is 0 (not supported)
Justification:
- Arm ARM requires that “All Error exceptions generated by speculative memory accesses are taken as an asynchronous SError exception”.
- The PE implements ID_AA64MMFR1_EL1.SpecSEI = 0, indicating that it never generates an SError exception due to an External abort on a speculative read, including speculative instruction fetches.
- As discussed with ATG RAS architects, speculative writes do not present a viable external-error scenario while still speculative.
- Therefore, Arm ARM compliance + SpecSEI=0 provides sufficient indication of compliance with S_L7RAS_2.
Add test for S_L7RAS_2 - Add simple register check to see if FEAT_SpecSEI is 0 (not supported)
Justification: