FPGA Implementation and Interfacing

FPGA designs, testbenches, and interfacing experiments validating hardware implementations of digital circuits.

Hardware-validation companion to Digital-IC-Functionality-Duplication-Using-NN — provides physical-FPGA confirmation that the neural-network-duplicated circuits reproduce real digital behaviour.

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What's here

FPGA-Implementation-and-Interfacing/
├── Quartus_Projects/   # FPGA design projects (schematics, VHDL)
├── Testbenches/        # Simulation testbenches
├── Interfacing/        # GPIO / LED / switch / 7-seg / peripheral examples
└── Docs/               # Pin assignments, hardware setup notes

Run on hardware

git clone https://github.com/Anjanamb/FPGA-Implementation-and-Interfacing.git
cd FPGA-Implementation-and-Interfacing

1. Install Intel Quartus Prime
2. Open a project from Quartus_Projects/
3. Set the FPGA board model + pin assignments (see Docs/ for the matching board)
4. Compile and program the FPGA
5. Verify via physical inputs (switches, buttons) and outputs (LEDs, 7-segment displays)

Interfacing experiments

• Switches → LEDs (basic I/O validation)
• Counters on 7-segment displays
• Shift registers driven by button inputs
• Clock dividers for timing signals
• UART / external communication setups

Sibling projects

• Sequential-Logic-Datasets-with-Designs — the dataset side
• Digital-IC-Functionality-Duplication-Using-NN — the NN-duplication side (IEEE 2023)

Together: design → dataset → NN model → FPGA hardware validation.

License

MIT — see anjanamb.github.io for more projects.