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Feat/e2 conformance#7

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Charliechen114514 merged 9 commits into
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feat/e2-conformance
Jun 25, 2026
Merged

Feat/e2 conformance#7
Charliechen114514 merged 9 commits into
mainfrom
feat/e2-conformance

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Clear three residual correctness bugs that the coverage matrix marked
"done" but were genuinely wrong:

- 32-bit adc.w/sbc.w shifted-register form was entirely missing
  (no case 10/11 in t32_dataproc_reg) -> IllegalInstruction. The
  "implemented" status only covered the immediate form.
- 16-bit adcs/sbcs (op 5/6) computed the right result but never wrote
  C/V (only update_nz) -> flags silently stale.
- SDIV INT_MIN/-1 is C signed overflow (UB) -> saturate to INT_MIN, now
  guarded (the old a/b was UB). SDIV/0 stays 0 for both signs -- the
  QEMU differential oracle (scripts/qemu_cortex_m3_oracle.sh) caught and
  rejected an initial "negative -> INT_MIN" misreading of the spec.

Add carry-in-aware flag helpers (set_adc_flags/set_sbc_flags) using a
64-bit sum so C/V are correct even at the 0xFFFFFFFF+carry edge where
the prior "fold Cin into operand" trick wrapped and mis-reported C.
Used uniformly across the 16-reg / 32-imm / 32-shifted-reg forms.

11 objdump-verified conformance tests (result value + N/Z/C/V via
MRS APSR). ctest 312/312 green, no E2E/CLI regression. All Tier-1
semantics cross-checked vs qemu-system-arm mps2-an385. See
document/notes/017.
…t (E2 T2)

Tier 2 of the E2 conformance milestone (same branch as T1):

- scripts/qemu_cortex_m3_oracle.sh: assembles a tiny Thumb program
  (SDIV/UDIV edge cases + ADC/SBC shifted-reg with flags), runs it under
  qemu-system-arm -M mps2-an385 via a gdbstub, and diffs the result/xPSR
  buffers. Toolchain confirmed present (qemu-system-arm 11.0.1 +
  arm-none-eabi-gdb). All Tier-1 semantics match QEMU line-for-line; the
  oracle caught the SDIV/0 spec error corrected in T1.

- test/firmware/armcc/build_corpus_opt.ps1: PowerShell build of the
  CubeF1 corpus at AC6 -O0/-O2/-Oz (run on Windows NTFS; WSL can't create
  Keil .__i). Applies the REGENERATE AC5->AC6 patches plus an opt-level
  injection into MiscControls, emitting <example>.ac6-<opt>.axf. Note AC6
  has no -Os; min-size is -Oz.

The -O0/-O2/-Oz firmware regression TESTS land once the user builds the
.axf corpus with the script above; see document/notes/018.
…(E2 T2)

D:\mf\STM32CubeF1 was cleared; rebuild it and correct the build script
against the real vendored CubeF1 structure:

- scripts/prepare_corpus.sh: rebuild the minimal CubeF1 subtree on
  /mnt/d/mf (== D:\mf) from third_party/STM32CubeF1, preserving the
  6-level include depth the .uvprojx files expect. Trims CMSIS
  DSP/Lib/docs/NN (~111M) -> 22M total. Verified.

- build_corpus_opt.ps1: the project file is Project.uvprojx (not
  STM32F103RB_Nucleo.uvprojx); OutputName=STM32F103RB_Nucleo. Fix two
  bugs in the first cut: wrong project name, and output clobber across
  opt levels (shared STM32F103RB_Nucleo\ dir). Now copies the whole
  MDK-ARM dir per opt (MDK-ARM-<opt>) for full output isolation, and
  injects -O<opt> via XML into only the C compiler (Cads) MiscControls
  rather than regex-hitting the assembler. See document/notes/018.
Three bugs surfaced running build_corpus_opt.ps1 on Windows:

- InsertAfter failed: PowerShell's XML ETS stringifies leaf elements,
  so $t.ToolsetName became "ARM-ADS" (string), not a node. Use
  SelectSingleNode to get real XmlNodes; also read/write via .InnerText.
- Opt flag was "-OO0": levels are "O0"/"O2"/"Oz" and the code prepended
  another "-O". Flag is now "-" + level ("-O0"/"-O2"/"-Oz").
- $LASTEXITCODE is not populated by Start-Process; use -PassThru and
  .ExitCode to read UV4's real exit code.

Also: suggest -NoProfile (skip $PROFILE / oh-my-posh noise). Verified
the .uvprojx has no default xmlns, so bare-name XPath resolves.
Add 9 opt-level firmware variants (GPIO/TIM/UART x O0/O2/Oz) built via
build_corpus_opt.ps1, and wire BootsClean gates for each. Per example
.text grows O0 > O2 > Oz, confirming the optimization levels are
distinct; all 9 boot clean in micro-forge. ctest 321/321 green.

This closes the Tier-2 opt-level regression gate: compiler codegen
variants (e.g. adc.w/sdiv emitted at -O2 but not -O0) are now exercised
beyond the single-level corpus. See document/notes/018.
@Charliechen114514 Charliechen114514 merged commit db53262 into main Jun 25, 2026
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@Charliechen114514 Charliechen114514 deleted the feat/e2-conformance branch June 25, 2026 12:35
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