CV32E40P CPU and Debug Module for Amaranth

Pre-converted from SystemVerilog to Verilog using sv2v

Name		Name	Last commit message	Last commit date
Latest commit History 9 Commits
.github/workflows		.github/workflows
3rdparty		3rdparty
amaranth_cv32e40p		amaranth_cv32e40p
harness		harness
.gitignore		.gitignore
.gitmodules		.gitmodules
LICENSE.txt		LICENSE.txt
README.md		README.md
convert_cv32e40p_sv2v.sh		convert_cv32e40p_sv2v.sh
convert_dm_wrap_sv2v.sh		convert_dm_wrap_sv2v.sh
pdm.lock		pdm.lock
pyproject.toml		pyproject.toml

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