We designed this ISA to be able to run 3 programs:
- Minimum/maximum Hamming distance from a given set of 8-bit values
- Multiply two 2's complement numbers
- Multiply three 2's complement numbers
We implemented this with an accumulator architecture that has 9-bit instructions and an 8-bit datapath. r0 is the accumulator register and r1-r7 are general purpose registers.
| Instruction | Type | Bit Breakdown | Example |
|---|---|---|---|
| BNZ | B | 3-bit opcode (011) 6-bit immediate |
Assume r0 != 0 and lut[8] = 3 1: bnz 8 2: add r0 3: add r1 Skips line 2 |
| BEZ | B | 3-bit opcode (100) 6-bit immediate |
Assume r0 == 0 and lut[8] = 3 1: bez 8 2: add r0 3: add r1 Skips line 2 |
| B | B | 3-bit opcode (111) 3-bit register operand |
Assume r4 == 6 and lut[6] == 3 1: b r4 2: add r0 3: add r1 Skips line 2 |
| LOAD | R | 3-bit opcode (010) 3-bit register (address) 3-bit function (000) |
Assume r1 = 0x4e and address 0x4e contains 0x23 load r1 Result: r0 = 0x23 |
| STORE | R | 3-bit opcode (010) 3-bit register (address) 3-bit function (001) |
Assume r1 = 0x4e and r0 contains 0x23 store r1 Result: [0x4e] = 0x23 |
| ADD | R | 3-bit opcode (000) 3-bit register 3-bit function (000) |
add r2 r0 = r0 + r2 |
| AND | R | 3-bit opcode (000) 3-bit register 3-bit function (001) |
and r2 r0 = r0 & r2 |
| XOR | R | 3-bit opcode (000) 3-bit register 3-bit function (010) |
xor r1 r0 = r0 ^ r1 |
| MOVE | R | 3-bit opcode (000) 3-bit register (dest), 3-bit function (101) |
move r1 r0 = r1 |
| SLT | R | 3-bit opcode (000) 3-bit register (check if r0 < this reg) 3-bit function (011) |
slt r1 r0 = r0 < r1 ? 1 : 0 |
| LSR | R | 3-bit opcode (000) 3-bit register, 3-bit function (110) |
lsr r1 r0 = r0 >> r1 |
| LSL | R | 3-bit opcode (000) 3-bit register, 3-bit function (111) |
lsl r1 r0 = r0 << r1 |
| MOVI | I | 3-bit opcode (101) 6-bit immediate |
movi 0x3f r0 = 0x3f |
| RESET | ? | 3-bit opcode, 6-bit filler | Ex: reset = 1 reset bnz start |