srio_test

Test SRIO connection between FPGA (Kintex-7) and DSP (C6678).

Project built in Vivado 2016.3

Name		Name	Last commit message	Last commit date
Latest commit History 18 Commits
srio_test.cache		srio_test.cache
srio_test.hw		srio_test.hw
srio_test.ip_user_files		srio_test.ip_user_files
srio_test.runs		srio_test.runs
srio_test.sim/sim_1/behav		srio_test.sim/sim_1/behav
srio_test.srcs		srio_test.srcs
FSM.png		FSM.png
LICENSE		LICENSE
README.md		README.md
ip_upgrade.log		ip_upgrade.log
srio_test.xpr		srio_test.xpr
srio_testbench_behav.wcfg		srio_testbench_behav.wcfg
top.xdc		top.xdc

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