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cvw
cvw PublicForked from openhwgroup/cvw
CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional cache…
SystemVerilog
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ElemRV
ElemRV PublicForked from aesc-silicon/ElemRV
ElemRV - End-to-end Open-Source RISC-V Microcontroller
Scala
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RV-SCNN
RV-SCNN PublicForked from BaoBao-zhu/RV-SCNN
A Custom RISC-V Instruction Extension for SNN and CNN Computation
SystemVerilog
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