Sticky interrupt with hardware precedence and write-one-to-clear can not be cleared

[tenaliram]

Hi,
I have the following setting for an interrupt:
level intr; precedence hw; woclr;

This interrupt does not get cleared when I write a 1 to the interrupt bit. If I remove the "precedence hw" then it works as expected. However, the reason I need the "precedence hw" is to ensure that interrupt is generated if the register write and the interrupt condition occur in the same clock. Without the "precedence hw" I could miss the interrupt if the interrupt condition occurs at the same time as when software is trying to clear the interrupt.

Is there another method to do this?

Thanks,
Saurabh