Tools and dynamic telemetry map for AMD Granite Ridge (Zen 5) SMU management, specifically targeting the Ryzen 7 9800X3D under Linux.
- Hardware Architecture Mappings:
- TDC limit: Mapped to offset
0x3D(not 0x3C as previously assumed on Zen 4). AMD hardware explicitly prevents runtime modifications of TDC on the 9800X3D for thermal safety. - EDC limit: Mapped to offset
0x3C. - Curve Optimizer (CO): Write-only parameter. Local configuration caching ensures consistency across resets.
- TDC limit: Mapped to offset
- PM Table Mapping: Fully mapped the
0x724byte telemetry table (457 float32 values). FCLK, UCLK, MCLK, iGPU telemetry (power/clock/activity/current), per-core C-state residency (C0/C1/C6), L3/V-Cache temperatures, Tctl, SoC power/telemetry (voltage offsets d[87], d[95], d[97] are NOT voltage but efficiency/ease metrics), per-core IDD, and energy accumulators — all identified and documented with confidence levels. - Telemetry Access: Real-time data is natively exposed by the
ryzen_smudriver at/sys/kernel/ryzen_smu_drv/pm_table.
A lightweight command-line interface to read from and write boundaries to the hardware registers.
- Location:
tools/gnr_master.py - Usage:
sudo python3 tools/gnr_master.py
A comprehensive PyQt6-based dashboard for real-time telemetry monitoring. Visualizes per-Core frequencies, voltages, Pkg powers, real CPU usage (via /proc/stat), and Curve Optimizer offsets.
- Location:
tools/gui/gnr_master.py - Usage:
sudo python3 tools/gui/gnr_master.py
- BASELINE_SNAPSHOT.md: Exhaustive log of idle states, memory controllers, and structural pitfall documentation.
- PM_TABLE_MAP.md: Complete byte-by-byte layout of the telemetry table — all 457 floats documented with confidence levels (CONFIRMED/HIGH/MED/LOW).
research/: Archived scripts used during the initial automated fuzzing, iGPU correlation hunting, and payload sniffing.
- Linux Kernel: 6.10+
- Driver: The official ryzen_smu driver must be loaded (available in
ryzen_smu_source/). - Dependencies:
python3-pyqt6andpyqtgraphfor the GUI.
This is experimental software.
- Overriding hardware boundaries via the SMU mailbox is inherently dangerous. Exceeding PPT/EDC limits randomly could fry components.
- The 3D V-Cache operates strictly beneath an 89°C / 95°C max threshold.
- The SMU defaults are highly volatile and a hard reset will revert all software commands to the Motherboard's BIOS constraints.
This project is licensed under the MIT License - see the LICENSE file for details.
Reverse-engineered and maintained by Zorko & Antigravity - April 2026
