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Co-authored-by: OpenAI Codex <noreply@openai.com> Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Schedule shared-layout row blocks together and use 8-row CTAs at M9–16. Retain same-build ABBA timing and production KV allocation in the validation contract. Co-authored-by: OpenAI Codex <noreply@openai.com> Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Keep streaming loads for larger projections and preserve all arithmetic. Record 336 bitwise checks and the production configuration control separately from the interrupted candidate. Co-authored-by: OpenAI Codex <noreply@openai.com> Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Record the completed automatic-KV measurement, working-set timings, and the installed-binary M16/M32 discrepancy. Keep production speed acceptance on hold. Co-authored-by: OpenAI Codex <noreply@openai.com> Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Co-authored-by: OpenAI Codex <noreply@openai.com> Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Co-authored-by: OpenAI Codex <noreply@openai.com> Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Co-authored-by: Codex <noreply@openai.com> Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Wait for the current compute stream in both offload directions. H2D destination pages may still be undergoing zeroing when a load is submitted. Add CUDA regressions for contiguous and strided pages and stream reuse. Co-authored-by: Codex <noreply@openai.com> Signed-off-by: Leonccaa <166551845+Leonccaa@users.noreply.github.com>
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
…#561) [Kernel] Reduce DFlash2 weight and scale memory on SM70
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
…l-integration-20260914-025726 Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
…gration-20260914-025726 [Kernel] Default to FP32-accumulated 75T SM70 Q8000 prefill
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
…rency-20260914 [Kernel] Expand SM70 75T prefill to Q8192 and concurrent requests
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Adapt vllm-project/vllm#51865 (0a94d85a66499cad8297ead86a470967de5c0212) to the current target and Eagle/MTP draft paths. A K+1-token prompt tail must not replay a decode graph merely because its shape matches. Preserve dummy capture and genuine decode classification. Co-authored-by: Rahul Chalamala <22563365+rchalamala@users.noreply.github.com> Co-authored-by: Nick Hill <nickhill123@gmail.com> Co-authored-by: Janelle Cai <janelle.cai@modal.com> Assisted-by: OpenAI Codex Signed-off-by: Leonccaa <166551845+Leonccaa@users.noreply.github.com> (cherry picked from commit 1892fb2)
Route E4M3 GQA6/D256 prefill through the shared FP16 workspace and Q8192 FP32-accumulated kernel. Preserve E4M3 decode partials in FP32, repair long page-800 indexing, remove the artificial batch cap, and send resident small-query rows in mixed batches through paged XQA. Make the cold benchmark CUDA-graph-only, document the full-model gates, and fix CPython ABI suffixes for source-built SM70 pybind extensions. Co-authored-by: areslp <100579+areslp@users.noreply.github.com> Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com> Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
Signed-off-by: yangzhuxinyzx <153831768+yangzhuxinyzx@users.noreply.github.com>
…-parity-20260914-122513 [Kernel][SM70] Share FP16 attention fast paths with E4M3 KV
Signed-off-by: Leonccaa <166551845+Leonccaa@users.noreply.github.com> (cherry picked from commit fb808b7)
…ck-size factor Two review findings on the offload side of sparse Mamba retention: - The core offers each Mamba align boundary-state hand-off once. With semantic retention the state pools hold only a few slots per group, so prepare_store() can fail while those slots are pinned by in-flight loads, stores or a filesystem cascade; the offer was logged and lost while the attention blocks were stored, leaving a prefix that could never be restored. Pending offers now stay on the request and are retried every step (the source block remains owned by the request); a re-offer of the same boundary supersedes the older entry, and offers still pending when the request finishes or is preempted are dropped with a warning because the block is about to be reused. - Sparse retention keeps states on the GPU block grid while boundary stores need offloaded-block alignment, so kv_connector_extra_config block_size above the GPU block size would offload attention blocks without their Mamba state for most prompt lengths. SchedulerOffloadConfig now rejects that combination at start-up (dense retention still works); retaining offload-aligned checkpoints needs the core mask to learn the offload alignment and is left to the core policy. Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com> Signed-off-by: Leonccaa <166551845+Leonccaa@users.noreply.github.com> (cherry picked from commit 0b2d937)
Remove the validation-only MTP0 admission gate while retaining the SM70, FP16, TP4, calibrated-scale, and KV-quantization checks. The combined target and drafter path will be qualified end to end on CT252. Assisted-by: OpenAI Codex Signed-off-by: Leonccaa <166551845+Leonccaa@users.noreply.github.com>
Finalize standalone MTP QSA scale state after draft loading. Keep calibrated target scale validation strict while allowing explicit unit-scale fallback for uncalibrated speculative draft shards. Assisted-by: OpenAI Codex <codex@openai.com> Signed-off-by: Leonccaa <166551845+Leonccaa@users.noreply.github.com>
Separate cached XQA workspaces by KV format and allocate FP32 temporary output for E4M3, matching the Flash-V100 native ABI. Assisted-by: OpenAI Codex <codex@openai.com> Signed-off-by: Leonccaa <166551845+Leonccaa@users.noreply.github.com>
Fail fast when a Qwen4Exp speculative draft inherits E4M3 KV without calibrated QSA scales. Point operators to the supported independent FP16 draft cache instead of silently using unit scales that produced invalid proposals during CT252 qualification. Assisted-by: OpenAI Codex <codex@openai.com> Signed-off-by: Leonccaa <166551845+Leonccaa@users.noreply.github.com>
Build Eagle and MTP draft attention layers with the speculative KV cache override. This lets an FP16 draft cache remain independent when the target cache uses E4M3, matching the existing Model Runner V1 contract. Assisted-by: OpenAI Codex <codex@openai.com> Signed-off-by: Leonccaa <166551845+Leonccaa@users.noreply.github.com>
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Problem and resulting behavior
Qwen4Exp QSA rejected every E4M3 target KV configuration that also had a speculative drafter, even though the check recorded the original MTP0 qualification boundary. This draft removes that admission-only check and records the additional runtime work required for a safe MTP3 configuration.
The current branch now:
speculative_config.kv_cache_dtypein the Model Runner V2 Eagle/MTP loader.The SM70, FP16 activation, TP4, cache-format, and calibrated target-scale gates remain intact.
Integration baseline
1CatAI/main@02c87ab890, including [Kernel][SM70] Share FP16 attention fast paths with E4M3 KV 1CatAI/1Cat-vLLM#638.Duplicate-work check
Searched both
1CatAI/1Cat-vLLMandLeonccaa/1Cat-vLLMfor E4M3, MTP, and QSA work. 1CatAI#639 admits checkpoint-native FP8 MTP expert weights under pipeline parallelism; it does not change target KV dtype or the QSA E4M3/MTP0 admission check.Validation
Static and CPU checks
CT252 runtime findings
The runtime used the existing Qwen3.8 Flash-Next AWQ g32 target, native FP8 MTP3 weights, TP4, 262,144 max context, 8,192 batched-token budget, C4, and 32 GiB CPU KV offload.
ductplus repeated punctuation instead ofOK; all four short concurrent responses were wrong or empty; forced tool choice returned HTTP 500 after the grammar rejected token 0; speculative acceptance was 0/510 drafted tokens.CSA+linear layer 48 violates cache geometry, showing that the current cache grouper cannot build this mixed target/draft cache layout.OKin 0.58 seconds. This distinguishes the new E4M3/MTP interaction from the original [Bugfix][MRV2] Backport phase-aware decode graph dispatch 1CatAI/1Cat-vLLM#637 K+1 prefill/decode classification bug.Status
This PR remains draft. It is useful as the integration and evidence branch, but neither tested draft-cache arrangement is production-safe yet. The next gate is either calibrated E4M3 scales for the MTP QSA layer or cache grouping support for an FP16 draft beside an E4M3 target, followed by the same 804-token, tool-call, C4, and business-workload acceptance.
AI assistance from OpenAI Codex was used to inspect the dependency stack, prepare the integration branch, implement the changes, and run validation. Leon requested the configuration experiment and will review the result before production acceptance.