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[codex] Regenerate Linx model tables for v0.57 blocks#3

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zhoubot merged 2 commits into
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linx-isa-0.57
Jul 1, 2026
Merged

[codex] Regenerate Linx model tables for v0.57 blocks#3
zhoubot merged 2 commits into
mainfrom
linx-isa-0.57

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@zhoubot zhoubot commented Jul 1, 2026

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Summary

Regenerates linx-model ISA tables for the v0.57 descriptor names and block classes:

  • replaces combined B.IOT/B.IOTI table forms with B.ITP and B.OTA
  • updates BSTART.CUBE, BSTART.TMA, and BSTART.FIXP table names/templates

Validation

  • python3 tools/isa/check_pto_v057_downstream.py --strict from the superproject

Notes

This is the generated-table companion to the v0.57 block definition in the superproject.

Generated ISA tables now describe B.ITP, B.OTA, BSTART.CUBE, BSTART.TMA, and BSTART.FIXP names used by the v0.57 block contract.

Constraint: linx-model generated tables must match the public v0.57 descriptor spelling consumed by compiler, QEMU, and GFSIM

Rejected: Keep B.IOT/B.IOTI names in generated tables | they conflict with the split descriptor contract

Confidence: high

Scope-risk: narrow

Tested: python3 tools/isa/check_pto_v057_downstream.py --strict

Not-tested: Full linx-model regeneration pipeline

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Code Review

This pull request updates several instruction definitions in the generated ISA tables, renaming and restructuring block input/output and block split instructions (such as B.IOT to B.ITP, B.IOTI to B.OTA, and various BSTART forms). However, the changes introduce critical decoding and assembly ambiguities: both B.ITP and B.OTA instruction forms have identical mask and match values, which prevents the decoder from distinguishing between forms with and without the 'last' modifier. Additionally, renaming a block split instruction to BSTART.FIXP creates a duplicate assembly template with an existing entry, causing assembly ambiguity.

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Comment on lines +4828 to +4852
.mnemonic = "B.ITP",
.asm_template = "B.ITP [SrcTile0<.reuse>, SrcTile1<.reuse>], last, src_pair",
.encoding_kind = "L32",
.group = "Block Input & Output",
.uop_group = "CMD",
.uop_big_kind = "CMD",
.length_bits = 32,
.fixed_bits = 10,
.mask = 0x707fULL,
.match = 0x5013ULL,
.mask = 0x70ffULL,
.match = 0x2013ULL,
.field_start = 77,
.field_count = 8,
.constraint_start = 1,
.constraint_count = 0},
{.uid = "f6b1a38eb134",
.mnemonic = "B.IOT",
.asm_template = "B.IOT [SrcTile0<.reuse>, SrcTile1<.reuse>], group=0, ->DstTile<RegSrc>",
.mnemonic = "B.ITP",
.asm_template = "B.ITP [SrcTile0<.reuse>, SrcTile1<.reuse>], src_pair",
.encoding_kind = "L32",
.group = "Block Input & Output",
.uop_group = "CMD",
.uop_big_kind = "CMD",
.length_bits = 32,
.fixed_bits = 10,
.mask = 0x707fULL,
.match = 0x4013ULL,
.mask = 0x70ffULL,
.match = 0x2013ULL,

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high

Both B.ITP instruction forms (UID 5537088c4f03 and f6b1a38eb134) have identical .mask (0x70ffULL) and .match (0x2013ULL) values. This creates a decoding ambiguity because the instruction decoder cannot uniquely distinguish between the form with the last modifier and the form without it based on the opcode mask and match. If last corresponds to a specific bit in the instruction encoding, that bit needs to be included in the mask and differentiated in the match values (similar to how bit 12 was used to distinguish the original B.IOT forms).

Comment thread src/isa/generated_tables.cpp Outdated
Comment on lines +4858 to +4882
.mnemonic = "B.OTA",
.asm_template = "B.OTA ->DstTile<CellCountM1>, dst_slot",
.encoding_kind = "L32",
.group = "Block Input & Output",
.uop_group = "CMD",
.uop_big_kind = "CMD",
.length_bits = 32,
.fixed_bits = 10,
.mask = 0x707fULL,
.match = 0x6013ULL,
.mask = 0x70ffULL,
.match = 0x3013ULL,
.field_start = 93,
.field_count = 8,
.constraint_start = 1,
.constraint_count = 0},
{.uid = "fb045cf4149a",
.mnemonic = "B.IOTI",
.asm_template = "B.IOTI [SrcTile0<.reuse>, SrcTile1<.reuse>], group=1, ->DstTile<Size>",
.mnemonic = "B.OTA",
.asm_template = "B.OTA ->DstTile<CellCountM1>, last, dst_slot",
.encoding_kind = "L32",
.group = "Block Input & Output",
.uop_group = "CMD",
.uop_big_kind = "CMD",
.length_bits = 32,
.fixed_bits = 10,
.mask = 0x707fULL,
.match = 0x7013ULL,
.mask = 0x70ffULL,
.match = 0x3013ULL,

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high

Both B.OTA instruction forms (UID 0be0ecce86bb and fb045cf4149a) have identical .mask (0x70ffULL) and .match (0x3013ULL) values. This causes a decoding collision where the decoder cannot differentiate between the form with the last modifier and the form without it. The mask and match values must be updated to incorporate the bit that distinguishes these two forms.

Comment thread src/isa/generated_tables.cpp Outdated
Comment on lines +5503 to +5504
.mnemonic = "BSTART.FIXP",
.asm_template = "BSTART.FIXP Function, DataType",

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high

Renaming this form (UID 211446509efb) to BSTART.FIXP with the template BSTART.FIXP Function, DataType creates a duplicate assembly template with the existing BSTART.FIXP form (UID 3b0ae11126a6 on line 5142). This duplicate template causes assembly ambiguity, as the assembler cannot distinguish between the two forms during code generation. If these forms are now unified, they should be merged into a single entry rather than maintained as separate entries with identical assembly templates.

The generated B.ITP and B.OTA descriptor rows need distinct last-bit encodings, and fixed opcode bits must dominate overlapping field packing. This records the reviewed descriptor forms and adds a unit smoke to keep last/non-last encodings separated.

Constraint: v0.57 has no legacy block descriptor mode to fall back to.

Confidence: high

Scope-risk: narrow

Tested: cmake --build build --target linx_model_ut_minst -j8

Tested: ./build/linx_model_ut_minst
@zhoubot zhoubot merged commit b941642 into main Jul 1, 2026
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