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Merged
Menooker merged 2 commits into from
Aug 2, 2024
Merged

Align with new LLVM version used in GC #2

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42e6f28
Update llvm version
dchigarev Aug 1, 2024
48c4c2c
remove invalid patch
dchigarev Aug 1, 2024
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2 changes: 1 addition & 1 deletion build_tools/llvm_version.txt
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Original file line number Diff line number Diff line change
@@ -1 +1 @@
37661a17e26d9002ae9ade8c0de3932c22f16360
89946bda5e1c7ceaf6d26634cc8c8c9498d9f7be
28 changes: 0 additions & 28 deletions build_tools/patches/0006-fix-segment-fault-in-applySignatureConversion.patch
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This file was deleted.

14 changes: 7 additions & 7 deletions lib/Conversion/XeGPUToVC/XeGPUToVC.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -783,7 +783,7 @@ class GatherScatterToRawSend : public OpConversionPattern<OpType> {
payLoad = rewriter.create<vector::InsertOp>(loc, base, payLoad, 0);
SmallVector<int64_t, 16> indices(16, 0);
payLoad = rewriter.create<mlir::vector::ShuffleOp>(
loc, payLoad, payLoad, rewriter.getI64ArrayAttr(indices));
loc, payLoad, payLoad, indices);
auto createDescOp =
op.getTensorDesc().template getDefiningOp<xegpu::CreateDescOp>();
auto offsets = rewriter.getRemappedValue(createDescOp.getOffsets());
Expand Down Expand Up @@ -886,7 +886,7 @@ class AtomicToLsc : public OpConversionPattern<::mlir::xegpu::AtomicRMWOp> {

SmallVector<int64_t, 16> indices(16, 0);
payLoad = rewriter.create<mlir::vector::ShuffleOp>(
loc, payLoad, payLoad, rewriter.getI64ArrayAttr(indices));
loc, payLoad, payLoad, indices);
auto createDescOp = op.getTensorDesc().getDefiningOp<xegpu::CreateDescOp>();
auto offsets = rewriter.getRemappedValue(createDescOp.getOffsets());
payLoad = rewriter.create<arith::AddIOp>(loc, payLoad, offsets);
Expand Down Expand Up @@ -1232,7 +1232,7 @@ struct VectorExtractVC final
llvm::SmallVector<int64_t, 2> indices(size);
std::iota(indices.begin(), indices.end(), linearizedOffset);
rewriter.replaceOpWithNewOp<mlir::vector::ShuffleOp>(
extractOp, vec, vec, rewriter.getI64ArrayAttr(indices));
extractOp, vec, vec, indices);
} else { // use CompositExtract for scalar result
rewriter.replaceOpWithNewOp<mlir::vector::ExtractOp>(extractOp, vec,
linearizedOffset);
Expand Down Expand Up @@ -1338,7 +1338,7 @@ struct VectorExtractStridedSliceVC final
}
// perform a shuffle to extract the kD vector
rewriter.replaceOpWithNewOp<vector::ShuffleOp>(
extractOp, srcVector, srcVector, rewriter.getI64ArrayAttr(indices));
extractOp, srcVector, srcVector, indices);

return success();
}
Expand Down Expand Up @@ -1392,16 +1392,16 @@ struct VectorShuffleVC final

SmallVector<int64_t, 2> indices(totalSize);
for (auto [i, value] :
llvm::enumerate(mask.getAsValueRange<IntegerAttr>())) {
llvm::enumerate(mask)) {

int32_t v = value.getZExtValue();
int32_t v = value;
std::iota(indices.begin() + shuffleSliceLen * i,
indices.begin() + shuffleSliceLen * (i + 1),
shuffleSliceLen * v);
}

rewriter.replaceOpWithNewOp<vector::ShuffleOp>(
shuffleOp, vec1, vec2, rewriter.getI64ArrayAttr(indices));
shuffleOp, vec1, vec2, indices);

return success();
}
Expand Down
2 changes: 1 addition & 1 deletion lib/Transforms/PropagatePackedLayout.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -330,7 +330,7 @@ makeCast(mlir::OpBuilder &builder, mlir::Value src, mlir::Type srcType,

tmp = builder.create<mlir::vector::ShuffleOp>(
loc, tmp, tmp,
builder.getI64ArrayAttr(getVNNIShuffleIndices(srcVecType, dstVecType)));
getVNNIShuffleIndices(srcVecType, dstVecType));

return {builder.create<mlir::vector::ShapeCastOp>(loc, dstVecType, tmp),
root};
Expand Down
14 changes: 7 additions & 7 deletions lib/Transforms/VectorLinearize.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -140,7 +140,7 @@ struct VectorExtractStridedSliceConversion final
// perform a shuffle to extract the kD vector
rewriter.replaceOpWithNewOp<mlir::vector::ShuffleOp>(
extractOp, dstType, srcVector, srcVector,
rewriter.getI64ArrayAttr(indices));
indices);
}
return mlir::success();
}
Expand Down Expand Up @@ -180,16 +180,16 @@ struct VectorShffleOpConversion final

llvm::SmallVector<int64_t, 2> indices(totalSize);
for (auto [i, value] :
llvm::enumerate(mask.getAsValueRange<mlir::IntegerAttr>())) {
llvm::enumerate(mask)) {

int64_t v = value.getZExtValue();
int64_t v = value;
std::iota(indices.begin() + shuffleSliceLen * i,
indices.begin() + shuffleSliceLen * (i + 1),
shuffleSliceLen * v);
}

rewriter.replaceOpWithNewOp<mlir::vector::ShuffleOp>(
shuffleOp, dstType, vec1, vec2, rewriter.getI64ArrayAttr(indices));
shuffleOp, dstType, vec1, vec2, indices);

return mlir::success();
}
Expand Down Expand Up @@ -232,7 +232,7 @@ struct VectorExtractOpConversion final
std::iota(indices.begin(), indices.end(), linearizedOffset);
rewriter.replaceOpWithNewOp<mlir::vector::ShuffleOp>(
extractOp, dstTy, adaptor.getVector(), adaptor.getVector(),
rewriter.getI64ArrayAttr(indices));
indices);
}

return mlir::success();
Expand Down Expand Up @@ -298,11 +298,11 @@ struct VectorInsertOpConversion final
0);
auto modifiedSource = rewriter.create<mlir::vector::ShuffleOp>(
insertOp.getLoc(), dstTy, adaptor.getSource(), adaptor.getSource(),
rewriter.getI64ArrayAttr(modifiedSrcIndices));
modifiedSrcIndices);

rewriter.replaceOpWithNewOp<mlir::vector::ShuffleOp>(
insertOp, dstTy, adaptor.getDest(), modifiedSource,
rewriter.getI64ArrayAttr(indices));
indices);

return mlir::success();
}
Expand Down