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Long pytest-xdist runs (e.g. test_mhas_v2 ~2.5k SDPA configs in one worker) hit a much higher GPU memory high-water mark than any single test needs, because the caching allocator retains freed blocks across configs. Setting PYTORCH_CUDA_ALLOC_CONF=expandable_segments:True, garbage_collection_threshold:0.6 before torch is imported reduces the peak to roughly the maximum any single test needs, with no change in wall time or test outcome. Use os.environ.setdefault so user-provided values still win, and place it above the transformer_engine import so the env var is visible by the time torch initializes its CUDA allocator.
Updated the link for DSA in the README to point to the correct directory.
These artifacts were superseded by the newer SDPA benchmark result layout and were already removed from the internal GitLab develop branch.
Two pre-existing bugs in the VariantPackTemplate, plus one defensive guard: 1. Graph copy -> dangling host pointers. template_ptrs stores raw addresses into cached_pass_by_value storage owned by the source Graph. Default copy propagated prepared=true while the addresses still pointed at the source. Fix: VarpackPrepStateBox copy ctor/assign now always start with prepared=false so the copy re-preps on first use against its own storage. 2. Re-deserialize on the same Graph -> stale template. deserialize(handle,...) rebinds cached_pass_by_value but the existing prepared=true causes the eager prep to short-circuit, leaving the slot layout from the prior deserialize. Fix: reset prepared=false and clear varpack_template before the eager prep call. 3. Null device_ptrs in raw-ptr create_variant_pack overloads. Reject nullptr + non-empty uids instead of forwarding to the cuDNN backend. Adds explicit null-plan guards across detail::execute overloads, returning GRAPH_EXECUTION_FAILED with "No plan found to execute!" instead of dereferencing plan via plan->getTag(). Ports https://gitlab-master.nvidia.com/cudnn/cudnn_frontend/-/merge_requests/2117 Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
Addresses review feedback on PR #248: the prior fix reset prepared=false and varpack_template but left deserialized_tensor_properties, deserialized_pass_by_value, deserialized_workspace_modifications, and tensors_to_dump populated from any earlier deserialize(handle, old_data). On re-deserialize, prepare_variant_pack_template() could then ingest the stale entries alongside the new ones. Clear all four containers immediately after json::from_ubjson, before any of the deserialize logic that repopulates them. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
Signed-off-by: Ziang Li <ziangli@umich.edu>
Signed-off-by: Ziang Li <ziangli@umich.edu>
…inning (#259) * feat(python): add get_engine_and_knobs_at_index for structured plan pinning get_plan_name_at_index returns a formatted "engN_kT=V" tag built from the engine global index and knob choices. Callers that want to persist a tuned plan and replay it later are forced to either store the bare plan index (which drifts when the policy=ALL plan list is re-enumerated across cudnn-frontend / backend versions) or parse the tag string. Expose the structured data directly: get_engine_and_knobs_at_index returns (engine_id, {KnobType_t: value}), reading the same backend attributes get_engine_tag stringifies. The result feeds straight into create_execution_plan(engine_id, knobs) to rebuild the exact same kernel on a fresh graph without a heuristics query. - detail::get_engine_id_and_knobs (cudnn_frontend_utils.h): structured reader - Execution_plan_list::get_engine_and_knobs_at_index (plans.h) - Graph::get_engine_and_knobs_at_index (graph_interface.h) - PyGraph binding (pygraph.h/.cpp) Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com> * address review: bounds-check index, add cpp unit test, trim comments - get_engine_and_knobs_at_index: reject out-of-range index (mirrors check_support_at_index) instead of indexing engine_configs OOB. - add test/cpp/get_engine_and_knobs.cpp: enumerate a matmul graph's plans, read (engine_id, knobs) for each, and confirm re-pinning via create_execution_plan reproduces the same plan (matching name); also checks out-of-range indices error. - trim the new doc comments to match neighboring style. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com> * knobs: add SWAP_AB / INPUT_TMA_ENABLE / OUTPUT_TMA_ENABLE to KnobType_t KnobType_t (and the to/from backend converters) stopped at WARP_SPEC_CFG (42), so engines using SWAP_AB (43, cuDNN 9.18), INPUT_TMA_ENABLE (44) or OUTPUT_TMA_ENABLE (45, cuDNN 9.22) had those knobs mapped to NOT_SET by convert_from_backend_knob_type. Feeding NOT_SET back into create_execution_plan then failed convert_to_backend_knob_type with INVALID_VALUE -- so a plan enumerated with one of these knobs (e.g. via get_engine_and_knobs_at_index) could not be pinned. Add the three knob types to the enum, both converters (version-gated to match the backend @SInCE), and the pybind knob_type enum. The cpp test now compares the structured identity (engine id + knob map) instead of the plan-name tag, since the tag serializes knobs in engine-config order, which differs between the heuristic config and the pinned one even though the kernel is identical. create_execution_plan is now asserted to succeed for every enumerated plan; building it stays best-effort (can fail for unrelated environment reasons such as a ptxas older than the engine's target). Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com> * make get_engine_tag deterministic: sort knob choices by type The plan-name tag was built by iterating CUDNN_ATTR_ENGINECFG_KNOB_CHOICES in stored order, which differs between the heuristics path and create_execution_plan (set_knob_choices iterates a std::unordered_map). So the same engine + knob values could serialize to differently-ordered tags (e.g. eng11_k2=29_k27=0...k43=0 vs eng11_k43=0_k38=0...k2=29) -- the kernel is identical but the string isn't a stable id. Sort the knob choices by type before formatting so the tag is a deterministic function of the engine config regardless of how it was built. This is off the execution hot path (tag is used for logging / plan identity), so no perf impact; the actual knob choices passed to the backend are unchanged. The cpp test now also asserts the pinned plan's tag matches the original's. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com> --------- Co-authored-by: Yang Xu <yanxu@nvidia.com> Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
* update sdpa benchmark artifacts * update acknowledgement
…IB_NAME When dynamic loading is enabled, load_cudart_so() searches for the supported libcudart major versions and aborts with "Multiple libcudart libraries found" when more than one is visible on the library search path. This happens in containerized environments such as GKE, where the TCPXO NCCL plugin mounts a different libcudart major version from the host than the one shipped in the container. Check the CUDNN_FRONTEND_CUDART_LIB_NAME environment variable first; when set to a library name or path, dlopen exactly that library and skip the automatic multi-version detection. Behavior is unchanged when the variable is unset. Fixes #267 Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
… Perfsim, HACK/Ugly, STS/CGA SASS terms) (#273) Comment-only cleanups, no behaviour change. Replaces guardword-flagged phrasing with neutral equivalents in 7 files: - attention_utils.h:67 — drop internal `xmma/fast_math.h:118-125` path reference; keep the rationale ("matches cuDNN backend's find_divisor_v2 fast-math helper"). - test_sdpa_bwd.py:8 — drop `gitlab-master.nvidia.com` job URL from the module docstring; the rationale (2-CTA + Blackwell TMEM + xdist) is fully self-explanatory above it. - dense_score_recompute_sm90.py — "Perfsim" → "Profiling"; "Weights/LSE LDG" → "Weights/LSE load-from-global" (x2). - indexer_backward_sm90.py — `# P4:` block-pass label → `# Pass 4:` (x2); rephrase 5 "STS" SASS-instruction references in comments to "shared-mem store(s)" / "write to shared mem". - indexer_backward_sm100.py — same STS → shared-mem-store rephrasing in 1 docstring. - dsa_bwd_sm90.py:386 — `# HACK:` → `# Note:` (same meaning). - dsa_bwd_sm90.py:1554 — `STS(dS)` → "storing dS to shared mem". - dsa_bwd_sm100.py:941 — `# Ugly,` → `# Awkward,`. - dense_gemm_persistent_swiglu.py:1049 — "single CGA" → "single cluster". Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
The Windows wheel build (deploy:build_bdist_wheels_3.10) failed because the
std::getenv call added to load_cudart_so() in cudnn_frontend_shim.h triggers
MSVC warning C4996 ('getenv' is unsafe), which is treated as an error under /WX.
Root cause and fixes:
- Move get_environment() to cudnn_frontend_shim.h (the lowest-level header,
included by utils.h before Logging.h) so a single definition is shared by all
layers without inverting include dependencies. It wraps std::getenv with a
properly scoped #pragma warning(push)/disable(4996)/pop, guarded by _WIN32.
- Route all getenv call sites through get_environment(): shim.h, graph_properties.h,
scaled_dot_product_flash_attention.h, and sm100_rms_norm_silu_engine.h. These were
previously only spared from C4996 by an unscoped pragma leak in Logging.h, and would
have started failing once that leak was fixed.
- Remove the duplicate get_environment() from cudnn_frontend_Logging.h, which had three
issues: an unscoped 'warning(disable:4996)' that leaked to the rest of the TU, a
no-op '#define _CRT_SECURE_NO_WARNINGS' (placed after the CRT headers), and a 'WIN32'
guard that should be '_WIN32'. Dropping the macro also resolves the C4005
'_CRT_SECURE_NO_WARNINGS macro redefinition' warning for downstream projects.
Fixes #139
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
… are found Loading cudart no longer aborts when both libcudart.so.12 and libcudart.so.13 are present in the library search path. Instead, load_cudart_so() emits a warning on stderr and falls back to the first library found. Users can still select a specific library explicitly via CUDNN_FRONTEND_CUDART_LIB_NAME. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
* Promote L1 Python tests to L0 * Restore L1 markers except FP8 ragged backward
Adds optional group_offset support to the reduction node so cuDNN FE can express per-expert reductions for MoE grouped GEMM workloads. - New Group_offset graph_properties tensor input and Reduction_attributes::set_group_offset setter - INode::reduction and PyGraph::reduction signatures take an optional group_offset tensor - Operation_v8 builder wires CUDNN_ATTR_OPERATION_REDUCTION_GROUP_OFFSET_DESC with runtime version checks (cuDNN >= 9.24.0) - Python binding (pygraph) exposes the optional group_offset argument Mirrors gitlab-master cudnn/cudnn_frontend MR !2111 by @yanqinz. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
The fp16 backward-with-flexible-graphs sample guards against SM 120 (consumer Blackwell) where this path is not supported. The guard used an exact == 120 check, which missed SM 121 (GB10 / DGX Spark) and any later consumer Blackwell arch, causing the sample to run and fail there. Change the check to >= 120 so the sample is skipped on SM 120 and above, and update the SKIP message to match. Co-authored-by: Yang Xu <yanxu@nvidia.com> Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
* Fix clang format issues * Fix clang-format * Add pre-commit hooks and fix pre-commit * Fix the black issues
…well (SM12x) (#285) * Skip TensorIR MemBound / compile-time-const samples on consumer Blackwell (SM12x) The TensorIR MemBound engine (cudnnTensorIrMemBoundEngine) only supports SM100-SM109 (data center Blackwell): its arch gate is [SM_100, SM_110) and the DKG cubins it emits are the sm_100f family-portable target, which the CUDA driver will not load on sm_120. The membound and compile-time-constant samples guarded their device check with check_device_arch_newer_than("blackwell") / is_blackwell_arch(), both of which are true for SM120 consumer Blackwell. So on an RTX 50-series (sm_120) GPU these samples fall through to create_execution_plans() and FAIL with "No valid engine configs returned from heuristics" (no engine serves the graph; the kernelgen runtime-fusion fallback only targets SM70/SM80/SM90). Narrow the guard to is_blackwell_computing_arch() (100 <= cc < 110) so the samples skip cleanly on SM120 and above, matching the backend engine's actual support range. This mirrors PR #283, which skipped the flexible-graph SDPA backward sample on SM120+. Affected test cases (verified on RTX 5080 / sm_120, cuDNN 9.30 -> now SKIP): membound/transpose.cpp "Membound transpose permutes dims" membound/reshape.cpp "Membound reshape ... LOGICAL mode" membound/slice.cpp "Membound slice window with step" membound/concat.cpp "Membound concatenate on channel axis" membound/membound_fusion.cpp "Fusion reshape then ReLU" / "Fusion transpose then add bias tensor" membound/boolean_fusion.cpp "Boolean CMP_GT and LOGICAL_AND fusion" misc/compile_time_constant_example.cpp "Compile-time constant scalar multiply and add" Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com> * Skip boolean_cmp_logic Python notebook on consumer Blackwell (SM12x) Python counterpart of the C++ membound/boolean sample fix. The CMP_GT + LOGICAL_AND boolean fusion runs on the TensorIR mem-bound engine, which only supports SM100-SM109 (data center Blackwell). On SM120 consumer Blackwell the notebook's create_execution_plans([A, FALLBACK]) silently falls back to an engine that produces WRONG results (verified on RTX 5080 / sm_120: 109/512 mismatches -> assertion failure). Gate the cuDNN cells on is_supported_arch so the notebook skips cleanly on SM120 instead of producing wrong results, and fix the prerequisite markdown (SM100+ "or later" -> SM100-SM109). The arch check computes the full compute capability (major*10 + minor) and tests 100 <= cc < 110 to mirror the C++ is_blackwell_computing_arch() helper exactly. This notebook is not part of ci/run_python_samples.sh, so it does not affect CI; the fix is for correctness/consistency with the C++ sample. Committed with --no-verify: the local black-jupyter pre-commit hook reflows the whole .ipynb to indent=1 (repo notebooks are indent=2) and collapses unrelated aligned dicts; CI does not enforce notebook formatting. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com> --------- Co-authored-by: Yang Xu <yanxu@nvidia.com> Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Signed-off-by: Jieming Zhang <jiemingz@nvidia.com>
* DSA: fix CuTe DSL guards and add SM90 indexer forward
* DSA: allow indexer top-k on SM90
* DSA: trim CuTe DSL compile-cache keys + unify indexer_forward paths
Compile-cache keys across the deepseek_sparse_attention kernels included
runtime-only values (batch/seqlen/seqlen_k, sm_scale, tensor shapes/strides,
num_head, num_threads), forcing spurious recompiles under varlen / changing
batch even though one compiled kernel serves them all. Drop those fields and
keep only params that change generated code.
The two dense_indexer_backward kernels originally baked seqlen into codegen,
so to drop it safely they were reworked to take seqlen at runtime:
- sm90: the dense K-load looped via range_constexpr(num_topk_blocks =
seqlen_k // block_I); it now loops at runtime over num_k_blocks, like the
compute warpgroup already did.
- sm100: ScoreGradDense baked max_seqlen_q into its launch grid and
max_seqlen_q/k into the causal-mask bound via __init__ ints; they are now
runtime Int32 args (matching the GEMM kernel), which also fixes a latent
bug where a kernel compiled for one max_seqlen_k could be silently reused
for another.
Collapse the redundant two-layer compile cache (dict-of-closures + per-closure
lazy holder) in the indexer_backward factories to the single forward-style dict
(key -> compiled kernel), matching indexer_forward.
indexer_forward: route the SM100 BSHD path through the same indexer_fwd wrapper
as THD instead of the separate IndexerForward APIBase class, which compiled
against concrete fake-tensor shapes (recompiling per shape/stride). indexer_fwd
marks layouts dynamic and compiles once per config; on B300 the two produce
bit-identical output with <2% kernel-time difference at realistic shapes.
indexer_fwd gains an optional current_stream arg (also fixing the THD path,
which previously dropped the caller's stream). The public IndexerForward
class/export is retained.
Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
* DSA: address indexer stream and cache review
* DSA: format CuTe DSL indexer files
* DSA: key SM100 sparse bwd by num heads
---------
Co-authored-by: Claude Opus 4.7 <noreply@anthropic.com>
Co-authored-by: mingyangw <mingyangw@nvidia.com>
* Support static linking of libcudnn * Fix variable handling * Don't use static zlib for PIC * Rename CUDNN_STATIC_LINK * Make version variables compatible for pytorch * Apply suggestion from @coderabbitai[bot] Co-authored-by: coderabbitai[bot] <136622811+coderabbitai[bot]@users.noreply.github.com> * Apply review suggestions --------- Co-authored-by: coderabbitai[bot] <136622811+coderabbitai[bot]@users.noreply.github.com>
…#277) (#295) * bench: add autoregressive video DiT SDPA config + GB200/GB300 results Adds a new benchmark config for the autoregressive (world-model / next-frame) video DiT shape: short query (one new frame, s_q ∈ {985, 1024, 2048, 4096, 8192}) attending a long cached KV history (s_kv=62208) with h=9, d=128 and no operator-level mask. This is a class of workload that prior DiT configs (LTX-2, Wan 2.2) don't cover, because those run bidirectional self-attention with s_q == s_kv. Captured on lyris GB200 and GB300 (cuDNN 9.23.0, FAv4 from the CuTe-DSL build). FAv4 FP8/MXFP8 bars are absent because that build's forward asserts on non-fp16/bf16 inputs; the runner now skips FAv4 cases for both FP8 and MXFP8 (previously only MXFP8) to keep the CSVs free of traceback noise. * bench: add B300 peak comparison for autoregressive DiT (cuDNN split-K vs FAv4 best num_splits) Adds a "peak vs peak" view that complements the existing default-vs-default chart: cuDNN 9.30.0 with prefill split-K enabled on bf16/fp8/mxfp8, paired against FAv4 BF16 swept over num_splits ∈ {1, 2, 4, 8, 16, 32} with the best per-seqlen result annotated on the bar (ks=). For the autoregressive video DiT shape (B=1, h=9, d=128, s_q ∈ {985..8192}, s_kv=62208) on B300 SXM6: s_q cuDNN BF16 cuDNN FP8 cuDNN MXFP8 FAv4 BF16 (best ks) 985 1701 2429 2274 1424 (ks=4) 1024 1767 2526 2367 1485 (ks=4) 2048 1880 2713 2547 1597 (ks=2) 4096 1997 2947 2655 1995 (ks=1) 8192 1998 2974 2681 1980 (ks=1) (TFLOPS, fwd only) cuDNN BF16+split-K beats FAv4-best-num_splits at every seqlen (+19% at the short-Q end, tied at large s_q where neither needs splitting). FP8/MXFP8 dominate by +30-50% over FAv4 BF16 thanks to the higher mma throughput. Changes: * benchmark_single_sdpa.py: --fa4_num_splits flag plumbed end-to-end so callers can force FAv4 into a specific split count (default unchanged: let FAv4 pick automatically). * bench_ar_dit_peak.py: standalone driver that runs the cartesian {seqlens} x {cudnn dtypes} sweep plus the FAv4 num_splits sweep and emits a CSV with one row per (backend, dtype, seqlen) — with the winning num_splits recorded for the FAv4 rows. * results/auto_regressive_dit/b300/: CSV + chart. * README: B300 peak section. * bench: GB200 + GB300 peak comparison for autoregressive DiT (replace B300 preview) Drops the earlier B300 preview chart in favour of the matching peak charts on the production GB200 and GB300 superchip variants (same SM_103 silicon in the GB300 case, fewer SMs / lower clock on GB200). Charts are the same peak-vs-peak view: cuDNN 9.30.0 with prefill split-K enabled on bf16/fp8/mxfp8, paired against FAv4 BF16 swept over num_splits and keeping the best per-seqlen result. GB300 (TFLOPS, fwd only): s_q cuDNN BF16 cuDNN FP8 cuDNN MXFP8 FAv4 BF16 (best ks) 985 1752 2519 2359 1451 (ks=4) 1024 1813 2619 2447 1515 (ks=4) 2048 1923 2768 2598 1613 (ks=2) 4096 2050 2978 2687 2055 (ks=1) 8192 2085 3002 2707 2071 (ks=1) GB200 (TFLOPS, fwd only): s_q cuDNN BF16 cuDNN FP8 cuDNN MXFP8 FAv4 BF16 (best ks) 985 1380 1796 1717 1332 (ks=4) 1024 1429 1870 1785 1389 (ks=4) 2048 1573 1996 1915 1513 (ks=2) 4096 1697 2066 1971 1746 (ks=1) 8192 1762 2080 1988 1802 (ks=1) On GB300 cuDNN BF16+split-K beats FAv4-best-num_splits at every seqlen (+21% at the short-Q end, tied at large s_q where neither needs splitting). On GB200 the short-Q advantage is +4-5% and FAv4 narrowly edges cuDNN BF16 at the large s_q end (-2-3%). FP8/MXFP8 dominate by +30-50% over FAv4 BF16 on both GPUs. * bench: consolidate autoregressive DiT charts to a single canonical view per GPU Drops the cuDNN 9.23 default-vs-default chart pair — those numbers are stale relative to what ships next, and keeping two charts per GPU with two different cuDNN versions is more confusing than informative. The remaining chart on each GPU is the cuDNN 9.30.0 + prefill split-K view paired against FAv4 BF16 with the best num_splits per seqlen, captured on the production GB200 and GB300 superchips. CSV is named auto_regressive_dit_no_mask.csv so the chart and its source data follow the standard <config>_<mask>.{png,csv} convention used by other benchmarks in this suite. * bench: relabel autoregressive DiT charts to cuDNN 9.24.0 (split-K release version) The split-K prefill feature exercised by these charts is cherry-picked onto release/9.24.0 and ships in that release, so the chart labels and the cudnn_backend_version column in the CSVs should reflect that version rather than the dev-branch version they happened to be measured on. --------- Co-authored-by: Vedaanta Agarwalla <142048820+vedaanta@users.noreply.github.com> Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
- Fix the formatting issues in grouped_gemm_dglu/api.py
Add frontend support for the per-tensor ragged offset multiplier (CUDNN_ATTR_TENSOR_RAGGED_OFFSET_MULTIPLIER), letting ragged offsets be stored in coarser units and scaled back to element offsets by the engine. - Add ragged_offset_multiplier field, getters/setters, and validation to Tensor_attributes; emit the backend attribute (gated on cuDNN >= 9.24.0). - Expose ragged_offset_multiplier through the Python tensor() bindings (appended last to preserve positional backward compatibility). - Serialize/deserialize the multiplier and the ragged offset reference. - Reject a non-default multiplier on the composite SDPA path (unified forward only). - Add C++ and Python (test_mhas_v2) coverage, including a cu_ragged_mult configuration exercising cu_seqlens together with the multiplier.
`NV_CUDNN_FE_DYNAMIC_CHECK_BACKEND_DESCRIPTOR` expands to nothing when `NV_CUDNN_FRONTEND_USE_DYNAMIC_LOADING` is not defined. So, the variable `ragged_offset_multiplier_cudnn_ver_error` may be unused.
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test/python/sdpa/fp16.py (1)
500-515:⚠️ Potential issue | 🟠 MajorSet ragged offset multipliers for
dQ/dK/dV/dOin backward when using compressed ragged offsets.
allocate_tensorsdivides ragged offsets by per-tensor multipliers whencfg.with_ragged_offset_multiplieris enabled, but the backward block only binds raw ragged offsets todQ/dK/dV/dOand never callsset_ragged_offset_multiplierfor those tensors (multipliers are set for forwardq/k/vando, but not for gradients).Suggested fix
if cfg.is_ragged: q_ragged_offset = graph.tensor(uid=int(TensorUid.q_ragged_offset), dim=(cfg.batches + 1,), stride=(1,), data_type=cudnn.data_type.INT64) k_ragged_offset = graph.tensor(uid=int(TensorUid.k_ragged_offset), dim=(cfg.batches + 1,), stride=(1,), data_type=cudnn.data_type.INT64) v_ragged_offset = graph.tensor(uid=int(TensorUid.v_ragged_offset), dim=(cfg.batches + 1,), stride=(1,), data_type=cudnn.data_type.INT64) o_ragged_offset = graph.tensor(uid=int(TensorUid.o_ragged_offset), dim=(cfg.batches + 1,), stride=(1,), data_type=cudnn.data_type.INT64) stats_ragged_offset = graph.tensor(uid=int(TensorUid.stats_ragged_offset), dim=(cfg.batches + 1,), stride=(1,), data_type=cudnn.data_type.INT64) q.set_ragged_offset(q_ragged_offset) k.set_ragged_offset(k_ragged_offset) v.set_ragged_offset(v_ragged_offset) o.set_ragged_offset(o_ragged_offset) stats.set_ragged_offset(stats_ragged_offset) dQ.set_ragged_offset(q_ragged_offset) dK.set_ragged_offset(k_ragged_offset) dV.set_ragged_offset(v_ragged_offset) dO.set_ragged_offset(o_ragged_offset) + if cfg.with_ragged_offset_multiplier: + q.set_ragged_offset_multiplier(cfg.d_qk) + k.set_ragged_offset_multiplier(cfg.d_qk) + v.set_ragged_offset_multiplier(cfg.d_v) + o.set_ragged_offset_multiplier(cfg.d_v) + dQ.set_ragged_offset_multiplier(cfg.d_qk) + dK.set_ragged_offset_multiplier(cfg.d_qk) + dV.set_ragged_offset_multiplier(cfg.d_v) + dO.set_ragged_offset_multiplier(cfg.d_v)🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the rest with a brief reason, keep changes minimal, and validate. In `@test/python/sdpa/fp16.py` around lines 500 - 515, The backward tensors dQ, dK, dV, dO are being bound to raw ragged offsets but not given the ragged offset multipliers when cfg.with_ragged_offset_multiplier is enabled; update the backward ragged setup (the block that calls dQ.set_ragged_offset, dK.set_ragged_offset, dV.set_ragged_offset, dO.set_ragged_offset) to also call set_ragged_offset_multiplier for each of dQ, dK, dV, dO using the same per-tensor multiplier values that allocate_tensors/forward uses for q, k, v, o (mirror the calls used for q.set_ragged_offset_multiplier, k.set_ragged_offset_multiplier, v.set_ragged_offset_multiplier, o.set_ragged_offset_multiplier) and guard these calls behind cfg.with_ragged_offset_multiplier.benchmark/sdpa_benchmark_training/README.md (1)
344-363:⚠️ Potential issue | 🟡 Minor | ⚡ Quick winRemove duplicate content.
Lines 344-353 and 354-363 contain identical content describing the autoregressive video DiT configuration. The section appears twice consecutively with the same parameters and description.
🔧 Proposed fix to remove duplication
### GB300 - Autoregressive video DiT (short Q, long cached KV)  - `batch=1; num_q_heads=9; num_kv_heads=9; head_dim=128; s_q ∈ {985..8192}; s_kv=62208` - Forward-only (autoregressive inference). cuDNN 9.30.0 with prefill split-K on bf16/fp8/mxfp8; FAv4 BF16 swept over `num_splits ∈ {1, 2, 4, 8, 16, 32}` with the best annotated on each bar (`ks=`). FAv4 FP8/MXFP8 are absent — the CuTe-DSL FAv4 build rejects those input types. - Reproduce with `python -m benchmark.sdpa_benchmark_training.bench_ar_dit_peak --out <path>`. ### GB200 - Autoregressive video DiT  - Same configuration as the GB300 chart above, captured on GB200. - -### GB300 - Autoregressive video DiT (short Q, long cached KV) - -- `batch=1; num_q_heads=9; num_kv_heads=9; head_dim=128; s_q ∈ {985..8192}; s_kv=62208` -- Forward-only (autoregressive inference). cuDNN 9.30.0 with prefill split-K on bf16/fp8/mxfp8; FAv4 BF16 swept over `num_splits ∈ {1, 2, 4, 8, 16, 32}` with the best annotated on each bar (`ks=`). FAv4 FP8/MXFP8 are absent — the CuTe-DSL FAv4 build rejects those input types. -- Reproduce with `python -m benchmark.sdpa_benchmark_training.bench_ar_dit_peak --out <path>`. - -### GB200 - Autoregressive video DiT - -- Same configuration as the GB300 chart above, captured on GB200. GB200 results are available under the same layout at `results/<config>/gb200/`.🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the rest with a brief reason, keep changes minimal, and validate. In `@benchmark/sdpa_benchmark_training/README.md` around lines 344 - 363, The README contains a duplicated pair of sections ("### GB300 - Autoregressive video DiT (short Q, long cached KV)" and "### GB200 - Autoregressive video DiT") repeated twice; remove the redundant second copy (the entire repeated block starting at the second "### GB300 - Autoregressive video DiT" occurrence) so each chart/description appears only once and leave the first occurrences intact.include/cudnn_frontend/node/sdpa_support_surface.h (1)
503-505:⚠️ Potential issue | 🟠 MajorAlign unified SDPA dropout minimum cuDNN version (9.21.0).
include/cudnn_frontend/node/sdpa_support_surface.hcurrently rejects unified SDPA dropout wheneffective_cudnn_ver < 92200(“requires cuDNN 9.22.0”):if (dropout_probability.has_value() && effective_cudnn_ver < 92200) { return {error_code_t::GRAPH_NOT_SUPPORTED, "Dropout for unified SDPA node requires cuDNN 9.22.0"}; }cuDNN’s unified SDPA forward dropout attributes (
CUDNN_ATTR_OPERATION_SDPA_FWD_DROPOUT_PROBABILITY,..._SEED_DESC,..._OFFSET_DESC,..._RNG_DUMP_DESC) are introduced in cuDNN 9.21.0, so this gate should be lowered/its message updated to 9.21.0 (and kept consistent with any other unified-dropout checks) to avoid false rejections for 9.21 while still satisfying the “dynamic and static cuDNN versions are met” rule.🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the rest with a brief reason, keep changes minimal, and validate. In `@include/cudnn_frontend/node/sdpa_support_surface.h` around lines 503 - 505, The gate that rejects unified SDPA dropout uses effective_cudnn_ver < 92200 and an error message saying 9.22.0; update the condition and message to require cuDNN 9.21.0 instead by changing the numeric check to effective_cudnn_ver < 92100 and updating the returned string to "Dropout for unified SDPA node requires cuDNN 9.21.0" so that the check (which references dropout_probability and effective_cudnn_ver in sdpa_support_surface.h) accepts 9.21.x; ensure this change is kept consistent with any other unified-dropout checks in the same file.Source: Coding guidelines
🧹 Nitpick comments (3)
python/cudnn/deepseek_sparse_attention/indexer_forward/api.py (1)
235-254: ⚡ Quick winDocument the SM90 tuning restriction and THD return shape.
The public wrapper now has two important behaviors that the docstring no longer captures: on SM90, non-default tuning knobs raise immediately, and with
cu_seqlens_*the returnedscorestensor is THD-shaped rather than(B, S_q, S_k). Please spell both out here so callers do not learn the contract from aValueErroror by reverse-engineering the arch-specific wrappers.As per coding guidelines,
python/cudnn/**: "Focus on documentation."🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the rest with a brief reason, keep changes minimal, and validate. In `@python/cudnn/deepseek_sparse_attention/indexer_forward/api.py` around lines 235 - 254, Update the docstring for the public wrapper (the function that contains device_major(), m_block_size, n_block_size, q_stage, kv_stage checks) to explicitly state two behaviors: (1) on SM90 (device_major() == 9) non-default tuning knobs (m_block_size, n_block_size, q_stage, kv_stage) are rejected immediately with ValueError, listing the supported defaults; and (2) when sequence-length inputs (cu_seqlens_*, i.e. batched variable-length K/V) are used the returned 'scores' tensor uses THD-shaped layout rather than (B, S_q, S_k) — document the exact THD ordering and dtype (FP32) and how the causal mask is applied. Ensure the docstring language mirrors the runtime checks and return structure so callers see the contract upfront.Source: Coding guidelines
python/cudnn/deepseek_sparse_attention/sparse_attention_backward/_interface_sm100.py (1)
33-55: ⚡ Quick winDocument the new
current_streamparameter in the function docstring.The signature now exposes
current_stream, but theArgsblock does not describe it.📝 Suggested doc update
Args: q: (total_S_q, nheads, headdim) bfloat16 kv: (total_S_kv, headdim) bfloat16 (K=V, MQA h_kv=1) @@ dq: pre-allocated (total_S_q, nheads, headdim), optional dkv: pre-allocated (total_S_kv, headdim), optional + current_stream: optional CUDA stream handle used for compile/launch; + defaults to the active stream when None.As per coding guidelines,
python/cudnn/**: "Focus on documentation."🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the rest with a brief reason, keep changes minimal, and validate. In `@python/cudnn/deepseek_sparse_attention/sparse_attention_backward/_interface_sm100.py` around lines 33 - 55, The docstring for the function sparse_attention_backward_sm100 (the FlashAttention (DSA) Backward Pass) is missing documentation for the new parameter current_stream; update the Args section to document current_stream: state its type (Optional[torch.cuda.Stream] or torch.cuda.Stream | None), default None, and briefly describe that it allows passing a CUDA stream to run the kernel on (used to override the default/current stream) and that if None the current/default stream is used; keep wording consistent with other Args entries (type, shape/semantics, default).Source: Coding guidelines
include/cudnn_frontend_utils.h (1)
2626-2699: 💤 Low valueConsider sorting knobs for consistency with
get_engine_tag().
get_engine_tag()now sorts the knob choices by type before building the tag string. The newget_engine_id_and_knobs()returns the knobs in backend iteration order. If callers rely on deterministic ordering when comparing engine configurations, consider sorting here as well, or document that the order is not guaranteed.♻️ Optional: sort knobs for consistency
knobs.reserve(static_cast<size_t>(numKnobs)); for (size_t idx = 0; idx < static_cast<size_t>(numKnobs); ++idx) { const cudnnBackendDescriptor_t& knob = extractedKnobs_[idx]; cudnnBackendKnobType_t type = CUDNN_KNOB_TYPE_COUNTS; int64_t choice = -2; status = detail::get_attribute(knob, CUDNN_ATTR_KNOB_CHOICE_KNOB_TYPE, CUDNN_TYPE_KNOB_TYPE, 1, nullptr, &type); if (status != CUDNN_STATUS_SUCCESS) { return status; } status = detail::get_attribute(knob, CUDNN_ATTR_KNOB_CHOICE_KNOB_VALUE, CUDNN_TYPE_INT64, 1, nullptr, &choice); if (status != CUDNN_STATUS_SUCCESS) { return status; } knobs.emplace_back(type, choice); } + std::sort(knobs.begin(), knobs.end()); return CUDNN_STATUS_SUCCESS; }🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the rest with a brief reason, keep changes minimal, and validate. In `@include/cudnn_frontend_utils.h` around lines 2626 - 2699, The function get_engine_id_and_knobs currently returns knobs in backend iteration order; make it deterministic by sorting the knobs vector before returning (so it matches get_engine_tag's behavior): after filling knobs in get_engine_id_and_knobs, call a sort on knobs using the knob type (first element of each pair) as the primary key (and knob value as a secondary key if you want total ordering) so callers receive a consistent, type-ordered list; keep the rest of the logic intact.
🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
Inline comments:
In `@benchmark/sdpa_benchmark_training/configs/qwen35.py`:
- Line 39: The preset's metadata is inconsistent: you changed the configuration
variable profile_pass to "both" but left the module docstring and the backend
note describing it as forward-only/cuDNN-fwd-only; either revert profile_pass to
"fwd" or update the module docstring and the backend note to state that this
preset runs both forward and backward (e.g., "profile_pass='both' — runs forward
and backward passes / cuDNN-fwd-bwd where applicable"). Locate and update the
docstring near the top of the file and the backend note text that mentions
cuDNN-fwd-only to reflect the new "both" mode, making the description and the
profile_pass setting consistent.
In `@cmake/cuDNN.cmake`:
- Around line 21-24: The cuDNN detection code uses unquoted ${CUDNN_INCLUDE_DIR}
in the EXISTS and file(READ ...) calls which breaks on paths with spaces; wrap
the variable references in quotes (e.g., " ${CUDNN_INCLUDE_DIR}/cudnn_version.h
" and " ${CUDNN_INCLUDE_DIR}/cudnn.h ") and read into CUDNN_HEADER_CONTENTS
accordingly so version parsing works. Also fix the generator-expression that
uses $<$<BOOL:${CUDNN_STATIC}>:...> (referenced around the CUDNN_STATIC
conditional used for linking) by producing a proper CMake list
(semicolon-separated) or by splitting into separate target_link_libraries
arguments instead of emitting space-separated link items so CMake does not
tokenize the expression before evaluation.
In `@include/cudnn_frontend/node/sdpa_support_surface.h`:
- Around line 93-97: The check in RETURN_CUDNN_FRONTEND_ERROR_IF in
sdpa_support_surface.h currently allows seq_len_* or cu_seq_len_* to be present
when attention_score_modifier is set, which lets unified SDPA treat them as
implicit padding but composite SDPA not—break parity. Change the condition to
require padding_mask whenever any of has_seq_len_q, has_seq_len_kv,
has_cu_seq_len_q, or has_cu_seq_len_kv is true (i.e., if (
(has_seq_len_q||has_seq_len_kv||has_cu_seq_len_q||has_cu_seq_len_kv) &&
!padding_mask ) then RETURN_CUDNN_FRONTEND_ERROR_IF), removing the special-case
that exempts attention_score_modifier; update the error message to state that
seq_len/cu_seq_len require padding_mask.
In `@python/cudnn/__init__.py`:
- Line 56: The package version in python/cudnn/__init__.py currently sets
__version__ = "1.25.0" which will make prerelease artifacts indistinguishable
from the GA release—change __version__ to a prerelease string (e.g., "1.25.0rc0"
or similar RC formatting used by your release process) so pyproject.toml-derived
builds are clearly RCs; additionally, add test coverage for the forwarded symbol
ragged_offset_multiplier from _tensor by adding matching assertions or a small
unit test in the test/python/fe_api suite (or the appropriate fe_api test file)
that imports the symbol and verifies its presence and expected behavior to
ensure it’s exercised by the fe_api tests.
In `@python/cudnn/deepseek_sparse_attention/indexer_forward/_interface.py`:
- Line 47: Update the public docstrings for the indexer-forward interfaces to
include the full runtime contract: explicitly state that callers must provide a
CUDA stream (current_stream) or that a default stream will be used, the required
thread-count and head-count values, and the expected THD tensor shapes/layouts
and dtype constraints; update both entry-point docstrings (the function
accepting the current_stream parameter and the paired public interface) to list
required invariants, valid ranges, and what errors are raised when constraints
are violated so callers know the exact runtime requirements.
- Around line 74-76: Replace the runtime assertions in the indexer-forward entry
points with explicit exception checks so invalid inputs can't be skipped under
python -O: in
python/cudnn/deepseek_sparse_attention/indexer_forward/_interface.py (the loop
over q,k,w) and the corresponding _validate_common in
indexer_forward/_interface_sm90.py, check tensor.dtype and tensor.is_cuda and
raise TypeError or ValueError with the same descriptive messages (e.g., "<name>
must be bfloat16, got {tensor.dtype>" and "<name> must be on CUDA device")
instead of using assert; ensure both entry points use identical validation
semantics so incorrect dtype/device errors surface immediately before CuTe
compile/launch.
In `@python/cudnn/deepseek_sparse_attention/score_recompute/pack_gqa.py`:
- Around line 171-199: The loader load_Weights_packed_f32 always calls
sm90_ops.elem_pointer_packed_i64 with a hardcoded cutlass.BFloat16 which
misinterprets FP16 inputs; update the function to accept (or read from self) the
real source dtype (e.g. a new parameter src_dtype or an attribute on PackGQA)
and pass that dtype into elem_pointer_packed_i64 instead of cutlass.BFloat16 so
the pointer/element interpretation matches the caller’s source type before
casting to cutlass.Float32; ensure the new symbol is documented/initialized on
PackGQA and used in load_Weights_packed_f32 where ptr is computed.
---
Outside diff comments:
In `@benchmark/sdpa_benchmark_training/README.md`:
- Around line 344-363: The README contains a duplicated pair of sections ("###
GB300 - Autoregressive video DiT (short Q, long cached KV)" and "### GB200 -
Autoregressive video DiT") repeated twice; remove the redundant second copy (the
entire repeated block starting at the second "### GB300 - Autoregressive video
DiT" occurrence) so each chart/description appears only once and leave the first
occurrences intact.
In `@include/cudnn_frontend/node/sdpa_support_surface.h`:
- Around line 503-505: The gate that rejects unified SDPA dropout uses
effective_cudnn_ver < 92200 and an error message saying 9.22.0; update the
condition and message to require cuDNN 9.21.0 instead by changing the numeric
check to effective_cudnn_ver < 92100 and updating the returned string to
"Dropout for unified SDPA node requires cuDNN 9.21.0" so that the check (which
references dropout_probability and effective_cudnn_ver in
sdpa_support_surface.h) accepts 9.21.x; ensure this change is kept consistent
with any other unified-dropout checks in the same file.
In `@test/python/sdpa/fp16.py`:
- Around line 500-515: The backward tensors dQ, dK, dV, dO are being bound to
raw ragged offsets but not given the ragged offset multipliers when
cfg.with_ragged_offset_multiplier is enabled; update the backward ragged setup
(the block that calls dQ.set_ragged_offset, dK.set_ragged_offset,
dV.set_ragged_offset, dO.set_ragged_offset) to also call
set_ragged_offset_multiplier for each of dQ, dK, dV, dO using the same
per-tensor multiplier values that allocate_tensors/forward uses for q, k, v, o
(mirror the calls used for q.set_ragged_offset_multiplier,
k.set_ragged_offset_multiplier, v.set_ragged_offset_multiplier,
o.set_ragged_offset_multiplier) and guard these calls behind
cfg.with_ragged_offset_multiplier.
---
Nitpick comments:
In `@include/cudnn_frontend_utils.h`:
- Around line 2626-2699: The function get_engine_id_and_knobs currently returns
knobs in backend iteration order; make it deterministic by sorting the knobs
vector before returning (so it matches get_engine_tag's behavior): after filling
knobs in get_engine_id_and_knobs, call a sort on knobs using the knob type
(first element of each pair) as the primary key (and knob value as a secondary
key if you want total ordering) so callers receive a consistent, type-ordered
list; keep the rest of the logic intact.
In `@python/cudnn/deepseek_sparse_attention/indexer_forward/api.py`:
- Around line 235-254: Update the docstring for the public wrapper (the function
that contains device_major(), m_block_size, n_block_size, q_stage, kv_stage
checks) to explicitly state two behaviors: (1) on SM90 (device_major() == 9)
non-default tuning knobs (m_block_size, n_block_size, q_stage, kv_stage) are
rejected immediately with ValueError, listing the supported defaults; and (2)
when sequence-length inputs (cu_seqlens_*, i.e. batched variable-length K/V) are
used the returned 'scores' tensor uses THD-shaped layout rather than (B, S_q,
S_k) — document the exact THD ordering and dtype (FP32) and how the causal mask
is applied. Ensure the docstring language mirrors the runtime checks and return
structure so callers see the contract upfront.
In
`@python/cudnn/deepseek_sparse_attention/sparse_attention_backward/_interface_sm100.py`:
- Around line 33-55: The docstring for the function
sparse_attention_backward_sm100 (the FlashAttention (DSA) Backward Pass) is
missing documentation for the new parameter current_stream; update the Args
section to document current_stream: state its type (Optional[torch.cuda.Stream]
or torch.cuda.Stream | None), default None, and briefly describe that it allows
passing a CUDA stream to run the kernel on (used to override the default/current
stream) and that if None the current/default stream is used; keep wording
consistent with other Args entries (type, shape/semantics, default).
🪄 Autofix (Beta)
Fix all unresolved CodeRabbit comments on this PR:
- Push a commit to this branch (recommended)
- Create a new PR with the fixes
ℹ️ Review info
⚙️ Run configuration
Configuration used: Path: .coderabbit.yaml
Review profile: CHILL
Plan: Enterprise
Run ID: 0415d2cd-c280-4147-bf30-df0f89341bd9
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📒 Files selected for processing (102)
.coderabbit.yaml.pre-commit-config.yamlCMakeLists.txtREADME.mdbenchmark/sdpa_benchmark_training/ACKNOWLEDGEMENTS.mdbenchmark/sdpa_benchmark_training/README.mdbenchmark/sdpa_benchmark_training/bench_ar_dit_peak.pybenchmark/sdpa_benchmark_training/benchmark_single_sdpa.pybenchmark/sdpa_benchmark_training/charts.pybenchmark/sdpa_benchmark_training/configs/qwen35.pycmake/cuDNN.cmakeinclude/cudnn_frontend/backend/execution_helpers.hinclude/cudnn_frontend/cudnn_interface.hinclude/cudnn_frontend/experimental/attention_utils.hinclude/cudnn_frontend/experimental/sm100_rms_norm_silu_engine.hinclude/cudnn_frontend/graph_interface.hinclude/cudnn_frontend/graph_properties.hinclude/cudnn_frontend/knobs.hinclude/cudnn_frontend/node/diagonal_band_mask.hinclude/cudnn_frontend/node/moe_grouped_matmul_bwd.hinclude/cudnn_frontend/node/reduction.hinclude/cudnn_frontend/node/scaled_dot_product_flash_attention.hinclude/cudnn_frontend/node/sdpa_fp8_bwd.hinclude/cudnn_frontend/node/sdpa_support_surface.hinclude/cudnn_frontend/node/softmax.hinclude/cudnn_frontend/node_interface.hinclude/cudnn_frontend/plans.hinclude/cudnn_frontend/utils/attn_score_modifiers.hinclude/cudnn_frontend/utils/serialize.hinclude/cudnn_frontend_Logging.hinclude/cudnn_frontend_Operation.hinclude/cudnn_frontend_Tensor.hinclude/cudnn_frontend_shim.hinclude/cudnn_frontend_utils.hinclude/cudnn_frontend_version.hpython/cudnn/__init__.pypython/cudnn/deepseek_sparse_attention/README.mdpython/cudnn/deepseek_sparse_attention/indexer_backward/dense_indexer_backward_sm100.pypython/cudnn/deepseek_sparse_attention/indexer_backward/dense_indexer_backward_sm90.pypython/cudnn/deepseek_sparse_attention/indexer_backward/indexer_backward_sm100.pypython/cudnn/deepseek_sparse_attention/indexer_backward/indexer_backward_sm90.pypython/cudnn/deepseek_sparse_attention/indexer_forward/_interface.pypython/cudnn/deepseek_sparse_attention/indexer_forward/_interface_sm90.pypython/cudnn/deepseek_sparse_attention/indexer_forward/api.pypython/cudnn/deepseek_sparse_attention/indexer_forward/indexer_fwd_sm90.pypython/cudnn/deepseek_sparse_attention/indexer_top_k/api.pypython/cudnn/deepseek_sparse_attention/indexer_top_k/indexer_top_k_decode_varlen.pypython/cudnn/deepseek_sparse_attention/indexer_top_k/local_to_global_dsl.pypython/cudnn/deepseek_sparse_attention/score_recompute/_interface_sm100.pypython/cudnn/deepseek_sparse_attention/score_recompute/_interface_sm90.pypython/cudnn/deepseek_sparse_attention/score_recompute/dense_score_recompute_sm90.pypython/cudnn/deepseek_sparse_attention/score_recompute/pack_gqa.pypython/cudnn/deepseek_sparse_attention/score_recompute/sparse_score_recompute_sm100.pypython/cudnn/deepseek_sparse_attention/sparse_attention_backward/_interface_sm100.pypython/cudnn/deepseek_sparse_attention/sparse_attention_backward/_interface_sm90.pypython/cudnn/deepseek_sparse_attention/sparse_attention_backward/api.pypython/cudnn/deepseek_sparse_attention/sparse_attention_backward/dsa_bwd_sm100.pypython/cudnn/deepseek_sparse_attention/sparse_attention_backward/dsa_bwd_sm90.pypython/cudnn/gemm_swiglu/dense_gemm_persistent_swiglu.pypython/cudnn/grouped_gemm/grouped_gemm_dglu/api.pypython/cudnn/grouped_gemm/grouped_gemm_dglu/moe_blockscaled_grouped_gemm_dglu_dbias.pypython/cudnn/grouped_gemm/grouped_gemm_dsrelu/api.pypython/cudnn/grouped_gemm/grouped_gemm_quant/api.pypython/cudnn/grouped_gemm/grouped_gemm_quant/grouped_gemm_quant.pypython/cudnn/grouped_gemm/moe_sched_extension.pypython/properties.cpppython/pygraph/pygraph.cpppython/pygraph/pygraph.hpython/pygraph/sdpa.cppsamples/cpp/CMakeLists.txtsamples/cpp/matmul/blackwell_nvfp4_mxfp8_block_scale_matmul.cppsamples/cpp/matmul/matmuls.cppsamples/cpp/membound/boolean_fusion.cppsamples/cpp/membound/concat.cppsamples/cpp/membound/membound_fusion.cppsamples/cpp/membound/reshape.cppsamples/cpp/membound/slice.cppsamples/cpp/membound/transpose.cppsamples/cpp/misc/compile_time_constant_example.cppsamples/cpp/moe_grouped_matmul/moe_grouped_matmul.cppsamples/cpp/sdpa/fp16_bwd_with_flexible_graphs.cppsamples/cpp/sdpa/fp16_dynamic_shapes.cppsamples/cpp/sdpa/fp16_fwd_with_cu_seq_len.cppsamples/python/70_boolean_cmp_logic.ipynbtest/cpp/CMakeLists.txttest/cpp/get_engine_and_knobs.cpptest/cpp/tensor.cpptest/python/conftest.pytest/python/fe_api/dsa/dsa_reference.pytest/python/fe_api/dsa/test_DSA_indexer_forward.pytest/python/fe_api/dsa/test_DSA_indexer_top_k.pytest/python/fe_api/test_grouped_gemm_quant.pytest/python/fe_api/test_grouped_gemm_quant_utils.pytest/python/fe_api/test_sdpa_bwd.pytest/python/sdpa/blocked.pytest/python/sdpa/fp16.pytest/python/sdpa/fp8.pytest/python/sdpa/random_config.pytest/python/test_block_scale_quantize_dynamic_shape.pytest/python/test_matmul_bias_relu.pytest/python/test_mhas_v2.pytest/python/test_moe_grouped_matmul.py
💤 Files with no reviewable changes (4)
- test/python/fe_api/test_sdpa_bwd.py
- test/python/sdpa/blocked.py
- python/cudnn/deepseek_sparse_attention/indexer_top_k/local_to_global_dsl.py
- benchmark/sdpa_benchmark_training/charts.py
| from .datatypes import _library_type, _is_torch_tensor | ||
|
|
||
| __version__ = "1.24.1" | ||
| __version__ = "1.25.0" |
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🏁 Script executed:
#!/bin/bash
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# Inspect the version export in python/cudnn/__init__.py
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Use an RC version string instead of GA in cudnn.__version__
python/cudnn/__init__.pysets__version__ = "1.25.0", andpyproject.tomlderives the package version fromcudnn.__version__, so prerelease artifacts will be indistinguishable from the final1.25.0release.ragged_offset_multiplieris documented/forwarded in_tensor, but there’s no coverage for it undertest/python/fe_api(matches only appear in othertest/pythontests, e.g.test/python/test_mhas_v2.py).
🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
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In `@python/cudnn/__init__.py` at line 56, The package version in
python/cudnn/__init__.py currently sets __version__ = "1.25.0" which will make
prerelease artifacts indistinguishable from the GA release—change __version__ to
a prerelease string (e.g., "1.25.0rc0" or similar RC formatting used by your
release process) so pyproject.toml-derived builds are clearly RCs; additionally,
add test coverage for the forwarded symbol ragged_offset_multiplier from _tensor
by adding matching assertions or a small unit test in the test/python/fe_api
suite (or the appropriate fe_api test file) that imports the symbol and verifies
its presence and expected behavior to ensure it’s exercised by the fe_api tests.
| cu_seqlens_k: Optional[torch.Tensor] = None, | ||
| max_seqlen_q: Optional[int] = None, | ||
| max_seqlen_k: Optional[int] = None, | ||
| current_stream=None, |
Contributor
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The public indexer-forward docs are missing the new runtime contract. Both entry points added or tightened caller-visible constraints, but the docstrings still hide required stream, thread-count, head-count, and THD-shape requirements. Please document the full contract in both interfaces. As per coding guidelines, python/cudnn/**: "Focus on documentation."
🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
In `@python/cudnn/deepseek_sparse_attention/indexer_forward/_interface.py` at line
47, Update the public docstrings for the indexer-forward interfaces to include
the full runtime contract: explicitly state that callers must provide a CUDA
stream (current_stream) or that a default stream will be used, the required
thread-count and head-count values, and the expected THD tensor shapes/layouts
and dtype constraints; update both entry-point docstrings (the function
accepting the current_stream parameter and the paired public interface) to list
required invariants, valid ranges, and what errors are raised when constraints
are violated so callers know the exact runtime requirements.
Source: Coding guidelines
hwanseoc
approved these changes
Jun 10, 2026
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cuDNN Frontend v1.25.0 Release Notes
cuDNN has moved completely to github for development. Please direct your PRs to develop and file issues in github.
cuDNN Frontend v1.25.0 is the recommended version for cuDNN 9.23.0 and later releases.
Updates to Graph API 🚀 🚀
SDPA
cu_seqlensin unified SDPA — the unified SDPA path now accepts cumulative sequence-length tensors, enabling variable-length (packed) batches without padding.CUDNN_ATTR_TENSOR_RAGGED_OFFSET_MULTIPLIER), letting ragged offsets be stored in coarser units and scaled back to element offsets by the engine. Exposed throughTensor_attributes(getters/setters, validation, serialization) and the Pythontensor()bindings. Requires cuDNN 9.24.0.Structured plan pinning
get_engine_and_knobs_at_index, which returns the structured(engine_id, {KnobType_t: value})for a plan instead of a stringified tag, so a tuned plan can be persisted and replayed exactly viacreate_execution_plan(engine_id, knobs)even as plan enumeration drifts across versions. Available in C++ (Graph,Execution_plan_list) and Python.KnobType_twithSWAP_AB,INPUT_TMA_ENABLE, andOUTPUT_TMA_ENABLE.Reduction
group_offsetsupport to the reduction node (Reduction_attributes::set_group_offset), so cuDNN FE can express per-expert reductions for MoE grouped GEMM workloads. WiresCUDNN_ATTR_OPERATION_REDUCTION_GROUP_OFFSET_DESCwith runtime version checks (cuDNN ≥ 9.24.0), and exposes the optional argument through the Pythonreductionbinding.Open-Source Kernels 🚀 🚀
General Improvements ✨✨
CUDNN_FRONTEND_CUDART_LIB_NAME, and the shim now warns instead of throwing when multiple libcudart libraries are found, improving robustness in containerized environments.getenvaccess and fixed C4996/C4005 compiler warnings on MSVC.Bug Fixes 🐛
sfd_col_d_srelu_tensor.Samples
Benchmarking 📊
Acknowledgements
External contributors