🌐 Open the website · Qubit Lab · Heat Race · Diamond CPU · Break the Code · Explorer

🔑 Key findings

	Result (generated by adamas build docs)	Details
Power switches	Diamond's ideal figure of merit is 48,976× silicon's; with honest material uncertainty its EV-inverter loss advantage over silicon carbide is a median 3.8× (2.5× to 5.5×).	Confidence
Two-qubit gates	Coherence would allow a Bell fidelity of 0.998; the measured 0.67 means the NV⁻ charge state was ready only 0.75 of the time. Preparation, not coherence, is the bottleneck.	E5
Error correction	With strongly biased noise the native XZZX code's threshold rises to 1.59% while the standard code falls to 0.63%.	E6.1e
Machine size	A factoring-scale room-temperature machine fits on a 5.7 mm die but runs 6.0 years at 1 ms readout (1.2 to 15.5 years with uncertainty). If gate noise is biased, the standard code needs 399 M qubits and the XZZX code 67 M.	E10.5c
Evidence	17 of 18 validation checks pass (the other is an explained discrepancy); 537 references; 51 figures regenerated from code.	VALIDATION.md

🚀 Start here

You are	Start with	Then
Curious (10 minutes)	Lattice Lab	Heat Race, Qubit Lab
A student	Lesson 1	Transistor Lab, Data Lab
An engineer	Power Lab	Process traveler, experiments from US$100
A researcher	Validation and uncertainty	Preprint, chapters E5 and E6

From the command line (after pip install -e ".[dev]"):

adamas info                                   # version, contents, key findings
adamas doctor                                 # which optional tools you have, with install hints
adamas fit odmr docs/data/examples/odmr_with_magnet.csv
adamas estimate --workload materials --readout-us 100
adamas validate                               # the validation matrix
adamas uncertainty power                      # Monte Carlo percentiles and tornado ranking
adamas build docs                             # regenerate the traveler, experiments, glossary, validation, and this README block

The website has grouped menus and a search palette: press Ctrl K (or /) on any page to jump to a lab, glossary term, figure, experiment, process step, or lesson.

💎 Pick your level

🧒 I am ten years old

Computer chips are drawn on shiny plates made of silicon, which comes from sand. Diamond is made of carbon, the same stuff as pencil lead, and its atoms hold hands much tighter. That makes diamond amazing at two things: it moves heat away super fast, and it does not break when you push a lot of electricity through it.

Diamond has one more trick. If you take out two carbon atoms and put one nitrogen atom in, you get a tiny spot that glows red when you shine green light on it. That tiny spot acts like a spinning top that can point up, down, or both at once. That is a quantum bit. Other quantum computers need freezers colder than outer space. This one works on a desk.

🎒 I am in high school

Silicon and carbon are in the same column of the periodic table, and both form crystals with the exact same pattern (it is even called "diamond cubic"). Carbon atoms are smaller and bond more strongly, so diamond has a huge bandgap (5.47 electron-volts against silicon's 1.12). A big bandgap means a diamond transistor can block thousands of volts and run at hundreds of degrees.

The nitrogen-vacancy center is a nitrogen atom next to a missing carbon atom. Its electrons have a spin that behaves like a tiny magnet. A green laser resets the spin, microwaves near 2.87 gigahertz rotate it, and the brightness of its red glow tells you the answer. The rigid diamond lattice protects the spin so well that this works at room temperature.

The hard parts: diamond wafers are still small (3 inches against silicon's 12), and two qubits must sit within about 30 nanometers of each other to interact.

🎓 I am an undergraduate in engineering or physics

Diamond's Baliga figure of merit $\varepsilon\mu E_c^3$ is about 49,000 times silicon's, and its thermal conductivity is 22 W/(cm·K). Its dopants are deep (boron 0.37 eV, phosphorus 0.57 eV), so under 1 percent ionize at 300 K, and practical transistors use a surface-transfer-doped two-dimensional hole gas on hydrogen-terminated diamond. Logic is p-channel only today; the first n-channel Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) appeared in 2024.

The NV⁻ ground state is a spin triplet with $H/h = D S_z^2 + \gamma_e \mathbf{B}\cdot\mathbf{S}$, $D = 2.87$ GHz. Optical pumping polarizes $m_s = 0$ through a spin-selective intersystem crossing, which also gives roughly 30 percent fluorescence contrast for readout. Room-temperature $T_2$ reaches 1.8 to 2.4 ms in carbon-12-enriched crystals, and nearby nuclear spins store states for over a second. NV-NV gates use magnetic dipolar coupling, 52 MHz·nm³/r³. Start at Chapter 1 and Chapter 6.

🔬 I am a researcher or process engineer

The framework's thesis: (1) the intra-cell physics (electron plus nuclear register, gates above the surface-code threshold, room-temperature error correction) is mature; (2) the inter-cell link and deterministic placement are the bottleneck, with pair yield bounded by the square of the nitrogen-to-NV conversion yield; (3) photoelectric readout plus diamond-on-CMOS chiplet bonding is the manufacturable interface; (4) diamond's own p-channel hole-gas transistors are sufficient for the interface layer, so n-type doping is not on the critical path for a hybrid quantum chip. Go to Chapter 7, Chapter 8, and the experiment list in Chapter 11. Limits are stated plainly: no single-shot electron readout and no photonic entanglement at 300 K; group-IV color centers need cryogenics.

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🧪 Interactive labs

Thirteen hands-on labs run in the browser on the project website. Each explains itself at three reading levels and lists its sources; each simulation is a tested JavaScript module that runs the same physics as the Python package.

Lab	What you do	What it shows
Qubit Lab	Fire microwave pulses at an ensemble of NV spins on a 3-D Bloch sphere; build your own sequences	Rabi, Ramsey, and spin echo; why the echo rescues a dephased ensemble
Heat Race	Burn the same power in silicon, SiC, GaN, and diamond	Live heat equation; diamond's hot spot is κ-ratio (about 15×) cooler
Lattice Lab	Fly through silicon and diamond at true scale; plant an NV center; aim a magnet	The four NV axes and their eight magnetic-resonance lines
Diamond CPU	Write and step assembly for DIA-4; pan the placed layout	The emulator matches the Verilog cycle for cycle on random programs
Break the Code	Click qubits to inject errors into a surface code, decode, run a threshold experiment	Syndromes, matching, logical failure, and the threshold
Transistor Lab	Tune mobility, thresholds, sizing, and supply	I–V curves, inverter transfer curve and noise margins, a live five-stage ring oscillator (within 10% of ngspice)
Power Lab	Pick EV, data-center, solar, or grid; set frequency and temperature	Switch loss, die size, and heat-sink size for Si, SiC, GaN, and diamond (Python physics, tested to 1%)
Photon Lab	Fire green light at one NV center, photon by photon; repeat 500 shots	Why mₛ = 0 is bright: the dark singlet detour, readout contrast, spin polarization
Wafer Lab	Rain defects onto a diamond or silicon wafer	Poisson and Murphy yield against a live Monte Carlo; why young materials need small dies
Machine Builder	Pick a job, readout speed, memory, gate time, and cell pitch	Code distance, physical qubits, die size, and runtime from circuit-level simulations, next to a superconducting machine
Fab Walkthrough	Step through a hydrogen-terminated diamond transistor's process flow	Each step beside what silicon does instead
The Chip Stack	Scroll to explode the five-layer quantum processor in 3-D	Silicon controller, bond, diamond transistors, qubit layer, optics
Who is building it	Spin a globe of the labs and companies behind each result; replay history	Every point cited and labeled peer-reviewed, news, or vendor claim

Preview locally with make serve, or click the Codespaces badge for a ready environment with every tool installed.

524 references · 51 figures, a validation matrix, a preprint, a hardware kit, 13 labs, 10 experiments, a course, and a process traveler · 25 chapters · tested Python, SPICE, and Verilog · 65 proposed experiments and projects

ADAMAS (Greek adámas, "unconquerable," the root of the word diamond) is an open, fully referenced framework for building electronics on diamond wafers instead of silicon wafers: how to make the wafer, how to process it, how to build analog, digital, and quantum circuits on it, and how all of that compares with today's silicon industry. Its central quantum idea is the nitrogen-vacancy (NV) center, an atom-sized defect in diamond that works as a quantum bit (qubit) at room temperature.

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🎓 Learn it or teach it: a seven-lesson course

A course on the website walks from "why diamond?" to "how do I build it?". Each lesson has objectives, readings in this repository, a lab task, a notebook that runs in your browser, and a four-question check with sourced explanations. Progress is saved in your browser. Instructors can fork adamas/course.py, the single source for the pages and notebooks.

#	Lesson	Time	Notebook
1	Why diamond?	45 min
2	Power switches	50 min
3	Transistors, gates, and a diamond CPU	60 min
4	The NV qubit	50 min
5	Two qubits and the real bottleneck	45 min
6	Error correction and the size of the machine	60 min
7	Building it: the process traveler	60 min

🔬 Do it yourself: ten experiments from US$100 to a pilot line

EXPERIMENTS.md and the interactive 3-D version give ten experiments in four budgets, each with a parts list and approximate prices, safety notes, numbered steps, the analysis, and simulated expected results so you know what a working setup should show.

Tier	Budget	Experiments
A · Kitchen table	US$100 to 500	NV glow and ODMR; weigh a magnet with light; heat-spreader race
B · Teaching lab	US$1,000 to 10,000	Rabi, Ramsey, and echo; vector magnetometry; boron activation energy
C · Research lab	US$10,000 to 100,000	Single NV centers and photon antibunching; a diamond transistor from a university cleanroom
D · Facility	US$100,000 to tens of millions	Room-temperature entanglement of two qubits; a 3-inch pilot line

Analyze what you measure. python -m adamas.fit odmr my_sweep.csv (also rabi, ramsey, echo, arrhenius, iv, g2) returns fitted values with uncertainties and a physical interpretation, for example the magnetic field from an ODMR splitting or the acceptor energy from an Arrhenius plot. The browser Data Lab runs the same models and animates the fit converging. Practice datasets are in docs/data/examples. Every acronym is spelled out in the glossary, and on the website a dotted underline on the first use of a term shows its definition.

🔧 Build the A1 kit

hardware/a1_odmr turns the US$150 to 400 experiment into an instrument: MicroPython firmware for a Raspberry Pi Pico drives an ADF4351 synthesizer through the NV resonance and streams the spectrum to host.py, which saves a CSV and fits it. The synthesizer registers come from adamas.hw.adf4351, tested against the evaluation-board values.

🏭 Build it: a process engineer's traveler

The process folder turns the framework into a cleanroom run sheet. Traveler T1 takes a bare diamond plate to a tested chip in 19 steps; each step has its purpose, equipment, starting-point parameters with sources, in-line checks with pass windows, safety notes, failure modes, and what silicon does instead. Applications maps five product variants (power switch, RF amplifier, high-temperature logic, quantum sensor, qubit chip) onto the flow with acceptance tests and the published numbers to beat. The interactive traveler animates the cross-section, keeps a run log that checks your measurements, and exports CSV.

In the machine (v0.24). If NV gate noise is that biased, the standard code's error suppression drops from Λ ≈ 3.6 to about 1.75 and an RSA-scale machine needs about 400 million qubits; the native XZZX code brings it back to about 67 million (Figure 51, chapter E10.5c). Measuring the bias of NV two-qubit gates is therefore a top experimental priority. The Machine Builder has a selector for all three models.

✅ How much to trust it

VALIDATION.md lists every check behind the models: against published results (for example the surface-code threshold, 3.1% against the published 2.93%), against an independent tool (JavaScript against Python, emulator against Verilog, hand model against SPICE), or against a known answer. Figure 49 propagates honest parameter ranges through the two headline results: diamond's inverter-loss advantage over silicon carbide is a median of about 3.8× (P10 to P90 roughly 2.5× to 5.5×), below the optimistic 6.7× baseline. The Confidence page animates the matrix and reruns the Monte Carlo live with ranges you choose.

⚛️ Native XZZX circuits (project X-5, done)

adamas.xzzx_native rewrites Stim's surface-code circuit gate by gate into a native XZZX circuit (CZ and XCX on one sublattice, so hook errors are real) and gives the gates biased noise. Both codes agree under depolarizing noise, as they must; at bias 100 the standard code's threshold falls to about 0.6% while XZZX rises to about 1.6%, and an NV cell at 1 ms readout gets a distance-7 memory about 12× better with XZZX (chapter E6.1e).

📄 Preprint, talk, and poster

Download	What	Rebuild
paper/adamas.pdf	5-page preprint with sources, uncertainty, and limitations	make paper
paper/talk.pdf	12-slide talk (12 to 15 minutes), speaker notes with likely questions	make talk
paper/poster.pdf	A0 conference poster with a QR code to the website	make poster

All three read their numbers from paper/numbers.tex, which python -m adamas.paper generates from the package, so they always match the code.

Preprint

ADAMAS: an open, tested framework for diamond electronics and room-temperature nitrogen-vacancy quantum processors (4 pages). Every number in the text comes from the package (python -m adamas.paper writes paper/numbers.tex), so make paper rebuilds a manuscript that cannot disagree with the code.

🎬 The models in motion

All animations are drawn by the package (make animations); the gallery shows all 46 figures and animations with searchable captions.

🧭 The framework at a glance

flowchart LR
    subgraph make["MAKE"]
        A[02 · Grow the wafer] --> B[03 · Process it]
    end
    subgraph classical["CLASSICAL CIRCUITS"]
        C[04 · Analog, power,<br/>radio frequency] --> D[05 · Digital logic]
    end
    subgraph quantum["QUANTUM CIRCUITS"]
        E[06 · NV physics] --> F[07 · Place the qubits] --> G[08 · Processor<br/>architecture]
    end
    B --> C
    B --> E
    D --> H[09 · Control and<br/>CMOS integration]
    G --> H
    H --> I[10 · Current experiments] --> J[11 · Proposed experiments<br/>and roadmap]
    J --> K[12 · Silicon scorecard<br/>13 · Economics and risk]

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The whole framework on one page

1 · Same crystal pattern, tighter bonds

Silicon chips already use the "diamond cubic" lattice. Diamond is that lattice with a 34 percent smaller spacing and far stronger bonds ([sze2006], [wort2008]). The NV center is one nitrogen (N) beside one vacancy (V) ([doherty2013]).

2 · Why diamond: the raw numbers

Relative to silicon = 1	Silicon carbide	Gallium nitride	Gallium oxide	Diamond
Power-switch score, Baliga figure of merit [baliga1982]	343	878	2,894	48,976
High-frequency switching score [baliga1989]	50	104	127	3,016
Power × frequency score [johnson1965]	278	756	1,600	2,500
Heat-limited density score [keyes1972]	5.1	2.7	0.18	25.7

Real diamond transistors on wafer-scale substrates already block 2608 V [saha2021] and 3659 V [saha2023], and the best on-resistance so far, 7.54 mΩ·cm² at 2568 V ([saha2022], [kasu2022talk]), beats silicon's theoretical limit by about 90 times. All of them still sit 550 to 2800 times above diamond's own limit, which marks the room left to improve (Chapter 4).

3 · The catch: doping, and wafer size

Diamond's dopant atoms hold their carriers too tightly. At room temperature about 90 percent of boron atoms in silicon are active; in diamond, under 1 percent ([lagrange1998], [sze2006]). Engineers work around this with surface transfer doping ([maier2000], [crawford2021]; Chapter 3).

Wafers are catching up: reproducible 3-inch single-crystal diamond was reported in 2026 [e6orbray2026], about where silicon stood in the early 1970s (Chapter 2).

flowchart LR
    subgraph Silicon
        s1[Sand] --> s2[Melt at 1414 °C] --> s3[Pull a 300 mm crystal] --> s4[Slice and polish]
    end
    subgraph Diamond
        d1[Methane + hydrogen] --> d2[Microwave plasma] --> d3[Grow atom by atom<br/>on a seed] --> d4[Lift off and polish]
    end

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4 · The room-temperature qubit

Green light sets it, microwaves turn it, red light reads it	Its resonance is a precise magnetic fingerprint

Watch the qubit rotate	Watch the field split the line

How long does quantum information survive with no refrigerator? Long enough for tens of thousands of gate operations ([balasubramanian2009], [herbschleb2019], [maurer2012], [fuchs2009]):

5 · From one qubit to a processor

Each NV center is a small register: a fast electron spin plus long-lived nuclear spins ([dutt2007], [waldherr2014]). Centers link through magnetic dipolar coupling, which fades with the cube of distance, so qubits must sit within about 15 to 30 nm ([dolde2013]).

Placing two working NV centers that close is the central manufacturing problem. The model in adamas.coupling shows why conversion yield matters most ([pezzagna2010], [luhmann2019], [chen2019]; Chapter 7):

The proposed chip is a partnership. Silicon does the heavy classical work, and a diamond chiplet bonded on top carries qubits, sensors, and rugged interface transistors ([li2024], [siyushev2019], [kim2019cmos]; Chapter 9):

flowchart TB
    L5["Green light delivery"] --> L4["Diamond quantum layer: carbon-12, aligned NV arrays"]
    L4 --> L3["Diamond device layer: photocurrent electrodes, microwave lines, p-channel switches"]
    L3 --> L2["Bond interface and heat path"]
    L2 --> L1["Silicon CMOS: microwave synthesis, amplifiers, sequencer, error-correction decoder"]

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6 · What is proven and what is proposed

✅ Demonstrated (peer reviewed)	🧪 Proposed here
2- and 3-inch-class single-crystal wafers ([kim2021], [schreck2017])	Detect-and-repair NV arrays with laser writing (C-5)
2608 V and 3659 V diamond MOSFETs ([saha2021], [saha2023]); operation at 400 °C [kawarada2014]	Hole-gas transistors and NV qubits on one patterned-termination chip (C-7)
Inverter, NOR, NAND logic [liu2017]; first n-channel MOSFET [liao2024]	On-chip photoelectric qubit readout through a diamond switch (C-6)
Room-temperature gates above the fault-tolerance threshold [rong2015]	Nuclear-nuclear entanglement across two NV centers at 300 K (C-8)
Room-temperature quantum error correction [waldherr2014]	16-cell microscope-free chiplet on CMOS (F-1)
Two NV centers entangled at 25 nm ([dolde2013], [dolde2014])	Dark-spin chain bus beyond 50 nm (F-2, after [yao2012])
Diamond chiplets on foundry CMOS [li2024]	Room-temperature logical qubit in one NV cluster (F-6)

Full list with success metrics, budget tiers, and decision gates: Chapter 11. The expert track adds 39 more, sized from a weekend to a doctoral program: E8.

flowchart LR
    T0["Tier 0<br/>Simulation<br/>(this repo)"] --> T1["Tier 1<br/>Benchtop magnetic<br/>resonance kit"] --> T2["Tier 2<br/>University cleanroom"] --> T3["Tier 3<br/>Foundry and consortium"]

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7 · Expert track: from the lithography tool to the logical qubit

Eleven research-level chapters follow the technology stack in order, then turn to applications. Each adds tested models, new references, and numbered experiments.

flowchart LR
    E1["E1 · Lithography<br/>EUV to electron beam"] --> E2["E2 · Process integration<br/>and design kit"] --> E3["E3 · Digital and<br/>processor design"] --> E4["E4 · Analog and<br/>mixed signal"] --> E5["E5 · NV qubit<br/>engineering"] --> E6["E6 · Error correction<br/>and architecture"] --> E7["E7 · Beyond"] --> E8["E8 · Project ladder"]

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#	Chapter	Headline result
E1	Patterning diamond: extreme ultraviolet (EUV) to electron beam	EUV scanners are 300 mm-only and leave 45 to 124 nm of focus depth, so diamond needs co-planar carriers; the one layer that truly needs EUV-class resolution is the qubit implant mask
E2	Process integration and a process design kit (PDK)	A six-mask "PDK-0" with layer map, design rules, a KLayout DRC deck, and a generated GDS monitor die
E3	Digital and processor design	DIA-4, a working 4-bit processor synthesized to 830 to 900 diamond transistors; static power caps single-polarity diamond logic near 10⁴ gates
E4	Analog and mixed signal	Threshold-difference references replace bandgaps; the picoampere qubit-readout noise budget
E5	NV qubit engineering	With an echoed gate, 25 nm spacing is enough for coherence; charge-state preparation becomes the bottleneck. Bath and decoupling models reproduce published $T_2^{*}$ and $T_2$
E6	Error correction and architecture	Surface-code Monte Carlo with three error rates: break-even link error is about 1.3% per gate, while readout error up to a few percent is tolerated
E7	Beyond	Masers, hyperpolarization, gyroscopes, simulators, harsh-environment systems, rival hosts, six moonshots
E8	Project ladder	Every experiment sized from a weekend to a multi-group program
E9	Power circuits: diamond vs SiC and GaN	Tested converter-loss model: ideal diamond cuts traction-inverter switch loss 8× below SiC; today's device beats ideal silicon and trails ideal SiC; only diamond's on-resistance falls with temperature
E10	Sizing a room-temperature quantum computer	RSA-2048 would take about a year at a 1 ms cycle; area and power are not the limits, readout speed and yield are
E11	Application atlas	16 product lines ranked by readiness, with the wafer requirements each imposes

Lithography limits on diamond	Processors built with one transistor polarity

Diamond vs SiC vs GaN in a traction inverter	Where each semiconductor plays

On-resistance vs temperature	Application readiness

Open-system NV–NV gate	Surface-code overhead in NV cells

📚 Chapters

#	Chapter	In one line
00	Overview for everyone	The whole idea in 8 minutes
01	Materials physics	Figures of merit, deep dopants, heat
02	Wafer manufacturing	Gas-phase growth against Czochralski silicon
03	Process flow versus CMOS	Every fab step compared; surface transfer doping
04	Analog, power, radio-frequency devices	Diodes, transistors, amplifiers
05	Digital logic	p-channel logic, its limits, the hybrid answer
06	NV center physics	Hamiltonian, optical cycle, coherence, sensing
07	NV fabrication and placement	Implantation, laser writing, the yield model
08	Quantum processor architecture	Cells, links, readout, error correction, honest limits
09	Control and CMOS integration	The five-layer reference stack
10	Current experiments and industry	Who has shown what, with evidence labels
11	Proposed experiments and roadmap	26 experiments in four tiers
12	Silicon versus diamond scorecard	Row-by-row comparison
13	Economics and risk	Product sequence and risk register
E1–E8	Expert track	Lithography → design kit → processors → analog → qubit engineering → error correction → beyond → projects
—	Glossary · All 524 references · BibTeX · Ubuntu development guide

⚙️ Quick start

git clone git@github.com:Normansrule/adamas-diamond-framework.git
cd adamas-diamond-framework
sudo apt install -y ngspice iverilog yosys      # optional: circuit and logic tools
conda env create -f environment.yml && conda activate adamas

python -m pytest -q                     # 117 tests (Python, Verilog, SPICE, JavaScript, notebooks, headless page tests), including the citation check
make spice rtl synth layout place       # ngspice; DIA-4 simulation, synthesis, and placement on PDK-0
python examples/01_why_diamond.py       # figures of merit, doping, on-resistance
python examples/02_nv_qubit_basics.py   # resonance lines, coupling, register fidelity
python examples/make_all_figures.py     # regenerate every figure in docs/img/

Full step-by-step terminal guide, including GitHub publishing: docs/DEVELOPMENT_UBUNTU.md.

Module	What it computes	Key sources
adamas.materials	Properties and four figures of merit for five semiconductors	[baliga1982], [johnson1965], [keyes1972]
adamas.doping	Incomplete ionization of deep dopants	[sze2006], [lagrange1998]
adamas.thermal	Hot-spot spreading resistance	[carslaw1959]
adamas.wafer	Dies per wafer, Poisson and Murphy yield, wafer history	[murphy1964], [stapper1983]
adamas.power	Unipolar limit, transit frequency, measured points	[baliga1982], [saha2021]
adamas.logic	Square-law transistor, inverter transfer curve, noise margins	[sze2006], [liu2017]
adamas.nv	Spin Hamiltonian, magnetic resonance spectra, Rabi, Ramsey, echo, sensitivity	[doherty2013], [dreau2011]
adamas.coupling	Dipolar coupling, gate bound, Monte Carlo placement yield	[dolde2013], [neumann2010natphys]
adamas.register	Electron plus nuclear two-qubit gate simulation	[felton2009], [dutt2007]
adamas.litho	Rayleigh scaling, EUV photon statistics, mirror throughput, electron range	[mack2007], [debisschop2017], [kanaya1972]
adamas.digital	Delay, power, and gate budgets for single-polarity logic; reference processors	[rabaey2003], [faggin1996], [biggs2021]
adamas.analog	gm/I_D, gain, mismatch, noise, references, photocurrent readout budget	[silveira1996], [pelgrom1989], [blauschild1978]
adamas.opensys	Lindblad two-qubit gate, carbon-13 bath, dynamical decoupling	[lindblad1976], [maze2008prb], [delange2010]
adamas.gate_budget	Non-Markovian error budget of the echoed NV–NV gate: dephasing, pulses, preparation	[delange2010], [aslam2013], [dolde2013]
adamas.surface_sim	Monte Carlo surface-code memory with in-cell, link, and readout error rates (needs pymatching)	[dennis2002], [wang2003], [higgott2022]
adamas.converter	Hard-switched converter loss, area optimum, on-resistance vs temperature, five applications	[erickson2020], [baliga1989], [pernot2010]
adamas.scaling	Size, time, and power of a room-temperature NV machine for published workloads	[gidney2021], [litinski2019], [krinner2019]
adamas.pdk0	PDK-0 layer map, lambda rules, GDSII writer, monitor-die generator	[meadconway1980], [kawarada2014], [pelgrom1989]
adamas.stdcells	PDK-0 standard cells: layouts, LEF, timed Liberty; circuits/digital/place.py places DIA-4	[weste2011], [rabaey2003], [ajayi2019]
adamas.orfs_platform	Complete OpenROAD-flow-scripts platform for PDK-0; make orfs routes DIA-4 in Docker	[ajayi2019], [meadconway1980]
adamas.site, web/	The website: landing page, six labs, explorer; make serve to preview	see docs/WEBSITE.md
adamas.explorer, adamas.poster, adamas.animations	Interactive web explorer (same equations in JavaScript, tested against Python), one-page SVG poster, GIF animations	all of the above
adamas.hw + hardware/a1_odmr	ADF4351 register calculator (runs under MicroPython), sweep logic, Pico firmware, host capture script	ADF4351 data sheet, [stegemann2023]
adamas.xzzx_native	Native XZZX syndrome circuits with biased gate noise and hook errors; thresholds versus bias (make xzzx)	[bonillaataides2021], [tuckett2018]
adamas.validation, adamas.uncertainty	Validation matrix (literature, cross-tool, analytic) and Monte Carlo + tornado sensitivity analysis; Confidence page	[wang2003], [isberg2002], [kimoto2014]
adamas.paper	Generates the preprint's numbers from the package (make paper)
adamas.fitting (python -m adamas.fit)	Fits for ODMR, Rabi, Ramsey, echo, Arrhenius, transistor, g⁽²⁾ with uncertainties and interpretation; Data Lab	[doherty2013], [lagrange1998], [kurtsiefer2000]
adamas.glossary	48 terms spelled out; hover definitions across the website (make glossary)
adamas.experiments	Ten tiered experiments: parts and prices, steps, safety, 3-D scenes, simulated expected results (make experiments)	[stegemann2023], [williams2026], [sewani2020]
adamas.traveler	Process traveler T1: 19 steps with parameters, checks, safety, failure modes, cross-section geometry, product variants (make traveler)	[kawarada2023], [kasu2012], [pezzagna2010]
adamas.photophysics	NV optical cycle: five-level rate model, readout contrast, polarization; Photon Lab	[tetienne2012], [manson2006]
adamas.course	The seven-lesson course: web pages, quizzes, and notebooks from one file (make notebooks)	see the course
adamas.resource	Space-time resource estimate from circuit-level fits: distance, qubits, die size, runtime; Machine Builder lab	[litinski2019], [fowler2012], [google2025]
adamas.trailer	A 20-second trailer rendered from the package's own models (make trailer)	[wort2008], [doherty2013]
adamas.circuit_qec	Circuit-level surface code (Stim + PyMatching) with NV idle-during-readout noise; the readout-time design rule	[gidney2021stim], [higgott2022], [maurer2012]
adamas.qec	Surface-code overhead mapped to NV cells	[fowler2012], [waldherr2014]
adamas.figures, adamas.figures_expert	Every figure in this repository	all of the above
circuits/spice, circuits/digital	ngspice decks; DIA-4 Verilog, cell library, Yosys flow	[nagel1973], [wolf2013], [liu2017]

🔖 The citation rule

1. Every equation, constant, and figure carries a [bibkey] that resolves in references/.
2. tools/check_citations.py runs in continuous integration and fails the build on any unknown key.
3. Models that originate in this repository (the gate-fidelity bound, the placement Monte Carlo, the yield plot's defect densities) are labeled as such wherever they appear.

Honest status of the reference list. About 440 of the 524 entries (marked ✅) are verified: matched against Crossref on title, year, first author, and volume, with their Digital Object Identifiers (DOIs) fetched automatically into references/dois.psv, or checked against an online source while the repository was written. The rest (marked 📚) are books, reports, conference papers, and a few items not indexed by Crossref; human decisions about those are logged in references/verification_overrides.psv. No DOI is typed by hand. To re-verify after adding references:

python tools/verify_refs.py        # queries Crossref, writes references/verification_report.csv

Company announcements are labeled as news or vendor statements in Chapter 10 and are never used as evidence for a physics claim.

🤝 Contributing, license, citation

See CONTRIBUTING.md. Code is released under the MIT License. To cite the framework, use CITATION.cff.