Simulator stack: HostSim (graph sim) + HostSIL (real firmware in the loop) + ngspice backend + review hardening - #45
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…mmitted build artifacts
… dlopen soname fallback, script binary paths
…OC against HostSim plant on Linux
…lts), gate demo fallback, scenario-driven error injection
…ion, opt-in sync-jump
…SPWM/FOC plot presets
…ects delivered simulators
…y byte-faithfully
…icker/editor, auto TCP attach, offscreen --sim-smoke
…cation, scenario vars, plants smoke part
…, shared sim CAN, N-phase machines)
…Shell round-trip over --live (var get/set verified)
…/domain-dt), fix ADC chain polarity vs Gen6 hardware
…y scenario keys, bus-voltage trace columns
… robust to hub loss
…tance example + docs recipe
…ing real firmware FaultManager, scheduled shell commands
…er port) + per-domain dt seam
…am validation, ngspice TSTOP/dlclose/circuit-load hardening
… dialog autosave, decoder/SendLine/ParseHostPort polish
…server backlog, GPIO/MOE HAL fidelity, scenario scanner, shutdown timeout
…ke harness hardening, validate_trace polarity, docs drift sync
…ridge-id + param validation, marker CRLF/splice, deterministic emission, repair foc_demo_aidan; +10 tests
… attach watchdog, ClearSession repaint, cheap status/console endpoints, decoder reset
…graph domain with no base-image markers
…ction_vhz), fix sil gate-driver /RDY model, vhz trace validation
…e CAN bridge); repair foc_chain Pi params; docs table
…les, reject only algebraic (connection-only) cycles (+4 tests)
… semantics), foc_sensorless_demo example verified in HostSim (worst obs err 0.121 A)
…-define bug), DATA paging past 600B cap, host STR_FRAG reassembly, improved bounds/overflow/ident hygiene, +43 tests
…-boost), Svpwm Vdc-divide NaN guard, ForcedAngle bidirectional wrap, PhaseCurrents real burst slope/age outputs
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Brings the HostSim base image back to life on top of the current coproc/gen7 line and builds the whole simulation stack on it. Note: the no-hardware path is the point — everything below was validated on this machine's CPU, not the bench.
What this contains
HostSim (graph-mode simulator) — complete platform model for the emitter base image: plant-coupled ADC signal chain (calibratable, Gen6 polarity), CAN loopback + injectable frames, persistent config store, scenario-driven temperatures/faults/Vdc glitches. The silent SPWM demo-fallback is now opt-in. Multi-instance CAN bridge lets several instances talk over a hub/spoke TCP (verified both directions, three-instance chain, robust to hub loss).
Plants — ODE PMSM (salient, verified against Gen6 FOC with id=-2 field weakening torque evidence) + induction machine (stationary-frame dq, V/Hz slip ~5% under the bundled induction graph), plus the ngspice backend (was: 10-hour + fallback; after
bg_resume/CV fixes + UIC cold start + in-circuit back-EMF netlist: full 5000-step FOC demo in ~4.6 s).HostSIL (firmware-in-the-loop SIL) — the unmodified Gen6FW application code compiled for Linux via an stm32 HAL shim layer. Real boot sequence runs in sim time,
control startengages, FOC spins the plant (iq_ref 8 A → 7.3 A).--livebinds the firmware's own USART3 telemetry byte-faithfully onto TCP. Scenario fault injection (OC via ADC counts, UV via comparator, overtemp, encoder timeout/amplitude) trips the real Firmware FaultManager paths, negative control byte-identical to baseline. Induction machine driven by the real OpenLoopController V/Hz path at 3.5% slip. Scheduled shell commands from scenario files.GUI/CLI —
rte sim --graph ... [--scenario ...] [--live]does emit+build+run. RTEStudio gains--tcp host:port --protocol ivp, SPWM/FOC presets with per-graph windows, and a Simulation menu (Build&Run → scenario picker/editor → auto-attach). Offscreen--sim-smokeis a real end-to-end gate (attach + thousands of decoded frames).Validator/codegen lenses — graphs loaded with any invalid node/wire/bridge now fail loudly with item ids (previously silently dropped); bridges act as unit delays for legal feedback loops (observer feedback now emits); bridge ids/params validated; graph emission is deterministic; foc_demo_aidan + foc_chain graphs repaired.
Docs/tests —
docs/simulation.md(authoritative guide),Tools/tests/run_sim_smoke.sh(6 parts: hostsim/plants/ngspice/dcdc/hostsil/rte — skips the ngspice leg cleanly when libngspice absent),Tools/tests/run_all_examples.sh(9/9 examples green incl. 2-instance CAN-bridge run), CI extended on the Linux legs of build-artifacts.yml.Verification
Local gates before this push: clean full build (0 errors/warnings in new code), 120+ ctest unit tests, full sim smoke passes, all example graphs emit+build+run clean, deterministic batch reruns, 35-min live soak (4.2M frames, flat RSS), ASAN clean (the only leak is 6 bytes attributed inside libngspice itself), 2-instance CAN-bridge exchange proven with witnessed frames both ways, GUI attach proven live with screenshots.