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feat(fpga): add Rev A ECP5UM-45F P&R target - #80
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Adds the first Rev A place-and-route and bitstream targets for the locked LFE5UM-45F/BG381 baseline. I/O remains deliberately unconstrained until the Rev A LPF and bank/pin allocation are frozen, so this qualifies the selected FPGA/toolchain flow rather than physical board pinout.