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1. Pulp_Common_common_cells Pulp_Common_common_cells Public

   Forked from pulp-platform/common_cells

   Common SystemVerilog components forked from pulp common

   SystemVerilog

2. sv_common_modules sv_common_modules Public

   Contains few common modules that are used in rtls frequently. Written in systemverilog.

   SystemVerilog

3. Protocols Protocols Public

   A repository of protocols, primarily focused on communication, with additional related protocols(TBD)

   SystemVerilog

4. myth_uvm myth_uvm Public

   contains/ will contain uvm related verif files. These are files that helps/helped me to learn uvm better. Contents:

   SystemVerilog

5. sv_coverage sv_coverage Public

   few basic modules with coverage implementation

   SystemVerilog

6. you_art-uart you_art-uart Public

   UART protocol design and verification. Verification environment is/ will be developed using uvm.

   SystemVerilog