Fix: don't log error when getting non-top cells in -bb mode#164
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Greptile SummaryThis patch fixes a spurious
Confidence Score: 4/5Safe to merge; the fix eliminates a false log_error without changing any state or data flow. The change is small and logically consistent with how -bb mode suppresses child SimInstance creation in the constructor. One edge worth noting: the constructor guards with !mod->get_blackbox_attribute(true) before skipping, while update_cell only checks if (mod), so an explicit-blackbox module in the design will also silently skip in -bb mode; this appears intentional but is not called out in the PR description. passes/sat/sim.cc — only file changed; the logic change is contained to a single guard condition in update_cell. Important Files Changed
Flowchart%%{init: {'theme': 'neutral'}}%%
flowchart TD
A[update_cell called] --> B{ff/formal/mem/children?}
B -- yes --> C[handle & return]
B -- no --> D{icg or evaluable cell?}
D -- yes --> E[evaluate & return]
D -- no --> F{cell type == $print?}
F -- yes --> G[return]
F -- no --> H{blackbox_children flag set?}
H -- no --> J[log_error: unsupported cell]
H -- yes --> I{module->design->module cell type != null?}
I -- "yes (known hierarchical cell)" --> K["return early (outputs already from FST)"]
I -- "no (unknown cell type)" --> J
Reviews (1): Last reviewed commit: "fix: don't log error when getting non-to..." | Re-trigger Greptile |
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Looks good to me |
Patch for PR#162.
update_cellis called when the update phase traverses all top modules and their submodules. Top modules are updated and the function returns. Submodules don't need to be updated (their values come from FST), so they need to be skipped. The cells that are not in module->design->module should still trigger the error.