docs: scrub stale v0/v1 markers from shipping comments

emikit/emi/BoardAnalysis.cpp

@@ -63,7 +63,7 @@ AnalysisResult analyze_board(
         layer_by_net.try_emplace(s.net_id, s.layer_ordinal);
     }
 
-    // Per-frequency drive current envelope -- shared across all nets in v1.
+    // Per-frequency drive current envelope -- shared across all nets.
     const auto drive_a = spectrum_sweep(config.drive, freqs);
 
     // Initialize worst-case envelope to -inf.

emikit/emi/BoardAnalysis.h

@@ -27,7 +27,7 @@
 namespace emikit::emi {
 
 struct AnalysisConfig {
-    // Drive spectrum per net. v1 applies one spectrum to every net the
+    // Drive spectrum per net. Current implementation applies one spectrum to every net the
     // user names -- a future revision will let each net carry its own.
     TrapezoidalSpec drive;
 
@@ -38,7 +38,7 @@ struct AnalysisConfig {
     // CISPR / FCC test distance. 3.0 (residential) or 10.0 (commercial).
     double test_distance_m = 3.0;
 
-    // Frequency grid we evaluate. 30 MHz - 1 GHz covers CISPR/FCC v1
+    // Frequency grid we evaluate. 30 MHz - 1 GHz covers CISPR/FCC default
     // range; the upper-end 1-6 GHz CISPR 32 region is included when
     // the user asks for it.
     std::vector<double> freq_hz;

emikit/emi/Masks.h

@@ -8,7 +8,7 @@
 // peak detector). The library returns the limit value at any
 // frequency by linear lookup on the breakpoints.
 //
-// Standards in v1:
+// Standards supported:
 //   CISPR 22 / EN 55022 -- IT equipment, Class A (commercial) and
 //                          Class B (residential)
 //   CISPR 32 / EN 55032 -- multimedia equipment, supersedes CISPR 13/22

sikit/MainWindow.cpp

@@ -678,7 +678,7 @@ void MainWindow::onSynthesizeEye() {
                     double total_length = 0.0;
                     for (const auto& s : board_->segments) {
                         if (s.net_id != target_net) continue;
-                        if (s.layer_ordinal != 0) continue;  // F.Cu only for v0
+                        if (s.layer_ordinal != 0) continue;  // F.Cu only
                         widths.push_back(s.width);
                         const double dx = s.end.x - s.start.x;
                         const double dy = s.end.y - s.start.y;

sikit/render/Mesher3D.cpp

@@ -406,7 +406,7 @@ BoardMesh3D build_board_mesh_3d(const circuitcore::board::Board& board,
 
     // Pads: walk every pad and stamp its shape onto each copper layer
     // it sits on. Through-hole pads (multiple copper-layer ordinals)
-    // get stamped on each so they visibly span top->bottom; v0 doesn't
+    // get stamped on each so they visibly span top->bottom; the renderer doesn't
     // synthesise an explicit barrel for them.
     for (const auto& pd : board.pads) {
         if (pd.layer_ordinals.empty()) continue;
@@ -436,7 +436,7 @@ BoardMesh3D build_board_mesh_3d(const circuitcore::board::Board& board,
                 case circuitcore::board::PadShape::Oval:
                 case circuitcore::board::PadShape::RoundRect:
                 case circuitcore::board::PadShape::Custom: {
-                    // v1: render every non-circular pad as a flat box.
+                    // Render every non-circular pad as a flat box.
                     // Oval / round-rect corner radii are a future
                     // refinement -- the volumetric shape is close enough
                     // for the thermal + EM read.

sikit/si/Ami.h

@@ -15,7 +15,7 @@
 //      dynamically by AmiModel via dlopen / dlsym (or LoadLibrary on
 //      Windows). The library is vendor-locked and platform-specific.
 //
-// v0 scope: the parser is complete and tested. The loader compiles
+// Scope: the parser is complete and tested. The loader compiles
 // against the documented AMI ABI and can be wired up by callers, but
 // integration testing requires a real .ami + .so pair which we don't
 // ship with sikit. Standard reference is the IBIS spec, §10.

sikit/si/Compliance.h

@@ -8,7 +8,7 @@
 // recommended PRBS pattern, and a reference to the spec document the
 // mask came from.
 //
-// Scope of v1
+// Scope
 //
 //   The masks in this file are the canonical hexagonal shapes from the
 //   published compliance documents, normalized to UI and unit voltage
@@ -21,7 +21,7 @@
 //
 //   PAM4 standards (PCIe Gen6, 50GBASE-KR / 100GBASE-KR4, DDR5 at
 //   higher data rates) have three vertically stacked eyes rather than
-//   one. v1 captures only the middle eye; the upper and lower eyes
+//   one. Currently captures only the middle eye; upper and lower
 //   have the same shape but offset in voltage. The is_pam4 flag tells
 //   downstream callers to repeat the mask test at the offset
 //   positions; full multi-eye scoring lands in a follow-up.

sikit/si/Connector.cpp

@@ -187,7 +187,7 @@ sikit::touchstone::TouchstoneFile generate_connector_touchstone(
         // the same pair are not connected through-traffic).
         // The actual through is S31 (P_near -> P_far) and S42 (N_near -> N_far).
         // Cross-pair coupling: S41 (P_near -> N_far) and S32 (N_near -> P_far)
-        // at the diff_xtalk_db level (Lorentzian-flat for v1).
+        // at the diff_xtalk_db level (Lorentzian-flat baseline).
         // Mode conversion: S31's even-mode response slightly different from
         // odd-mode -> represented as a small same-direction common-mode
         // term we fold into S21 / S12 (the within-pair near-end leakage).

sikit/si/Crosstalk.cpp

@@ -21,7 +21,7 @@ using Complex = std::complex<double>;
 // apply_channel. The slice keeps the freq grid + reference impedance but
 // folds a single src->dst column of the N-port into the 2-port S21
 // position. Back-reflections (S11/S22) are zeroed and S12 is set equal
-// to S21 (reciprocity); see header for why this is an acceptable v1
+// to S21 (reciprocity); see header for why this is an acceptable
 // approximation in matched-termination scenarios.
 sikit::touchstone::TouchstoneFile extract_two_port_slice(
     const sikit::touchstone::TouchstoneFile& src,

sikit/si/Crosstalk.h

@@ -31,7 +31,7 @@
 // superposition. Also Hall & Heck, "Advanced Signal Integrity for
 // High-Speed Digital Designs", ch. 11 (multi-line crosstalk).
 //
-// Scope of v1 (and what's deliberately not here):
+// Scope (and what's deliberately not here):
 //
 //   * Victim and aggressors are NRZ PRBS-7. PAM4 is a future
 //     extension that requires extending eye::nrz_waveform first.
@@ -96,7 +96,7 @@ sikit::eye::EyeGrid simulate_crosstalk_eye(
 // as the coupling. Port-order is the same convention used elsewhere in
 // the SParam library.
 //
-// Two minor caveats baked into this v1:
+// Two minor caveats baked in:
 //   1. The extracted "2-port" Touchstones have S11 = S22 = 0 and
 //      S12 = S21. This drops back-reflections at the endpoints; for
 //      a matched-termination scenario this is exact, and for the

sikit/si/EyeMask.cpp

@@ -19,7 +19,7 @@ const EyeMask& generic_centered_opening() {
          {0.4,   0.4},
          {0.3,   0.4},
          {0.5,   0.0}},  // shaped like a stretched diamond
-        "sikit v0 generic test (not a real spec)",
+        "sikit generic test (not a real spec)",
     };
     return kMask;
 }

sikit/si/EyeMask.h

@@ -36,7 +36,7 @@ const EyeMask& generic_centered_opening();
 
 // USB 2.0 high-speed transmit eye mask (Template 1, simplified rectilinear
 // approximation). Real implementations should use the precise hexagon from
-// the USB 2.0 spec; this is good enough for green/red sanity checks in v0.
+// the USB 2.0 spec; this is good enough for green/red sanity checks.
 const EyeMask& usb20_hs_template1();
 
 std::vector<std::string> available_mask_names();

sikit/si/EyeMetrics.cpp

@@ -112,7 +112,7 @@ EyeMetrics measure_eye(const EyeGrid& g) {
     // the midpoint voltage. We use the time span between the leftmost
     // and rightmost non-zero bin OUTSIDE the eye-opening window we just
     // measured — i.e. the bin populations clustered around the
-    // crossings. For v0 we approximate it as (time_bins - best_len) /
+    // crossings. We approximate it as (time_bins - best_len) /
     // time_bins, which is the fraction of the UI populated by trace
     // crossings.
     if (best_len > 0 && best_len < g.time_bins) {

sikit/si/FdtdRasterize.cpp

@@ -117,7 +117,7 @@ std::size_t rasterize_segment(FDTD3D& s,
             if (j < 0 || j >= s.grid().ny) continue;
             // Mark the single Yee cell as PEC for all three E
             // components. The mask is per-component so the rasteriser
-            // could be cleverer about which components to mark; v1
+            // could be cleverer about which components to mark; the current
             // marks all three for simplicity.
             s.mark_pec_box(i, j, kz, i, j, kz);
             ++marked;

sikit/si/HeadlessOps.cpp

@@ -73,7 +73,7 @@ int resolve_net_layer(const circuitcore::board::Board& board,
 
 // Walk the board's segments on the named net + layer, return the median
 // trace width and the summed length. Used by the synthesise path -- one
-// trace width per net is the v1 simplification, even though a real net
+// trace width per net is the simplification baked in, even though a real net
 // may transition between widths.
 struct NetGeometry {
     double median_width_m = 0.0;
@@ -297,7 +297,7 @@ int compliance_op(const std::filesystem::path& touchstone_in,
         }
         return 3;
     }
-    // For v1: report header info and the spec's mask metadata. Full
+    // Report header info and the spec's mask metadata. Full
     // eye reconstruction from the Touchstone would require choosing a
     // bit rate, a PRBS pattern, and a sample-folding pass; that ties
     // into the existing eye::build_eye pipeline and lands as a CLI

sikit/si/Ibis.cpp

@@ -242,7 +242,7 @@ class Parser {
             if (toks.size() >= 4) current_model_.c_comp.max = parse_ibis_number(toks[3]);
         }
         // Everything else (Voltage_Range, Vinl, Vinh, Submodel etc.) is
-        // ignored in v0 — it's there but we don't have a use for it yet.
+        // not consumed yet -- present in the parsed model for future use.
     }
 
     std::optional<ViPoint> parse_vi_row(const std::string& line) {

sikit/si/Ibis.h

@@ -8,7 +8,7 @@
 // timing data (Ramp) that together let you simulate a buffer's transient
 // behavior without the vendor's proprietary SPICE netlist.
 //
-// v0 scope:
+// Scope:
 //   - File-level keywords: IBIS Ver, Component, Manufacturer
 //   - Model blocks with type, C_comp (typ/min/max), Pulldown V/I table,
 //     Pullup V/I table, Ramp (dV/dt rise + fall)

sikit/si/ReturnPath.h

@@ -9,13 +9,13 @@
 // noise radiates. It is the #1 cause of "the simulator said pass, the
 // board failed" SI escapes.
 //
-// This v1 detector walks each signal segment, picks its reference plane
+// The detector walks each signal segment, picks its reference plane
 // (the nearest copper layer in the stackup), samples the path, and
 // flags segments where any sample point falls outside every copper zone
 // on the reference layer. Severity is reported as the off-plane fraction
 // times the segment length -- a proxy for the loop-inductance penalty.
 //
-// Two limitations baked into v1, documented as future work:
+// Two limitations baked in, documented as future work:
 //   * No quantitative loop-inductance computation. The pdnkit cavity
 //     solver knows the actual plane Z(f) at every (x, y, f); a future
 //     revision wires that lookup in to replace the on/off heuristic.

sikit/si/Rlgc.h

@@ -42,7 +42,7 @@ struct RlgcMatrices {
 //               exist in cs.conductors.
 //
 // One FDM solve per signal × 2 (dielectric + air), so N=3 conductors
-// means 6 solves. At the v0 cell size (W/25) this is seconds for
+// means 6 solves. At the default cell size (W/25) this is seconds for
 // realistic geometries.
 RlgcMatrices compute_rlgc(const CrossSection& cs,
                            const std::vector<int>& signal_ids,

sikit/si/SpiceExport.h

@@ -31,7 +31,7 @@
 // 10k+ nodes a real IC model brings.
 //
 // What this module does NOT do (yet):
-//   * Multi-port export. v1 emits a single H(s) -> single .subckt. A
+//   * Multi-port export. Single H(s) -> single .subckt. A
 //     full 4-port .s4p export needs four parallel Foster ladders plus
 //     reciprocity handling (S21 == S12 only if the network is passive,
 //     which we don't enforce in the fitting step). Tracked as a

sikit/si/SurfaceRoughness.h

@@ -31,7 +31,7 @@
 namespace sikit::analysis {
 
 enum class RoughnessModel {
-    None,                // smooth conductor (default; matches v0 behavior)
+    None,                // smooth conductor (default)
     HammerstadJensen,    // simple, good to ~10 GHz
     Huray,               // better above 20 GHz
 };

sikit/si/Topology.cpp

@@ -178,7 +178,7 @@ std::string TouchstoneBlock::label() const { return label_; }
 Eigen::Matrix2cd TouchstoneBlock::s_at(double freq_hz, double /*z_ref*/) const {
     // We interpolate the file's S-matrix at the requested frequency.
     // The reference impedance baked into the Touchstone may differ
-    // from z_ref; we do NOT renormalize for v1 (the cascade will
+    // from z_ref; we do NOT renormalize here (the cascade will
     // simply mismatch slightly). Full renormalization between
     // arbitrary Z_refs is a possible v2 extension.
     return interp_2port_s(ts_, freq_hz);

sikit/si/Topology.h

@@ -20,7 +20,7 @@
 //   Touchstone result that drops back into the existing channel-
 //   synthesis / eye pipeline.
 //
-// What is in v1 and what is not
+// Scope of this module
 //
 //   In: the data model (ChannelBlock hierarchy, Channel container),
 //       five concrete block types covering the cases an SI engineer
@@ -31,7 +31,7 @@
 //       first because the cascade logic is mathematically distinct
 //       from rendering and benefits from its own commit + test pass
 //       before the UI lands on top.
-//     * Multi-port (N>2) topology. v1 is single-channel two-port.
+//     * Multi-port (N>2) topology. Single-channel two-port only.
 //       The diff-pair case is covered separately by the DiffSynth
 //       module today; a future merge unifies them.
 //     * Block parameter optimization (e.g. "what trace length would

sikit/si/Touchstone.cpp

@@ -363,7 +363,7 @@ TouchstoneFile TouchstoneReader::read_string(std::string_view src, int num_ports
                            [](unsigned char c) { return std::toupper(c); });
             if (param != "S") {
                 throw TouchstoneParseError(std::format(
-                    "unsupported parameter type '{}' (only S supported in v0)", param));
+                    "unsupported parameter type '{}' (only S supported)", param));
             }
             out.frequency_scale = freq_scale_for(unit);
             out.format = format_for(fmt);

sikit/si/TouchstoneWriter.cpp

@@ -35,7 +35,7 @@ std::string TouchstoneWriter::to_string(const TouchstoneFile& f) {
         // legacy # option line, [Number of Ports], optional
         // [Two-Port Order], optional [Reference], [Network Data]
         // block, then [End]. The numeric body itself is the same
-        // floats-per-record format as v1.
+        // floats-per-record format as Touchstone v1.
         os << "! Generated by sikit (Touchstone v2)\n";
         os << "[Version] 2.0\n";
         // 2-port v2 conventionally uses 12_21 (row-major); preserve the

sikit/si/TraceImpedance.cpp

@@ -426,7 +426,7 @@ std::vector<DiffPairImpedance> compute_diff_pairs(
         for (std::size_t i = 0; i < board.segments.size(); ++i) {
             const auto& seg = board.segments[i];
             if (seg.net_id != dp.net_p_id && seg.net_id != dp.net_n_id) continue;
-            if (seg.layer_ordinal != 0) continue;  // F.Cu only for v0
+            if (seg.layer_ordinal != 0) continue;  // F.Cu only
             if (seg.width > 0.0) widths.push_back(seg.width);
             r.segment_indices.push_back(i);
         }

sikit/si/TraceImpedance.h

@@ -4,7 +4,7 @@
 //
 //   Engine::ClosedForm   IPC-2141A formulas (fast, ±5–10%).
 //   Engine::Fdm          In-house 2D finite-difference solver (slower,
-//                        captures real stackup, ±10–15% at v0 mesh density).
+//                        captures real stackup, +/-10-15% at default mesh density).
 
 #pragma once
 
@@ -33,7 +33,7 @@ struct AnalysisStackup {
     double tan_delta     = 0.02;        // dielectric loss tangent
     double sigma_copper  = 5.8e7;       // S/m (annealed copper)
 
-    // Copper surface roughness model. Defaults to None (smooth) so v0
+    // Copper surface roughness model. Defaults to None (smooth) so the default
     // behavior is preserved; callers opt in for high-frequency accuracy.
     RoughnessSpec roughness;
 

sikit/si/VectorFit.h

@@ -18,7 +18,7 @@
 //
 // Algorithm: Gustavsen-Semlyen Vector Fitting (1999), restricted to
 // real poles. Real-only is enough for the monotonic-loss SI channels
-// this v1 ships for; complex-pole pairs (needed for stub-resonance
+// what this currently ships for; complex-pole pairs (needed for stub-resonance
 // notches) are deferred along with the matching extension to ViaModel
 // that surfaces those features.
 //

sikit/tests/channel_dispersion_test.cpp

@@ -30,7 +30,7 @@ ChannelSpec basic_spec() {
 
 }  // namespace
 
-TEST_CASE("dispersion: ChannelSpec without model matches v0 behavior", "[disp]") {
+TEST_CASE("dispersion: ChannelSpec without model matches default behavior", "[disp]") {
     // Round-trip sanity: when dispersion_model is not set, the output
     // should be identical to the lossy-but-non-dispersive synthesis.
     auto a = basic_spec();

sikit/tests/reference_data_test.cpp

@@ -166,7 +166,7 @@ TEST_CASE("ref-data: FDM agrees with closed-form within budget", "[ref]") {
     REQUIRE(cf.z0  > 42.0);  REQUIRE(cf.z0  < 62.0);
     REQUIRE(fdm.z0 > 42.0);  REQUIRE(fdm.z0 < 62.0);
 
-    // And agree with each other to within 20% (FDM at v0 mesh density
+    // And agree with each other to within 20% (FDM at default mesh density
     // tends to over-estimate by 10-15% from the cell-rect classifier
     // fattening the conductor edges).
     REQUIRE(std::abs(fdm.z0 - cf.z0) / cf.z0 < 0.20);

sikit/tests/trace_impedance_test.cpp

@@ -135,7 +135,7 @@ TEST_CASE("from_board: picks up dielectric below F.Cu", "[trace]") {
 
 TEST_CASE("engine: FDM and closed-form agree to within ~25% on microstrip", "[trace]") {
     // Canonical 50Ω microstrip geometry; both engines should land in the
-    // same neighbourhood (closed-form ~50, FDM ~50–60 at v0 mesh density).
+    // same neighbourhood (closed-form ~50, FDM ~50-60 at default mesh density).
     AnalysisStackup s;
     s.outer_dielectric_height = 1.524e-3;
     s.copper_thickness = 35e-6;