[DREAMPlaceFPGA] Add placeDesign() wrapper for DREAMPlaceFPGA#1137
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eddieh-xlnx wants to merge 18 commits into
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[DREAMPlaceFPGA] Add placeDesign() wrapper for DREAMPlaceFPGA#1137eddieh-xlnx wants to merge 18 commits into
eddieh-xlnx wants to merge 18 commits into
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Signed-off-by: Chris Lavin <chris.lavin@amd.com>
Signed-off-by: Chris Lavin <chris.lavin@amd.com>
* disable routability_opt Signed-off-by: Zhili Xiong <zhilix691@utexas.edu> * fix result path and out_of_context flag Signed-off-by: Zhili Xiong <zhilix691@utexas.edu> --------- Signed-off-by: Zhili Xiong <zhilix691@utexas.edu> Co-authored-by: Zhili Xiong <zhixiong@xsjzhixiong40x.xlnx.xilinx.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
instead of DCP. Also call Design.routeSites() on result Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
Signed-off-by: Eddie Hung <eddie.hung@amd.com>
clavin-xlnx
approved these changes
Jan 17, 2025
| public static final String ENABLE_IF = "enable_if"; | ||
| public static final String ENABLE_SITE_ROUTING = "enable_site_routing"; | ||
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| public static final String IO_PL_DEFAULT = ""; |
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| public static final String IO_PL_DEFAULT = ""; | |
| public static final String IO_PL_DEFAULT = ""; //EMPTY |
I'm assuming we meant to have an empty string here.
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Invokes DREAMPlaceFPGA to place an
EDIFNetlistand return aDesignobject. Requires that thedreamplacefpgabinary be available onPATH.Design is exported to DREAMPlaceFPGA using the FPGA Interchange Format, and imported back into RapidWright using this same format.