accel/tcg: keep requested insn count for mmio code fetch - #109
Closed
sylvioalves wants to merge 1 commit into
Closed
accel/tcg: keep requested insn count for mmio code fetch#109sylvioalves wants to merge 1 commit into
sylvioalves wants to merge 1 commit into
Conversation
The Xilinx change that allows translating more than one instruction from MMIO regions cleared CF_COUNT_MASK whenever the code page is not directly addressable. This also discards an instruction count explicitly requested by the icount execution loop when refilling a budget smaller than the next block. The translator then regenerates an oversized block that exits before executing anything, so the CPU retires no instructions and the virtual clock freezes, livelocking the machine. Keep a non-zero requested count and only leave the count unconstrained when none was requested. Observed as a permanent hang of Zephyr llext tests on qemu_cortex_r5 with icount shift=3, where the extension text is covered by sub-page MPU regions and every code fetch takes the MMIO path. Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
1 participant
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
The Xilinx change that allows translating more than one instruction from MMIO regions cleared CF_COUNT_MASK whenever the code page is not directly addressable. This also discards an instruction count explicitly requested by the icount execution loop when refilling a budget smaller than the next block. The translator then regenerates an oversized block that exits before executing anything, so the CPU retires no instructions and the virtual clock freezes, livelocking the machine.
Keep a non-zero requested count and only leave the count unconstrained when none was requested. Observed as a permanent hang of Zephyr llext tests on qemu_cortex_r5 with icount shift=3, where the extension text is covered by sub-page MPU regions and every code fetch takes the MMIO path.