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Amdsupport - #10

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ZuseZ4 wants to merge 38 commits into
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amdsupport
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ZuseZ4 wants to merge 38 commits into
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amdsupport

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@ZuseZ4

@ZuseZ4 ZuseZ4 commented Jun 6, 2026

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@ZuseZ4

ZuseZ4 commented Jun 6, 2026

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RUSTFLAGS="-Ctarget-cpu=gfx90a --emit=llvm-bc,llvm-ir -Csave-temps -Zunstable-options" cargo +offload build --lib -Zunstable-options -r -v --target amdgcn-amd-amdhsa -Zbuild-std=core,panic_abort --no-default-features

cases the build of core to fail. I'm not using any offload feature at this point (mainly not setting any offload RUSTFLAGS), so it should be reproducile with a self build rustc/llvm without offload features enabled.

@ZuseZ4

ZuseZ4 commented Jun 6, 2026

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rustc: /tmp/drehwald1/prog/rust/src/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:9861: SDValue llvm::SelectionDAG::getLoad(ISD::MemIndexedMode, ISD::LoadExtType, EVT, const SDLoc &, SDValue, SDValue, SDValue, EVT, MachineMemOperand *): Assertion `(!MMO->getRanges() || (mdconst::extract<ConstantInt>(MMO->getRanges()->getOperand(0)) ->getBitWidth() == MemVT.getScalarSizeInBits() && MemVT.isInteger())) && "Range metadata and load type must match!"' failed.

Comment thread src/apps/ltimes.rs
.as_ref()
.expect("LTIMES psidat was not preloaded");

let mut phidat_reg = Region::<'_, _, Stride3D<32, 8, 1, 25, 32>>::from(p_phidat);

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