boulder: Disable forced 128bit vector width by default - #872
joebonrichie wants to merge 1 commit into
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Allow clang/gcc cost models to automatically choose whatever width they feel is appropriate for auto-vectorization cases. The toolchains are mature enough to automatically emit `vzeroupper` instructions to avoid the large 256bit -> 128bit latency cost. This will improve performance in some cases where the toolchain deicides that bigger-width vectorization is worth it.
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Quick test: // vw-test.c
float saxpy(float *c, const float *a, const float *b, float s, int n)
{
float acc = 0.0f;
for (int i = 0; i < n; i++) {
c[i] = a[i] + b[i] * s;
acc += c[i];
}
return acc;
} |
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IIUC, the reason this was originally added was power efficiency FWIW. |
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I asked a LLM to come up with a benchmark that maximises the amount of ymm registers used and ran it against This is for gcc 15 and clang 21. I do remember that clang 21 has some sort of bug which heavily affected auto-vectorization which may scew the results. #define ALEN 1024
static float x[4][ALEN];
static float kernel(int npass)
{
float acc[8] = {0};
for (int it = 0; it < npass; it++)
for (int i = 0; i < ALEN; i++) {
float x0 = x[0][i], x1 = x[1][i];
float x2 = x[2][i], x3 = x[3][i];
acc[0] += x0 * x1;
acc[1] += x0 * x2;
acc[2] += x0 * x3;
acc[3] += x1 * x2;
acc[4] += x1 * x3;
acc[5] += x2 * x3;
acc[6] += x0 * x0;
acc[7] += x1 * x1;
}
return acc[0] + ... + acc[7];
} |
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Unless I am misreading the numbers, don't they reinforce the point I was making...? |
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Yep pretty much I vaguely remember sunny's main point was the instruction penalty before and wasn't aware of the power consumption argument. Feel free to close this, my intuition is that may actually regress things on modern CPUs going forward. |
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Also ran against saxpy seems like a mixed bag |
Allow clang/gcc cost models to automatically choose whatever width they feel is appropriate for auto-vectorization cases.
The toolchains are mature enough to automatically emit
vzeroupperinstructions to avoid the large 256bit -> 128bit latency cost.This will improve performance in some cases where the toolchain deicides that bigger-width vectorization is worth it.