OPENC5A3V1: initial board config + W25Q64 flash#1114
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Open-hardware FC bring-up board: STM32C5A3RG in LQFP64 on a TANTOF405-shape PCB (schematic ~/src/ref/C591/C591-V1.pdf rev V1.1, C5A3 die substituted for the C591RGT6). Pin-compatible swap; the two MCUs differ only in their crypto block. Covers: * USB VCP on PA11/PA12 * ICM-42688P on SPI1 (CS=PA4, SCK=PA5, MISO=PA6, MOSI=PA7, INT=PB2) * 4 motors DShot bitbang: M1 PA8, M2 PA9 (TIM1_CH1/2), M3 PC8, M4 PC9 (TIM8_CH3/4) -- bitbang because the channels span two GPIO ports * Full UART map: USART1 PB6/PB7, USART2 PA2/PA3, USART3 PB10/PB11, UART4 PA0/PA1, UART5 PC12/PD2, USART6 PC6/PC7 * LED0 PB4 (MCU), LED1 PC0 (gyro) * HSE 8 MHz, CONFIG_IN_RAM, virtual baro/mag pending the real SPA06-003 wiring (I2C1 shares pins PB6/PB7 with USART1) Boots to CLI cleanly. The ICM-42688P doesn't respond on SPI on this particular hardware (SPI controller verified working via SWD-driven manual WHO_AM_I -- MISO idles at the pull-up level); software path complete pending hardware-level verification. Flash via ST-LINK SWD on PA13/PA14. Built-in System DFU is available as a manual fallback (BOOT0=high + USB-C replug).
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WalkthroughAdds a new OPENC5A3V1 board header (STM32C5A3) that defines MCU/clock/IDs, USB VCP with USB detect, LEDs, UART1–6 pin mappings, ICM‑42688P on SPI1, W25Q64 flash on SPI3 with flashfs/blackbox, AT7456E OSD on SPI2, BMP280 baro on I2C1, motor/timer mappings, ADC VBAT/current pins, buzzer, and virtual magnetometer. ChangesOPENC5A3V1 Board Configuration
Estimated code review effort🎯 3 (Moderate) | ⏱️ ~22 minutes Possibly related PRs
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Actionable comments posted: 1
🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
Inline comments:
In `@configs/OPENC5A3V1/config.h`:
- Around line 88-117: The target currently configures the ICM42688P as the sole
real IMU (USE_ACC_SPI_ICM42688P, USE_GYRO_SPI_ICM42688P, ICM42688P_* defines)
while the device is known to return idle 0xFF, so make the build safe by
restoring a working fallback: either enable USE_VIRTUAL_GYRO (so mpuDetect() is
not short-circuited) or remove/guard the ICM42688P-specific defines (USE_ACC,
USE_GYRO, USE_ACC_SPI_ICM42688P, USE_GYRO_SPI_ICM42688P,
ICM42688P_CS_PIN/EXTI/INSTANCE/ALIGN and GYRO_1_* aliases) until hardware is
verified; update the config so the board can boot with a functional sensor path
rather than a broken real IMU.
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configs/OPENC5A3V1/config.h
| // Status (2026-05-31): SPI controller verified working end-to-end via | ||
| // SWD-driven manual WHO_AM_I transaction (CR1.SPE+CSTART, TSIZE=2, | ||
| // TXDR=0xF5,0x00). MISO stays at the pull-up idle level (RXDR=0xFF for | ||
| // both byte slots) — chip is silent at the wire. Software path is | ||
| // complete; the chip itself needs hardware-level verification (VDDIO, | ||
| // CSB routing, soldering). | ||
| #define USE_ACC | ||
| #define USE_GYRO | ||
| #define USE_GYRO_EXTI | ||
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| #define USE_SPI_DEVICE_1 | ||
| #define SPI1_SCK_PIN PA5 | ||
| #define SPI1_SDI_PIN PA6 | ||
| #define SPI1_SDO_PIN PA7 | ||
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| #define USE_ACC_SPI_ICM42688P | ||
| #define USE_GYRO_SPI_ICM42688P | ||
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| #define ICM42688P_SPI_INSTANCE SPI1 | ||
| #define ICM42688P_CS_PIN PA4 | ||
| #define ICM42688P_EXTI_PIN PB2 | ||
| #define ICM42688P_ALIGN CW0_DEG | ||
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| #define GYRO_1_SPI_INSTANCE ICM42688P_SPI_INSTANCE | ||
| #define GYRO_1_CS_PIN ICM42688P_CS_PIN | ||
| #define GYRO_1_EXTI_PIN ICM42688P_EXTI_PIN | ||
| #define GYRO_1_ALIGN ICM42688P_ALIGN | ||
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| // USE_VIRTUAL_GYRO would short-circuit mpuDetect() in gyro_init.c — the | ||
| // real driver path can't be exercised while it's defined. Keep removed. |
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Do not merge a target whose only real IMU is still known-broken.
Lines 88-93 say the ICM-42688P still reads back idle 0xFF bytes, and Lines 94-117 make that device the sole real accel/gyro path while USE_VIRTUAL_GYRO stays disabled. That means this target is known to reach CLI without a usable flight sensor, so it is not releasable yet.
Based on learnings, Betaflight config.h reviews should only raise hardware concerns for specific, concrete mismatches; this one is explicitly documented in the diff itself.
🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
In `@configs/OPENC5A3V1/config.h` around lines 88 - 117, The target currently
configures the ICM42688P as the sole real IMU (USE_ACC_SPI_ICM42688P,
USE_GYRO_SPI_ICM42688P, ICM42688P_* defines) while the device is known to return
idle 0xFF, so make the build safe by restoring a working fallback: either enable
USE_VIRTUAL_GYRO (so mpuDetect() is not short-circuited) or remove/guard the
ICM42688P-specific defines (USE_ACC, USE_GYRO, USE_ACC_SPI_ICM42688P,
USE_GYRO_SPI_ICM42688P, ICM42688P_CS_PIN/EXTI/INSTANCE/ALIGN and GYRO_1_*
aliases) until hardware is verified; update the config so the board can boot
with a functional sensor path rather than a broken real IMU.
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Pull request overview
Adds an initial Betaflight config for the OPENC5A3V1 open-hardware FC board (STM32C5A3RG, TANTOF405-shape PCB). The config wires up USB VCP, ICM-42688P on SPI1, four DShot bitbang motors, UARTs 1-6, and two status LEDs, with synthetic baro/mag until the SPA06-003 I2C wiring is finalized. This depends on STM32C5A3 platform support in betaflight/betaflight#15284.
Changes:
- New target directory
configs/OPENC5A3V1/withconfig.hfor STM32C5A3RG. - Defines IMU (ICM-42688P/SPI1), motor map (TIM1/TIM8 bitbang), full UART pin map, LEDs, and CONFIG_IN_RAM.
- Uses
USE_VIRTUAL_BARO/USE_VIRTUAL_MAGas placeholders pending hardware bring-up.
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| #define BOARD_NAME OPENC5A3V1 | ||
| #define MANUFACTURER_ID CUST |
* SPI3 wired up: PC10 SCK / PC11 MISO / PB5 MOSI / PA15 CS. * Winbond W25Q64JV (8 MiB NOR, JEDEC ID 0xEF4017) handled by the flash_m25p16.c driver -- despite the name it covers the broader Winbond / Spansion SPI-NOR family up to 1 Gbit. * CONFIG_IN_EXTERNAL_FLASH + USE_FLASHFS together drive BF's auto-partitioner: CONFIG at the top (8 KiB = 2 x 4 KiB sectors, matching EEPROM_SIZE), the remaining ~8 MiB as FLASHFS for blackbox. * USE_BLACKBOX added so the FLASHFS partition gets a consumer. Software path is complete but unverified end-to-end on the bench board -- the W25Q64 is silent on SWD-driven manual JEDEC reads (MISO returns 0xFF/0xFF/0xFF), matching the same chip-silent pattern as the ICM-42688P. Both peripherals sit on the VDD3V3_SENSOR rail per the schematic, so they share whatever the underlying hardware issue is. Don't flash this build to a board whose flash chip doesn't respond -- the first config save will trip FAILURE_CONFIG_STORE_FAILURE and lock the firmware in the failureMode blink loop with no USB.
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Actionable comments posted: 1
🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
Inline comments:
In `@configs/OPENC5A3V1/config.h`:
- Around line 41-47: The code enables CONFIG_IN_EXTERNAL_FLASH even though the
W25Q64 is known to be non-functional; remove or disable CONFIG_IN_EXTERNAL_FLASH
(and the SPI3/W25Q64 flash block) or implement a runtime fallback that detects a
non-responsive W25Q64 (JEDEC ID == 0xFF) and falls back to RAM-only config using
eepromData[]/EEPROM_SIZE; update the startup/config loading path that relies on
CONFIG_IN_EXTERNAL_FLASH to check the flash presence and avoid calling flash
read/write hooks so the firmware won't attempt to store config to the dead chip.
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configs/OPENC5A3V1/config.h
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🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
Inline comments:
In `@configs/OPENC5A3V1/config.h`:
- Around line 215-219: The config defines ADC_VBAT_PIN, ADC_CURR_PIN and
ADC1_INSTANCE but never enables the ADC feature macro, so add a build-time
enable for ADC by defining USE_ADC (or the appropriate feature macro Betaflight
expects) in this config; update configs/OPENC5A3V1/config.h to `#define` USE_ADC
(or include the existing ADC-enabling header/macro) near the ADC pin/instance
block so the code paths gated by `#ifdef` USE_ADC (which reference ADC_VBAT_PIN,
ADC_CURR_PIN, ADC1_INSTANCE) are compiled in.
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configs/OPENC5A3V1/config.h
| // --- ADC: VBAT + current sense ------------------------------------------- | ||
| // VBAT divider on PC2 (ADC1 channel), current shunt amp on PC1. | ||
| #define ADC_VBAT_PIN PC2 | ||
| #define ADC_CURR_PIN PC1 | ||
| #define ADC1_INSTANCE ADC1 |
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🧩 Analysis chain
🏁 Script executed:
#!/bin/bash
# Convention check: do configs using ADC_VBAT_PIN also define USE_ADC in config.h?
rg -l 'ADC_VBAT_PIN' configs | head -8 | while read -r f; do
echo "--- $f ---"
rg -n 'USE_ADC\b|ADC_VBAT_PIN|ADC[0-9]_INSTANCE' "$f"
doneRepository: betaflight/config
Length of output: 763
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#!/bin/bash
set -euo pipefail
repo_root="$(pwd)"
file="configs/OPENC5A3V1/config.h"
echo "---- file snippet around lines 200-240 ----"
nl -ba "$file" | sed -n '190,245p'
echo "---- USE_ADC presence ----"
rg -n '^\s*`#define`\s+USE_ADC\b' "$file" || true
echo "---- ADC-related defines presence ----"
rg -n 'ADC_VBAT_PIN|ADC_CURR_PIN|ADC1_INSTANCE' "$file" || true
echo "---- consistency check across repo: configs with ADC_VBAT_PIN but missing USE_ADC ----"
# List files defining ADC_VBAT_PIN, then report those that do NOT define USE_ADC
files="$(rg -l 'ADC_VBAT_PIN' configs || true)"
echo "$files" | wc -l
# Iterate and check
echo "$files" | while read -r f; do
if ! rg -q '^\s*`#define`\s+USE_ADC\b' "$f"; then
echo "MISSING_USE_ADC: $f"
fi
done | head -50Repository: betaflight/config
Length of output: 166
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#!/bin/bash
set -euo pipefail
file="configs/OPENC5A3V1/config.h"
echo "---- file excerpt around target lines (200-245) ----"
sed -n '200,245p' "$file"
echo "---- USE_ADC presence ----"
rg -n '^\s*`#define`\s+USE_ADC\b' "$file" || true
echo "---- ADC-related defines presence ----"
rg -n 'ADC_VBAT_PIN|ADC_CURR_PIN|ADC1_INSTANCE' "$file" || true
echo "---- consistency across repo: configs defining ADC_VBAT_PIN but missing USE_ADC ----"
files="$(rg -l 'ADC_VBAT_PIN' configs || true)"
echo "count ADC_VBAT_PIN files: $(echo "$files" | wc -l | tr -d ' ')"
missing=0
while read -r f; do
if ! rg -q '^\s*`#define`\s+USE_ADC\b' "$f"; then
echo "MISSING_USE_ADC: $f"
missing=$((missing+1))
fi
done < <(echo "$files")
echo "total missing: $missing"Repository: betaflight/config
Length of output: 1769
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#!/bin/bash
set -euo pipefail
tmp="$(mktemp)"
rg -l 'ADC_VBAT_PIN' configs > "$tmp" || true
echo "ADC_VBAT_PIN files: $(wc -l < "$tmp")"
missing_tmp="$(mktemp)"
while IFS= read -r f; do
if ! rg -q '^\s*`#define`\s+USE_ADC\b' "$f"; then
echo "$f" >> "$missing_tmp"
fi
done < "$tmp"
echo "MISSING_USE_ADC count: $(wc -l < "$missing_tmp")"
echo "--- first 25 missing examples ---"
head -25 "$missing_tmp"
rm -f "$tmp" "$missing_tmp"Repository: betaflight/config
Length of output: 1015
🌐 Web query:
betaflight USE_ADC macro enables ADC_VBAT_PIN ADC_CURR_PIN
💡 Result:
The claim “betaflight USE_ADC macro enables ADC_VBAT_PIN ADC_CURR_PIN” is not supported by the Betaflight code/doc sources I found. What Betaflight actually does (based on source): 1) USE_ADC is used as a compile-time switch to include ADC-based current sensing logic. In current.c, the ADC refresh path is compiled under “#ifdef USE_ADC”, and it reads ADC_CURRENT via adcGetValue(ADC_CURRENT) [1]. 2) The ADC input selection is represented in Betaflight by ADC channel IDs (e.g., ADC_CURRENT and the voltage/current channels used by voltage/current code), not by macros named ADC_VBAT_PIN / ADC_CURR_PIN in the files I located. 3) Voltage and current are handled via configuration/data structures in voltage.h/current.h and refreshed by sensor code, but USE_ADC alone is not shown to “enable” specific per-pin macros ADC_VBAT_PIN and ADC_CURR_PIN. Key evidence: - Betaflight’s current ADC path is guarded by USE_ADC and calls adcGetValue(ADC_CURRENT) [1]. - Current sensor source types include “ADC” / “Virtual” / etc., but that selection is a runtime config (e.g., batteryConfig->currentMeterSource), not described as “USE_ADC enables ADC_VBAT_PIN ADC_CURR_PIN” [2]. So, if you’re looking to understand how Betaflight maps physical pins to ADC channels (battery voltage vs current), the mapping is board/target-specific (resource/driver configuration), and USE_ADC is only one compile-time enable that makes ADC-based code build in; it does not, by itself, define/enable pin macros named ADC_VBAT_PIN and ADC_CURR_PIN in the sources retrieved. If you tell me your target MCU/FC (e.g., STM32F4/G4/H7) and where you saw “ADC_VBAT_PIN” / “ADC_CURR_PIN” referenced (file name or link), I can do a more targeted search for those exact identifiers and confirm how they relate to Betaflight’s ADC channel mapping on that platform.
Citations:
- 1: https://github.com/betaflight/betaflight/blob/master/src/main/sensors/current.c
- 2: https://github.com/betaflight/betaflight/blob/cc3f135e/src/main/sensors/battery.c
🏁 Script executed:
#!/bin/bash
set -euo pipefail
file="configs/OPENC5A3V1/config.h"
echo "---- USE_ADC presence ----"
rg -n '^\s*`#define`\s+USE_ADC\b' "$file" || echo "USE_ADC not defined"
echo "---- Look for current/voltage ADC related macros or sources ----"
rg -n 'ADC(_|)[A-Z_0-9]*|currentMeterSource|CURRENT_METER_SOURCE|VBAT.*ADC|VOLTAGE.*ADC|battery.*ADC|ADC_CURRENT|ADC_VBAT|ADC_CURR' "$file" || true
echo "---- Look for defines that enable sensors ----"
rg -n 'USE_(VBAT|CURRENT|ADC|VOLTAGE|BATTERY)|VBAT|CURR|BATTERY' "$file" | head -120Repository: betaflight/config
Length of output: 761
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#!/bin/bash
set -euo pipefail
target_dir="configs/OPENC5A3V1"
echo "---- files under $target_dir ----"
find "$target_dir" -maxdepth 2 -type f -name '*.h' -o -name '*.c' -o -name '*.hpp' | sort
echo "---- USE_ADC occurrences under $target_dir ----"
rg -n '^\s*`#define`\s+USE_ADC\b|^\s*`#undef`\s+USE_ADC\b|USE_ADC' "$target_dir" || true
echo "---- any common include for OPENC5A3V1 referencing USE_ADC ----"
# Look for include of other headers in this config.h
rg -n '^\s*`#include`\s+["<].*["<]' "$target_dir/config.h" || trueRepository: betaflight/config
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OPENC5A3V1 config likely won’t enable ADC-based VBAT/current sensing
configs/OPENC5A3V1/config.h defines ADC_VBAT_PIN, ADC_CURR_PIN, and ADC1_INSTANCE, but does not define USE_ADC. Since Betaflight’s ADC current refresh logic is gated by #ifdef USE_ADC, VBAT/current monitoring may not be active for this target as written.
🛠️ Proposed fix
+#define USE_ADC
`#define` ADC_VBAT_PIN PC2
`#define` ADC_CURR_PIN PC1
`#define` ADC1_INSTANCE ADC1📝 Committable suggestion
‼️ IMPORTANT
Carefully review the code before committing. Ensure that it accurately replaces the highlighted code, contains no missing lines, and has no issues with indentation. Thoroughly test & benchmark the code to ensure it meets the requirements.
| // --- ADC: VBAT + current sense ------------------------------------------- | |
| // VBAT divider on PC2 (ADC1 channel), current shunt amp on PC1. | |
| #define ADC_VBAT_PIN PC2 | |
| #define ADC_CURR_PIN PC1 | |
| #define ADC1_INSTANCE ADC1 | |
| // --- ADC: VBAT + current sense ------------------------------------------- | |
| // VBAT divider on PC2 (ADC1 channel), current shunt amp on PC1. | |
| `#define` USE_ADC | |
| `#define` ADC_VBAT_PIN PC2 | |
| `#define` ADC_CURR_PIN PC1 | |
| `#define` ADC1_INSTANCE ADC1 |
🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
In `@configs/OPENC5A3V1/config.h` around lines 215 - 219, The config defines
ADC_VBAT_PIN, ADC_CURR_PIN and ADC1_INSTANCE but never enables the ADC feature
macro, so add a build-time enable for ADC by defining USE_ADC (or the
appropriate feature macro Betaflight expects) in this config; update
configs/OPENC5A3V1/config.h to `#define` USE_ADC (or include the existing
ADC-enabling header/macro) near the ADC pin/instance block so the code paths
gated by `#ifdef` USE_ADC (which reference ADC_VBAT_PIN, ADC_CURR_PIN,
ADC1_INSTANCE) are compiled in.
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♻️ Duplicate comments (2)
configs/OPENC5A3V1/config.h (2)
87-93:⚠️ Potential issue | 🔴 Critical | ⚡ Quick winCurrent IMU path is configured as primary despite being documented chip-silent.
Lines 87-92 state the ICM-42688P is wire-silent, but Lines 93-113 still make it the active real accel/gyro path while virtual gyro remains disabled (Lines 115-116). This leaves the target in a non-releasable state for normal operation.
Temporary safety fallback until hardware is validated
+#define USE_VIRTUAL_GYRO(Alternatively, gate/comment out the ICM42688P driver block until bring-up is complete.)
Also applies to: 102-113, 115-116
🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the rest with a brief reason, keep changes minimal, and validate. In `@configs/OPENC5A3V1/config.h` around lines 87 - 93, The config currently enables the physical IMU despite it being chip-silent; disable or demote the ICM-42688P path by removing or guarding the USE_ACC flag and/or commenting out the ICM-42688P driver block so the virtual gyro/fallback becomes the active sensor path; specifically, either undefine/remove USE_ACC and enable the virtual gyro fallback macro (or add a guard around the ICM42688P driver init code) so the board uses the safe virtual sensor until hardware bring-up completes.
41-43:⚠️ Potential issue | 🔴 Critical | ⚡ Quick winDisable
CONFIG_IN_EXTERNAL_FLASHwhile flash is explicitly documented as non-responsive.Line 42 enables external config storage, but Lines 129-133 state JEDEC reads are still
0xFF. This creates a known config-store failure path.Proposed minimal fix
-#define CONFIG_IN_EXTERNAL_FLASH +// `#define` CONFIG_IN_EXTERNAL_FLASHAlso applies to: 129-133
🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the rest with a brief reason, keep changes minimal, and validate. In `@configs/OPENC5A3V1/config.h` around lines 41 - 43, The CONFIG_IN_EXTERNAL_FLASH macro is enabled while the external W25Q64 is documented as non-responsive (JEDEC reads 0xFF), causing a guaranteed config-store failure; disable or remove the CONFIG_IN_EXTERNAL_FLASH definition in this config header so the build does not attempt to use external SPI flash for config storage (look for the `#define` CONFIG_IN_EXTERNAL_FLASH symbol and the related external flash comments/JEDEC-read notes further down and ensure external-flash config path is turned off).
🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
Duplicate comments:
In `@configs/OPENC5A3V1/config.h`:
- Around line 87-93: The config currently enables the physical IMU despite it
being chip-silent; disable or demote the ICM-42688P path by removing or guarding
the USE_ACC flag and/or commenting out the ICM-42688P driver block so the
virtual gyro/fallback becomes the active sensor path; specifically, either
undefine/remove USE_ACC and enable the virtual gyro fallback macro (or add a
guard around the ICM42688P driver init code) so the board uses the safe virtual
sensor until hardware bring-up completes.
- Around line 41-43: The CONFIG_IN_EXTERNAL_FLASH macro is enabled while the
external W25Q64 is documented as non-responsive (JEDEC reads 0xFF), causing a
guaranteed config-store failure; disable or remove the CONFIG_IN_EXTERNAL_FLASH
definition in this config header so the build does not attempt to use external
SPI flash for config storage (look for the `#define` CONFIG_IN_EXTERNAL_FLASH
symbol and the related external flash comments/JEDEC-read notes further down and
ensure external-flash config path is turned off).
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Adds the rest of the bring-up board's peripherals now that flash JEDEC reads correctly via the C5 SPI3 platform fix. - CONFIG_IN_EXTERNAL_FLASH (W25Q64 on SPI3 with PB5 AF7 platform fix) - AT7456E OSD on SPI2 (PB12 CS, PB13/14/15 SCK/MISO/MOSI) - SPA06-003 baro on I2C1 (PB8 SCL, PB9 SDA) - ADC: VBAT on PC2, current on PC1 - Beeper on PC3 (inverted, MOSFET-driven) - LED strip on PB3 (TIM2_CH2) - Servo timer pins on PB0/PB1 (TIM3_CH3/CH4) - USB cable-detect on PC5 (Q1 VBUS divider) - Motor 3/4 swap: PC9->M3 PC8->M4 to match the schematic - UART3 RX pin moved from PB11 to PC4 to match this board Flash partition layout under CONFIG_IN_EXTERNAL_FLASH: CONFIG at sector 127 (8 KiB), FLASHFS at sectors 0..126 (~8 MiB for blackbox). Verified end-to-end - save+reboot persists config across power cycle.
Summary
Open-hardware FC bring-up board: STM32C5A3RG on a TANTOF405-shape PCB (C5A3 die substituted for the C591RGT6 — pin-compatible swap, differs only in the crypto block).
Three commits
Depends on
Bench-board state
USB VCP + CLI + CONFIG_IN_EXTERNAL_FLASH (save survives reboot) + AT7456E OSD all verified end-to-end. ICM-42688P (SPI1) and SPA06 (I2C1) silent on the wire on this hand-built board despite the SPI/I2C software paths being verified at the register level. W25Q64 on the same sensor rail works, so the rail itself is alive — most likely missing VDDIO bond / wrong chip orientation on the IMU and baro footprints. Needs hardware verification on another build of the board.