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Make the SX1262 board wiring build-time selectable via Kconfig (menuconfig -> Bitle hardware) instead of a fixed XIAO-only pin map, and add the Heltec WiFi LoRa 32 V3 / Wireless Stick Lite V3 wiring (pins per the MeshCore heltec_v3 variant). Heltec gates the radio behind the Vext rail, so a new CONFIG_BITLE_LORA_VEXT_PIN is driven active-high before the boot probe (default 36 on Heltec, -1 elsewhere). The XIAO Wio-SX1262 remains the default and the esp32c3 build is unchanged; the 8 MB flash size moves to sdkconfig.defaults.esp32s3 so the 4 MB C3 target keeps its layout. Validated on hardware: two Heltec ESP32-S3 V3 boards trunking at 911.5 MHz SF10 with ARQ, while serving BitChat phones over BLE.
Auto-detected 128x64 OLED (I2C 0x3C, Heltec WiFi LoRa 32 V3 built-in): boot splash, then a dashboard with node nickname, live BLE link count, discovered-peer count, trunk state and counters, plus a three-lane scrolling activity tape (BLE rx / trunk / forwarded) with age-decaying blips and an idle sweep. Auto-off after CONFIG_BITLE_DISPLAY_ON_SECS (default 10s); the user button (GPIO0/PRG, active low) wakes it again, mirroring MeshCore's power-saving behavior. Rendering lives in bitle_screen.c, free of ESP-IDF dependencies, so the host simulator tools/screen_sim.c draws byte-identical frames to PNG for visual verification. A new bitle_stats module feeds it: an event ring fed by the mesh relay/LoRa paths and a seen-peer table of unique announce senders. Getters added: bitchat_ble_link_count(), noise_get_nickname(), noise_verified_peer_count(), bitle_link_type_of(). Transport lessons validated on hardware: the whole frame must go out in one I2C transaction (STOP-separated chunks tear the image on clone controllers), contrast at max (the charge pump sags with many lit pixels), and a unit that NACKs frames persistently is disabled cleanly until reboot. Kconfig: BITLE_DISPLAY (default on for Heltec V3) with SDA/SCL/RST/button pins and wake time; the OLED shares the Vext rail and powers it even when the trunk is NVS-disabled. Absent display degrades to headless, same philosophy as the radio probe.
# Conflicts: # main/bitle_lora.c # main/bitle_mesh.c
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Important
Merge order: Merge this PR only after #7 and #8 have been merged into
main. After both land, re-check this PR's final diff before merging.Summary
Makes the SX1262 board wiring build-time selectable via Kconfig and adds support for Heltec WiFi LoRa 32 V3 / Wireless Stick Lite V3 as Bitle-LR nodes. The Seeed XIAO ESP32-S3 + Wio-SX1262 remains the default; existing targets are unaffected.
Changes
main/Kconfig.projbuild(new):BITLE_LORA_BOARDchoice (XIAO_WIO_SX1262default /HELTEC_V3, esp32s3 only) andBITLE_LORA_VEXT_PIN(default 36 on Heltec, -1 elsewhere)main/bitle_lora.c: pin block switches on the Kconfig symbols; Heltec wiring per the MeshCoreheltec_v3variant (SCK=9, MISO=11, MOSI=10, CS=8, RESET=12, BUSY=13, DIO1=14, no RXEN). New:CONFIG_BITLE_LORA_VEXT_PINis driven active-high with a 20 ms settle before the radio probe — Heltec gates the SX1262 behind the Vext rail, so the probe finds nothing without itsdkconfig.defaults.esp32s3(new): 8 MB flash moves here from the common defaults so the 4 MB esp32c3 target keeps its layoutdocs/LoRa-boards.md(pin tables, how to switch via config symbols, how to port a new board) + README hardware/build sectionsThe radio architecture is identical across boards (TCXO on DIO3 @ 1.8 V, DIO2 as RF switch), so no driver changes were needed.
Verification
esp32s3+ XIAO (default),esp32s3+ Heltec,esp32c3(unchanged, no LoRa symbols)Notes
CONFIG_BITLE_LORA_BOARD_HELTEC_V3=yinsdkconfig.defaults.esp32s3— documented in the new doc