erikkaashoek · PhysicistJohn · Jul 15, 2026 · Jul 15, 2026 · Jul 14, 2026 · Jul 15, 2026
diff --git a/.gitmodules b/.gitmodules
@@ -1,4 +1,4 @@
 [submodule "ChibiOS"]
 	path = ChibiOS
-	url = https://github.com/edy555/ChibiOS.git
-	branch = I2SFULLDUPLEX
+	url = https://github.com/PhysicistJohn/chibios.git
+	branch = codex/integration-tinysa-21.11.5
diff --git a/ChibiOS b/ChibiOS
diff --git a/Makefile b/Makefile
@@ -13,7 +13,9 @@ endif
 # Compiler options here.
 ifeq ($(USE_OPT),)
  ifeq ($(TARGET),F303)
-USE_OPT = -Og -fno-inline-small-functions -ggdb -fomit-frame-pointer -falign-functions=16 --specs=nano.specs -fstack-usage -std=c11
+USE_OPT = -Og -fno-inline-small-functions -ggdb -fomit-frame-pointer -falign-functions=16 --specs=nano.specs -fstack-usage -fsingle-precision-constant -std=c11
+# The legacy ChibiOS rules appended -fsingle-precision-constant for hard-FPU
+# builds. Keep that numeric behavior explicit when using the 21.11.x rules.
 #USE_OPT+=-fstack-protector-strong
  else
 USE_OPT = -Og -fno-inline-small-functions -ggdb -fomit-frame-pointer -falign-functions=16 --specs=nano.specs -fstack-usage -fsingle-precision-constant 
@@ -93,7 +95,9 @@ endif
 ifeq ($(TARGET),F303)
   USE_FPU = hard
   USE_PROCESS_STACKSIZE = 0x480
-  USE_EXCEPTIONS_STACKSIZE = 0x200
+  # The fault reporter renders through the LCD/printf stack. Reserve room for
+  # its assembly veneer, an extended exception frame, and a nested ISR frame.
+  USE_EXCEPTIONS_STACKSIZE = 0x400
 endif
 
 #
@@ -115,6 +119,8 @@ endif
 #CHIBIOS = ../ChibiOS-RT
 CHIBIOS = ChibiOS
 PROJ = .
+# ChibiOS 21.11.x keeps its license policy header in a dedicated include.
+include $(CHIBIOS)/os/license/license.mk
 # Startup files.
 
 ifeq ($(TARGET),F303)
@@ -130,13 +136,13 @@ include $(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/platform.mk
 include NANOVNA_STM32_F072/board.mk
 endif
 
-include $(CHIBIOS)/os/hal/osal/rt/osal.mk
+include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
 # RTOS files (optional).
 include $(CHIBIOS)/os/rt/rt.mk
 ifeq ($(TARGET),F303)
-include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+include $(CHIBIOS)/os/common/ports/ARMv7-M/compilers/GCC/mk/port.mk
 else
-include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk
+include $(CHIBIOS)/os/common/ports/ARMv6-M/compilers/GCC/mk/port.mk
 endif
 # Other files (optional).
 #include $(CHIBIOS)/test/rt/test.mk
@@ -156,6 +162,7 @@ endif
 ifeq ($(TARGET),F303)
 CSRC = $(STARTUPSRC) \
        $(KERNSRC) \
+       $(OSLIBSRC) \
        $(PORTSRC) \
        $(OSALSRC) \
        $(HALSRC) \
@@ -170,6 +177,7 @@ CSRC = $(STARTUPSRC) \
 else
 CSRC = $(STARTUPSRC) \
        $(KERNSRC) \
+       $(OSLIBSRC) \
        $(PORTSRC) \
        $(OSALSRC) \
        $(HALSRC) \
@@ -205,10 +213,11 @@ TCSRC =
 #       option that results in lower performance and larger code size.
 TCPPSRC =
 
-# List ASM source files here
-ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
+# ChibiOS startup and port assembly is preprocessed (.S), not plain assembly.
+ASMSRC =
+ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
 
-INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
+INCDIR = $(LICINC) $(STARTUPINC) $(KERNINC) $(OSLIBINC) $(PORTINC) $(OSALINC) \
          $(HALINC) $(PLATFORMINC) $(BOARDINC)  \
          $(STREAMSINC)
 
@@ -266,7 +275,7 @@ CPPWARN = -Wall -Wextra -Wundef
 
 # List all user C define here, like -D_DEBUG=1
 ifeq ($(TARGET),F303)
- UDEFS = -DARM_MATH_CM4 -DVERSION=\"$(VERSION)\" -DTINYSA_F303 -D__FPU_USED -DST7796S -DTINYSA4
+ UDEFS = -DARM_MATH_CM4 -DVERSION=\"$(VERSION)\" -DTINYSA_F303 -DST7796S -DTINYSA4
 #Enable if install external 32.768kHz clock quartz on PC14 and PC15 pins on STM32 CPU
 UDEFS+= -DVNA_USE_LSE
 # Use R as usb pullup
@@ -292,19 +301,12 @@ ULIBS = -lm
 # End of user defines
 ##############################################################################
 
-RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
+include $(RULESPATH)/arm-none-eabi.mk
 include $(RULESPATH)/rules.mk
 #include $(CHIBIOS)/memory.mk
 
 
-ifeq ($(TARGET),F303)
-clean:
-	rm -f -rf build/tinySA4.* build/lst/*.* build/obj/*.*
-else
-clean:
-	rm -f -rf build/$(PROJECT).* build/lst/*.* build/obj/*.*
-endif
-
 flash: build/$(PROJECT).bin
 	-@printf "reset dfu\r" >/dev/cu.usbmodem401 # mac
 	-@printf "reset dfu\r" >/dev/ttyACM0 # linux
@@ -323,4 +325,3 @@ else
 	@etags *.[ch] NANOVNA_STM32_F072/*.[ch] $(shell find ChibiOS/os/hal/ports/STM32/STM32F0xx ChibiOS/os -name \*.\[ch\] -print) 
 endif
 	@ls -l TAGS
-
diff --git a/NANOVNA_STM32_F072/adc.c b/NANOVNA_STM32_F072/adc.c
@@ -80,7 +80,7 @@ int16_t adc_vbat_read(void)
 // Vbat measure averange count = 2^VBAT_AVERAGE
 #define VBAT_AVERAGE 4
 // Measure vbat every 5 second
-#define VBAT_MEASURE_INTERVAL   S2ST(5)
+#define VBAT_MEASURE_INTERVAL   TIME_S2I(5)
 
   static int16_t   vbat_raw = 0;
   static systime_t vbat_time = -VBAT_MEASURE_INTERVAL-1;

diff --git a/NANOVNA_STM32_F072/board.c b/NANOVNA_STM32_F072/board.c
@@ -14,15 +14,41 @@
     limitations under the License.
 */
 
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief   PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- *          This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config = {
+#include "hal.h"
+#include "stm32_gpio.h"
+
+typedef struct {
+  uint32_t moder;
+  uint32_t otyper;
+  uint32_t ospeedr;
+  uint32_t pupdr;
+  uint32_t odr;
+  uint32_t afrl;
+  uint32_t afrh;
+} gpio_setup_t;
+
+typedef struct {
+#if STM32_HAS_GPIOA
+  gpio_setup_t PAData;
+#endif
+#if STM32_HAS_GPIOB
+  gpio_setup_t PBData;
+#endif
+#if STM32_HAS_GPIOC
+  gpio_setup_t PCData;
+#endif
+#if STM32_HAS_GPIOD
+  gpio_setup_t PDData;
+#endif
+#if STM32_HAS_GPIOE
+  gpio_setup_t PEData;
+#endif
+#if STM32_HAS_GPIOF
+  gpio_setup_t PFData;
+#endif
+} gpio_config_t;
+
+static const gpio_config_t gpio_default_config = {
 #if STM32_HAS_GPIOA
   {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
    VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},
@@ -59,8 +85,40 @@ const PALConfig pal_default_config = {
   {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
    VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH}
 #endif
-};
-#endif
+};
+
+static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
+  gpiop->OTYPER  = config->otyper;
+  gpiop->OSPEEDR = config->ospeedr;
+  gpiop->PUPDR   = config->pupdr;
+  gpiop->ODR     = config->odr;
+  gpiop->AFRL    = config->afrl;
+  gpiop->AFRH    = config->afrh;
+  gpiop->MODER   = config->moder;
+}
+
+static void stm32_gpio_init(void) {
+  rccResetAHB(STM32_GPIO_EN_MASK);
+  rccEnableAHB(STM32_GPIO_EN_MASK, true);
+#if STM32_HAS_GPIOA
+  gpio_init(GPIOA, &gpio_default_config.PAData);
+#endif
+#if STM32_HAS_GPIOB
+  gpio_init(GPIOB, &gpio_default_config.PBData);
+#endif
+#if STM32_HAS_GPIOC
+  gpio_init(GPIOC, &gpio_default_config.PCData);
+#endif
+#if STM32_HAS_GPIOD
+  gpio_init(GPIOD, &gpio_default_config.PDData);
+#endif
+#if STM32_HAS_GPIOE
+  gpio_init(GPIOE, &gpio_default_config.PEData);
+#endif
+#if STM32_HAS_GPIOF
+  gpio_init(GPIOF, &gpio_default_config.PFData);
+#endif
+}
 
 static bool needDFU(void) {
   // Magick data in memory before reset
@@ -105,7 +163,8 @@ void __early_init(void) {
   }
 
   //si5351_setup();
-  stm32_clock_init();
+  stm32_gpio_init();
+  stm32_clock_init();
 }
 
 /*

diff --git a/NANOVNA_STM32_F303/adc.c b/NANOVNA_STM32_F303/adc.c
@@ -36,54 +36,67 @@ static adcsample_t samplesVBAT[ADC_GRP_NUM_CHANNELS_VBAT];
 static adcsample_t samples[1];
 
 static const ADCConversionGroup adcgrpcfgVBAT = {
-  FALSE,
-  ADC_GRP_NUM_CHANNELS_VBAT,
-  NULL,
-  NULL,
-  ADC_CFGR_CONT | ADC_CFGR1_RES_12BIT,       // CFGR1
-  ADC_TR(0, 0),                              // ADC watchdog threshold TR1
-  {0, ADC_SMPR2_SMP_AN16(ADC_VBAT_SMP_TIME) | ADC_SMPR2_SMP_AN17(ADC_VBAT_SMP_TIME)/*| ADC_SMPR2_SMP_AN18(ADC_VBAT_SMP_TIME)*/}, // SMPR
-  {ADC_SQR1_SQ1_N(ADC_CHANNEL_IN17) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN18)/*| ADC_SQR1_SQ3_N(ADC_CHANNEL_IN16)*/, 0, 0, 0}           // CHSELR
+  .circular = false,
+  .num_channels = ADC_GRP_NUM_CHANNELS_VBAT,
+  .end_cb = NULL,
+  .error_cb = NULL,
+  .cfgr = ADC_CFGR_CONT | ADC_CFGR_RES_12BITS,
+  .tr1 = ADC_TR(0, 0),
+  .tr2 = ADC_TR_DISABLED,
+  .tr3 = ADC_TR_DISABLED,
+  .awd2cr = 0U,
+  .awd3cr = 0U,
+  .smpr = {0, ADC_SMPR2_SMP_AN16(ADC_VBAT_SMP_TIME) |
+              ADC_SMPR2_SMP_AN17(ADC_VBAT_SMP_TIME)},
+  .sqr = {ADC_SQR1_SQ1_N(ADC_CHANNEL_IN17) |
+          ADC_SQR1_SQ2_N(ADC_CHANNEL_IN18), 0, 0, 0}
 };
 
 static const ADCConversionGroup adcgrpcfgVersion = {
-  FALSE,
-  1,
-  NULL,
-  NULL,
-  ADC_CFGR1_RES_12BIT,       // CFGR1
-  ADC_TR(0, 0),                              // ADC watchdog threshold TR1
-  {ADC_SMPR1_SMP_AN1(ADC_TOUCH_XY_SMP_TIME), 0}, /* SMPR[2] */
-  {ADC_SQR1_SQ1_N(ADC_CHANNEL_IN1), 0, 0, 0} /* SQR[4]  */
+  .circular = false,
+  .num_channels = 1,
+  .end_cb = NULL,
+  .error_cb = NULL,
+  .cfgr = ADC_CFGR_RES_12BITS,
+  .tr1 = ADC_TR(0, 0),
+  .tr2 = ADC_TR_DISABLED,
+  .tr3 = ADC_TR_DISABLED,
+  .awd2cr = 0U,
+  .awd3cr = 0U,
+  .smpr = {ADC_SMPR1_SMP_AN1(ADC_TOUCH_XY_SMP_TIME), 0},
+  .sqr = {ADC_SQR1_SQ1_N(ADC_CHANNEL_IN1), 0, 0, 0}
 };
 
 static const ADCConversionGroup adcgrpcfgTouch = {
-  TRUE,                // Enables the circular buffer mode for the group.
-  1,                   // Number of the analog channels belonging to the conversion group.
-  NULL,                // adccallback_touch
-  NULL,                // adcerrorcallback_touch
-                       // CFGR
-  ADC_CFGR_EXTEN_0     // rising edge of external trigger
-
-  | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_0  // EXT4 0x1001 event (TIM1_TRGO)
-//  | ADC_CFGR_EXTSEL_2  // EXT4 0x100 event (TIM3_TRGO)
-
-
-  | ADC_CFGR_AWD1EN,   // Enable Analog watchdog check interrupt
-  ADC_TR(0, TOUCH_THRESHOLD),                 // Analog watchdog threshold TR1, interrupt on touch press
-  {ADC_SMPR1_SMP_AN4(ADC_TOUCH_SMP_TIME), 0}, // SMPR[2]
-  {ADC_SQR1_SQ1_N(ADC_CHANNEL_IN4), 0, 0, 0}  // SQR[4]
+  .circular = true,
+  .num_channels = 1,
+  .end_cb = NULL,
+  .error_cb = NULL,
+  .cfgr = ADC_CFGR_EXTEN_0 | ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_0 |
+          ADC_CFGR_AWD1EN,
+  .tr1 = ADC_TR(0, TOUCH_THRESHOLD),
+  .tr2 = ADC_TR_DISABLED,
+  .tr3 = ADC_TR_DISABLED,
+  .awd2cr = 0U,
+  .awd3cr = 0U,
+  .smpr = {ADC_SMPR1_SMP_AN4(ADC_TOUCH_SMP_TIME), 0},
+  .sqr = {ADC_SQR1_SQ1_N(ADC_CHANNEL_IN4), 0, 0, 0}
 };
 
 static ADCConversionGroup adcgrpcfgXY = {
-  FALSE,
-  1,
-  NULL,                         /* adccallback_touch */
-  NULL,                         /* adcerrorcallback_touch */
-  ADC_CFGR1_RES_12BIT,          /* CFGR */
-  ADC_TR(0, 0),                 /* TR1     */
-  {ADC_SMPR1_SMP_AN3(ADC_TOUCH_XY_SMP_TIME) | ADC_SMPR1_SMP_AN4(ADC_TOUCH_XY_SMP_TIME), 0}, /* SMPR[2] */
-  {ADC_SQR1_SQ1_N(ADC_CHANNEL_IN3), 0, 0, 0} /* SQR[4]  */
+  .circular = false,
+  .num_channels = 1,
+  .end_cb = NULL,
+  .error_cb = NULL,
+  .cfgr = ADC_CFGR_RES_12BITS,
+  .tr1 = ADC_TR(0, 0),
+  .tr2 = ADC_TR_DISABLED,
+  .tr3 = ADC_TR_DISABLED,
+  .awd2cr = 0U,
+  .awd3cr = 0U,
+  .smpr = {ADC_SMPR1_SMP_AN3(ADC_TOUCH_XY_SMP_TIME) |
+           ADC_SMPR1_SMP_AN4(ADC_TOUCH_XY_SMP_TIME), 0},
+  .sqr = {ADC_SQR1_SQ1_N(ADC_CHANNEL_IN3), 0, 0, 0}
 };
 
 void adc_init(void)
@@ -120,7 +133,7 @@ int16_t adc_vbat_read(void)
 // Vbat measure averange count = 2^VBAT_AVERAGE
 #define VBAT_AVERAGE 4
 // Measure vbat every 5 second
-#define VBAT_MEASURE_INTERVAL   S2ST(5)
+#define VBAT_MEASURE_INTERVAL   TIME_S2I(5)
 
   static int16_t   vbat_raw = 0;
   static systime_t vbat_time = -VBAT_MEASURE_INTERVAL-1;
@@ -219,7 +232,7 @@ uint16_t adc_multi_read(uint32_t chsel, uint16_t *result, uint32_t count)
   VNA_ADC->IER    = 0;
   VNA_ADC->TR     = ADC_TR(0, 0);
   VNA_ADC->SMPR   = ADC_SMPR_SMP_1P5;
-  VNA_ADC->CFGR1  = ADC_CFGR1_RES_12BIT;
+  VNA_ADC->CFGR  = ADC_CFGR_RES_12BITS;
   VNA_ADC->CHSELR = chsel;